Lines Matching refs:hw
161 static int gm_phy_write(struct sky2_hw *hw, unsigned port, u16 reg, u16 val) in gm_phy_write() argument
165 gma_write16(hw, port, GM_SMI_DATA, val); in gm_phy_write()
166 gma_write16(hw, port, GM_SMI_CTRL, in gm_phy_write()
170 u16 ctrl = gma_read16(hw, port, GM_SMI_CTRL); in gm_phy_write()
180 dev_warn(&hw->pdev->dev, "%s: phy write timeout\n", hw->dev[port]->name); in gm_phy_write()
184 dev_err(&hw->pdev->dev, "%s: phy I/O error\n", hw->dev[port]->name); in gm_phy_write()
188 static int __gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg, u16 *val) in __gm_phy_read() argument
192 gma_write16(hw, port, GM_SMI_CTRL, GM_SMI_CT_PHY_AD(PHY_ADDR_MARV) in __gm_phy_read()
196 u16 ctrl = gma_read16(hw, port, GM_SMI_CTRL); in __gm_phy_read()
201 *val = gma_read16(hw, port, GM_SMI_DATA); in __gm_phy_read()
208 dev_warn(&hw->pdev->dev, "%s: phy read timeout\n", hw->dev[port]->name); in __gm_phy_read()
211 dev_err(&hw->pdev->dev, "%s: phy I/O error\n", hw->dev[port]->name); in __gm_phy_read()
215 static inline u16 gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg) in gm_phy_read() argument
218 __gm_phy_read(hw, port, reg, &v); in gm_phy_read()
223 static void sky2_power_on(struct sky2_hw *hw) in sky2_power_on() argument
226 sky2_write8(hw, B0_POWER_CTRL, in sky2_power_on()
230 sky2_write32(hw, B2_Y2_CLK_CTRL, Y2_CLK_DIV_DIS); in sky2_power_on()
232 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > CHIP_REV_YU_XL_A1) in sky2_power_on()
234 sky2_write8(hw, B2_Y2_CLK_GATE, in sky2_power_on()
239 sky2_write8(hw, B2_Y2_CLK_GATE, 0); in sky2_power_on()
241 if (hw->flags & SKY2_HW_ADV_POWER_CTL) { in sky2_power_on()
244 sky2_pci_write32(hw, PCI_DEV_REG3, 0); in sky2_power_on()
246 reg = sky2_pci_read32(hw, PCI_DEV_REG4); in sky2_power_on()
249 sky2_pci_write32(hw, PCI_DEV_REG4, reg); in sky2_power_on()
251 reg = sky2_pci_read32(hw, PCI_DEV_REG5); in sky2_power_on()
254 sky2_pci_write32(hw, PCI_DEV_REG5, reg); in sky2_power_on()
256 sky2_pci_write32(hw, PCI_CFG_REG_1, 0); in sky2_power_on()
258 sky2_write16(hw, B0_CTST, Y2_HW_WOL_ON); in sky2_power_on()
261 reg = sky2_read32(hw, B2_GP_IO); in sky2_power_on()
263 sky2_write32(hw, B2_GP_IO, reg); in sky2_power_on()
265 sky2_read32(hw, B2_GP_IO); in sky2_power_on()
269 sky2_write16(hw, B0_CTST, Y2_LED_STAT_ON); in sky2_power_on()
272 static void sky2_power_aux(struct sky2_hw *hw) in sky2_power_aux() argument
274 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > CHIP_REV_YU_XL_A1) in sky2_power_aux()
275 sky2_write8(hw, B2_Y2_CLK_GATE, 0); in sky2_power_aux()
278 sky2_write8(hw, B2_Y2_CLK_GATE, in sky2_power_aux()
284 if ( (sky2_read32(hw, B0_CTST) & Y2_VAUX_AVAIL) && in sky2_power_aux()
285 pci_pme_capable(hw->pdev, PCI_D3cold)) in sky2_power_aux()
286 sky2_write8(hw, B0_POWER_CTRL, in sky2_power_aux()
291 sky2_write16(hw, B0_CTST, Y2_LED_STAT_OFF); in sky2_power_aux()
294 static void sky2_gmac_reset(struct sky2_hw *hw, unsigned port) in sky2_gmac_reset() argument
299 sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), 0); in sky2_gmac_reset()
301 gma_write16(hw, port, GM_MC_ADDR_H1, 0); /* clear MC hash */ in sky2_gmac_reset()
302 gma_write16(hw, port, GM_MC_ADDR_H2, 0); in sky2_gmac_reset()
303 gma_write16(hw, port, GM_MC_ADDR_H3, 0); in sky2_gmac_reset()
304 gma_write16(hw, port, GM_MC_ADDR_H4, 0); in sky2_gmac_reset()
306 reg = gma_read16(hw, port, GM_RX_CTRL); in sky2_gmac_reset()
308 gma_write16(hw, port, GM_RX_CTRL, reg); in sky2_gmac_reset()
336 static void sky2_phy_init(struct sky2_hw *hw, unsigned port) in sky2_phy_init() argument
338 struct sky2_port *sky2 = netdev_priv(hw->dev[port]); in sky2_phy_init()
342 !(hw->flags & SKY2_HW_NEWER_PHY)) { in sky2_phy_init()
343 u16 ectrl = gm_phy_read(hw, port, PHY_MARV_EXT_CTRL); in sky2_phy_init()
350 if (hw->chip_id == CHIP_ID_YUKON_EC) in sky2_phy_init()
357 gm_phy_write(hw, port, PHY_MARV_EXT_CTRL, ectrl); in sky2_phy_init()
360 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL); in sky2_phy_init()
361 if (sky2_is_copper(hw)) { in sky2_phy_init()
362 if (!(hw->flags & SKY2_HW_GIGABIT)) { in sky2_phy_init()
366 if (hw->chip_id == CHIP_ID_YUKON_FE_P && in sky2_phy_init()
367 hw->chip_rev == CHIP_REV_YU_FE2_A0) { in sky2_phy_init()
371 spec = gm_phy_read(hw, port, PHY_MARV_FE_SPEC_2); in sky2_phy_init()
373 gm_phy_write(hw, port, PHY_MARV_FE_SPEC_2, spec); in sky2_phy_init()
384 (hw->flags & SKY2_HW_NEWER_PHY)) { in sky2_phy_init()
397 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl); in sky2_phy_init()
400 if (hw->chip_id == CHIP_ID_YUKON_XL && (hw->flags & SKY2_HW_FIBRE_PHY)) { in sky2_phy_init()
401 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR); in sky2_phy_init()
404 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2); in sky2_phy_init()
405 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL); in sky2_phy_init()
408 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl); in sky2_phy_init()
410 if (hw->pmd_type == 'P') { in sky2_phy_init()
412 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 1); in sky2_phy_init()
415 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL); in sky2_phy_init()
417 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl); in sky2_phy_init()
420 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg); in sky2_phy_init()
429 if (sky2_is_copper(hw)) { in sky2_phy_init()
478 if (sky2_is_copper(hw)) in sky2_phy_init()
488 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON); in sky2_phy_init()
490 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF); in sky2_phy_init()
493 gma_write16(hw, port, GM_GP_CTRL, reg); in sky2_phy_init()
495 if (hw->flags & SKY2_HW_GIGABIT) in sky2_phy_init()
496 gm_phy_write(hw, port, PHY_MARV_1000T_CTRL, ct1000); in sky2_phy_init()
498 gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, adv); in sky2_phy_init()
499 gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl); in sky2_phy_init()
505 switch (hw->chip_id) { in sky2_phy_init()
510 ctrl = gm_phy_read(hw, port, PHY_MARV_FE_LED_PAR); in sky2_phy_init()
516 gm_phy_write(hw, port, PHY_MARV_FE_LED_PAR, ctrl); in sky2_phy_init()
521 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL); in sky2_phy_init()
526 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl); in sky2_phy_init()
533 gm_phy_write(hw, port, PHY_MARV_FE_LED_PAR, ctrl); in sky2_phy_init()
537 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR); in sky2_phy_init()
540 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3); in sky2_phy_init()
543 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, in sky2_phy_init()
550 gm_phy_write(hw, port, PHY_MARV_PHY_STAT, in sky2_phy_init()
559 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg); in sky2_phy_init()
565 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR); in sky2_phy_init()
568 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3); in sky2_phy_init()
571 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, in sky2_phy_init()
578 gm_phy_write(hw, port, PHY_MARV_INT_MASK, in sky2_phy_init()
581 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg); in sky2_phy_init()
592 if (hw->chip_id == CHIP_ID_YUKON_EC_U || hw->chip_id == CHIP_ID_YUKON_UL_2) { in sky2_phy_init()
594 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 255); in sky2_phy_init()
597 gm_phy_write(hw, port, 0x18, 0xaa99); in sky2_phy_init()
598 gm_phy_write(hw, port, 0x17, 0x2011); in sky2_phy_init()
600 if (hw->chip_id == CHIP_ID_YUKON_EC_U) { in sky2_phy_init()
602 gm_phy_write(hw, port, 0x18, 0xa204); in sky2_phy_init()
603 gm_phy_write(hw, port, 0x17, 0x2002); in sky2_phy_init()
607 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0); in sky2_phy_init()
608 } else if (hw->chip_id == CHIP_ID_YUKON_FE_P && in sky2_phy_init()
609 hw->chip_rev == CHIP_REV_YU_FE2_A0) { in sky2_phy_init()
611 gm_phy_write(hw, port, PHY_MARV_PAGE_ADDR, 17); in sky2_phy_init()
612 gm_phy_write(hw, port, PHY_MARV_PAGE_DATA, 0x3f60); in sky2_phy_init()
613 } else if (hw->chip_id == CHIP_ID_YUKON_OPT && hw->chip_rev == 0) { in sky2_phy_init()
615 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0x00ff); in sky2_phy_init()
618 gm_phy_write(hw, port, 24, 0x2800); in sky2_phy_init()
619 gm_phy_write(hw, port, 23, 0x2001); in sky2_phy_init()
622 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0); in sky2_phy_init()
623 } else if (hw->chip_id != CHIP_ID_YUKON_EX && in sky2_phy_init()
624 hw->chip_id < CHIP_ID_YUKON_SUPR) { in sky2_phy_init()
626 gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl); in sky2_phy_init()
635 gm_phy_write(hw, port, PHY_MARV_LED_OVER, ledover); in sky2_phy_init()
637 } else if (hw->chip_id == CHIP_ID_YUKON_PRM && in sky2_phy_init()
638 (sky2_read8(hw, B2_MAC_CFG) & 0xf) == 0x7) { in sky2_phy_init()
665 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0x00fb); in sky2_phy_init()
667 gm_phy_write(hw, port, 1, 0x4099); in sky2_phy_init()
668 gm_phy_write(hw, port, 3, 0x1120); in sky2_phy_init()
669 gm_phy_write(hw, port, 11, 0x113c); in sky2_phy_init()
670 gm_phy_write(hw, port, 14, 0x8100); in sky2_phy_init()
671 gm_phy_write(hw, port, 15, 0x112a); in sky2_phy_init()
672 gm_phy_write(hw, port, 17, 0x1008); in sky2_phy_init()
674 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0x00fc); in sky2_phy_init()
675 gm_phy_write(hw, port, 1, 0x20b0); in sky2_phy_init()
677 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0x00ff); in sky2_phy_init()
681 gm_phy_write(hw, port, 17, eee_afe[i].val); in sky2_phy_init()
682 gm_phy_write(hw, port, 16, eee_afe[i].reg | 1u<<13); in sky2_phy_init()
686 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0); in sky2_phy_init()
689 if (hw->chip_id >= CHIP_ID_YUKON_PRM) { in sky2_phy_init()
690 reg = gm_phy_read(hw, port, PHY_MARV_EXT_CTRL); in sky2_phy_init()
691 gm_phy_write(hw, port, PHY_MARV_EXT_CTRL, in sky2_phy_init()
698 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_COMPL); in sky2_phy_init()
700 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK); in sky2_phy_init()
706 static void sky2_phy_power_up(struct sky2_hw *hw, unsigned port) in sky2_phy_power_up() argument
710 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); in sky2_phy_power_up()
711 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1); in sky2_phy_power_up()
714 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > CHIP_REV_YU_XL_A1) in sky2_phy_power_up()
717 sky2_pci_write32(hw, PCI_DEV_REG1, reg1); in sky2_phy_power_up()
718 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); in sky2_phy_power_up()
719 sky2_pci_read32(hw, PCI_DEV_REG1); in sky2_phy_power_up()
721 if (hw->chip_id == CHIP_ID_YUKON_FE) in sky2_phy_power_up()
722 gm_phy_write(hw, port, PHY_MARV_CTRL, PHY_CT_ANE); in sky2_phy_power_up()
723 else if (hw->flags & SKY2_HW_ADV_POWER_CTL) in sky2_phy_power_up()
724 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR); in sky2_phy_power_up()
727 static void sky2_phy_power_down(struct sky2_hw *hw, unsigned port) in sky2_phy_power_down() argument
733 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR); in sky2_phy_power_down()
736 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR); in sky2_phy_power_down()
738 if (hw->flags & SKY2_HW_NEWER_PHY) { in sky2_phy_power_down()
740 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2); in sky2_phy_power_down()
742 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL); in sky2_phy_power_down()
745 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl); in sky2_phy_power_down()
748 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0); in sky2_phy_power_down()
752 gma_write16(hw, port, GM_GP_CTRL, in sky2_phy_power_down()
757 if (hw->chip_id != CHIP_ID_YUKON_EC) { in sky2_phy_power_down()
758 if (hw->chip_id == CHIP_ID_YUKON_EC_U) { in sky2_phy_power_down()
760 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2); in sky2_phy_power_down()
762 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL); in sky2_phy_power_down()
765 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl); in sky2_phy_power_down()
768 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0); in sky2_phy_power_down()
772 gm_phy_write(hw, port, PHY_MARV_CTRL, PHY_CT_PDOWN); in sky2_phy_power_down()
775 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); in sky2_phy_power_down()
776 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1); in sky2_phy_power_down()
778 sky2_pci_write32(hw, PCI_DEV_REG1, reg1); in sky2_phy_power_down()
779 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); in sky2_phy_power_down()
787 reg = gma_read16(sky2->hw, sky2->port, GM_SERIAL_MODE); in sky2_set_ipg()
793 gma_write16(sky2->hw, sky2->port, GM_SERIAL_MODE, reg); in sky2_set_ipg()
799 struct sky2_hw *hw = sky2->hw; in sky2_enable_rx_tx() local
803 reg = gma_read16(hw, port, GM_GP_CTRL); in sky2_enable_rx_tx()
805 gma_write16(hw, port, GM_GP_CTRL, reg); in sky2_enable_rx_tx()
812 sky2_phy_init(sky2->hw, sky2->port); in sky2_phy_reinit()
820 struct sky2_hw *hw = sky2->hw; in sky2_wol_init() local
826 sky2_write16(hw, B0_CTST, CS_RST_CLR); in sky2_wol_init()
827 sky2_write16(hw, SK_REG(port, GMAC_LINK_CTRL), GMLC_RST_CLR); in sky2_wol_init()
829 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR); in sky2_wol_init()
830 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR); in sky2_wol_init()
842 sky2_phy_power_up(hw, port); in sky2_wol_init()
843 sky2_phy_init(hw, port); in sky2_wol_init()
850 gma_write16(hw, port, GM_GP_CTRL, in sky2_wol_init()
855 memcpy_toio(hw->regs + WOL_REGS(port, WOL_MAC_ADDR), in sky2_wol_init()
859 sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), WOL_CTL_CLEAR_RESULT); in sky2_wol_init()
872 sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), ctrl); in sky2_wol_init()
875 sky2_write16(hw, B0_CTST, Y2_HW_WOL_OFF); in sky2_wol_init()
879 u32 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1); in sky2_wol_init()
881 sky2_pci_write32(hw, PCI_DEV_REG1, reg1); in sky2_wol_init()
885 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET); in sky2_wol_init()
886 sky2_read32(hw, B0_CTST); in sky2_wol_init()
889 static void sky2_set_tx_stfwd(struct sky2_hw *hw, unsigned port) in sky2_set_tx_stfwd() argument
891 struct net_device *dev = hw->dev[port]; in sky2_set_tx_stfwd()
893 if ( (hw->chip_id == CHIP_ID_YUKON_EX && in sky2_set_tx_stfwd()
894 hw->chip_rev != CHIP_REV_YU_EX_A0) || in sky2_set_tx_stfwd()
895 hw->chip_id >= CHIP_ID_YUKON_FE_P) { in sky2_set_tx_stfwd()
897 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_ENA); in sky2_set_tx_stfwd()
900 sky2_write32(hw, SK_REG(port, TX_GMF_AE_THR), in sky2_set_tx_stfwd()
903 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_DIS); in sky2_set_tx_stfwd()
905 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_ENA); in sky2_set_tx_stfwd()
908 static void sky2_mac_init(struct sky2_hw *hw, unsigned port) in sky2_mac_init() argument
910 struct sky2_port *sky2 = netdev_priv(hw->dev[port]); in sky2_mac_init()
914 const u8 *addr = hw->dev[port]->dev_addr; in sky2_mac_init()
916 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET); in sky2_mac_init()
917 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR); in sky2_mac_init()
919 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR); in sky2_mac_init()
921 if (hw->chip_id == CHIP_ID_YUKON_XL && in sky2_mac_init()
922 hw->chip_rev == CHIP_REV_YU_XL_A0 && in sky2_mac_init()
926 sky2_write8(hw, SK_REG(0, GMAC_CTRL), GMC_RST_CLR); in sky2_mac_init()
928 sky2_write8(hw, SK_REG(1, GMAC_CTRL), GMC_RST_SET); in sky2_mac_init()
929 sky2_write8(hw, SK_REG(1, GMAC_CTRL), GMC_RST_CLR); in sky2_mac_init()
930 } while (gm_phy_read(hw, 1, PHY_MARV_ID0) != PHY_MARV_ID0_VAL || in sky2_mac_init()
931 gm_phy_read(hw, 1, PHY_MARV_ID1) != PHY_MARV_ID1_Y2 || in sky2_mac_init()
932 gm_phy_read(hw, 1, PHY_MARV_INT_MASK) != 0); in sky2_mac_init()
935 sky2_read16(hw, SK_REG(port, GMAC_IRQ_SRC)); in sky2_mac_init()
938 sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), GMAC_DEF_MSK); in sky2_mac_init()
941 sky2_phy_power_up(hw, port); in sky2_mac_init()
942 sky2_phy_init(hw, port); in sky2_mac_init()
946 reg = gma_read16(hw, port, GM_PHY_ADDR); in sky2_mac_init()
947 gma_write16(hw, port, GM_PHY_ADDR, reg | GM_PAR_MIB_CLR); in sky2_mac_init()
950 gma_read16(hw, port, i); in sky2_mac_init()
951 gma_write16(hw, port, GM_PHY_ADDR, reg); in sky2_mac_init()
954 gma_write16(hw, port, GM_TX_CTRL, TX_COL_THR(TX_COL_DEF)); in sky2_mac_init()
957 gma_write16(hw, port, GM_RX_CTRL, in sky2_mac_init()
961 gma_write16(hw, port, GM_TX_FLOW_CTRL, 0xffff); in sky2_mac_init()
964 gma_write16(hw, port, GM_TX_PARAM, in sky2_mac_init()
974 if (hw->dev[port]->mtu > ETH_DATA_LEN) in sky2_mac_init()
977 if (hw->chip_id == CHIP_ID_YUKON_EC_U && in sky2_mac_init()
978 hw->chip_rev == CHIP_REV_YU_EC_U_B1) in sky2_mac_init()
981 gma_write16(hw, port, GM_SERIAL_MODE, reg); in sky2_mac_init()
984 gma_set_addr(hw, port, GM_SRC_ADDR_2L, addr); in sky2_mac_init()
987 gma_set_addr(hw, port, GM_SRC_ADDR_1L, addr); in sky2_mac_init()
990 gma_write16(hw, port, GM_TX_IRQ_MSK, 0); in sky2_mac_init()
991 gma_write16(hw, port, GM_RX_IRQ_MSK, 0); in sky2_mac_init()
992 gma_write16(hw, port, GM_TR_IRQ_MSK, 0); in sky2_mac_init()
995 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_CLR); in sky2_mac_init()
997 if (hw->chip_id == CHIP_ID_YUKON_EX || in sky2_mac_init()
998 hw->chip_id == CHIP_ID_YUKON_FE_P) in sky2_mac_init()
1001 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T), rx_reg); in sky2_mac_init()
1003 if (hw->chip_id == CHIP_ID_YUKON_XL) { in sky2_mac_init()
1005 sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), 0); in sky2_mac_init()
1008 sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), GMR_FS_ANY_ERR); in sky2_mac_init()
1014 if (hw->chip_id == CHIP_ID_YUKON_FE_P && in sky2_mac_init()
1015 hw->chip_rev == CHIP_REV_YU_FE2_A0) in sky2_mac_init()
1017 sky2_write16(hw, SK_REG(port, RX_GMF_FL_THR), reg); in sky2_mac_init()
1020 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_CLR); in sky2_mac_init()
1021 sky2_write16(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_OPER_ON); in sky2_mac_init()
1024 if (!(hw->flags & SKY2_HW_RAM_BUFFER)) { in sky2_mac_init()
1026 if (hw->chip_id == CHIP_ID_YUKON_FE_P && in sky2_mac_init()
1027 hw->chip_rev == CHIP_REV_YU_FE2_A0) in sky2_mac_init()
1031 sky2_write16(hw, SK_REG(port, RX_GMF_UP_THR), reg); in sky2_mac_init()
1032 sky2_write16(hw, SK_REG(port, RX_GMF_LP_THR), 768 / 8); in sky2_mac_init()
1034 sky2_set_tx_stfwd(hw, port); in sky2_mac_init()
1037 if (hw->chip_id == CHIP_ID_YUKON_FE_P && in sky2_mac_init()
1038 hw->chip_rev == CHIP_REV_YU_FE2_A0) { in sky2_mac_init()
1040 reg = sky2_read16(hw, SK_REG(port, TX_GMF_EA)); in sky2_mac_init()
1042 sky2_write16(hw, SK_REG(port, TX_GMF_EA), reg); in sky2_mac_init()
1047 static void sky2_ramset(struct sky2_hw *hw, u16 q, u32 start, u32 space) in sky2_ramset() argument
1056 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_RST_CLR); in sky2_ramset()
1057 sky2_write32(hw, RB_ADDR(q, RB_START), start); in sky2_ramset()
1058 sky2_write32(hw, RB_ADDR(q, RB_END), end); in sky2_ramset()
1059 sky2_write32(hw, RB_ADDR(q, RB_WP), start); in sky2_ramset()
1060 sky2_write32(hw, RB_ADDR(q, RB_RP), start); in sky2_ramset()
1069 sky2_write32(hw, RB_ADDR(q, RB_RX_UTHP), tp); in sky2_ramset()
1070 sky2_write32(hw, RB_ADDR(q, RB_RX_LTHP), space/2); in sky2_ramset()
1073 sky2_write32(hw, RB_ADDR(q, RB_RX_UTPP), tp); in sky2_ramset()
1074 sky2_write32(hw, RB_ADDR(q, RB_RX_LTPP), space/4); in sky2_ramset()
1079 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_STFWD); in sky2_ramset()
1082 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_OP_MD); in sky2_ramset()
1083 sky2_read8(hw, RB_ADDR(q, RB_CTRL)); in sky2_ramset()
1087 static void sky2_qset(struct sky2_hw *hw, u16 q) in sky2_qset() argument
1089 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_RESET); in sky2_qset()
1090 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_OPER_INIT); in sky2_qset()
1091 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_FIFO_OP_ON); in sky2_qset()
1092 sky2_write32(hw, Q_ADDR(q, Q_WM), BMU_WM_DEFAULT); in sky2_qset()
1098 static void sky2_prefetch_init(struct sky2_hw *hw, u32 qaddr, in sky2_prefetch_init() argument
1101 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_RST_SET); in sky2_prefetch_init()
1102 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_RST_CLR); in sky2_prefetch_init()
1103 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_ADDR_HI), upper_32_bits(addr)); in sky2_prefetch_init()
1104 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_ADDR_LO), lower_32_bits(addr)); in sky2_prefetch_init()
1105 sky2_write16(hw, Y2_QADDR(qaddr, PREF_UNIT_LAST_IDX), last); in sky2_prefetch_init()
1106 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_OP_ON); in sky2_prefetch_init()
1108 sky2_read32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL)); in sky2_prefetch_init()
1136 static inline void sky2_put_idx(struct sky2_hw *hw, unsigned q, u16 idx) in sky2_put_idx() argument
1140 sky2_write16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX), idx); in sky2_put_idx()
1287 sky2_write32(sky2->hw, in rx_set_checksum()
1297 struct sky2_hw *hw = sky2->hw; in rx_set_rss() local
1301 if (hw->flags & SKY2_HW_NEW_LE) { in rx_set_rss()
1303 sky2_write32(hw, SK_REG(sky2->port, RSS_CFG), HASH_ALL); in rx_set_rss()
1312 sky2_write32(hw, SK_REG(sky2->port, RSS_KEY + i * 4), in rx_set_rss()
1316 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), in rx_set_rss()
1319 sky2_write32(hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR), in rx_set_rss()
1322 sky2_write32(hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR), in rx_set_rss()
1338 struct sky2_hw *hw = sky2->hw; in sky2_rx_stop() local
1343 sky2_write8(hw, RB_ADDR(rxq, RB_CTRL), RB_DIS_OP_MD); in sky2_rx_stop()
1346 if (sky2_read8(hw, RB_ADDR(rxq, Q_RSL)) in sky2_rx_stop()
1347 == sky2_read8(hw, RB_ADDR(rxq, Q_RL))) in sky2_rx_stop()
1352 sky2_write32(hw, Q_ADDR(rxq, Q_CSR), BMU_RST_SET | BMU_FIFO_RST); in sky2_rx_stop()
1355 sky2_write32(hw, Y2_QADDR(rxq, PREF_UNIT_CTRL), PREF_UNIT_RST_SET); in sky2_rx_stop()
1371 sky2_rx_unmap_skb(sky2->hw->pdev, re); in sky2_rx_clean()
1383 struct sky2_hw *hw = sky2->hw; in sky2_ioctl() local
1398 err = __gm_phy_read(hw, sky2->port, data->reg_num & 0x1f, &val); in sky2_ioctl()
1407 err = gm_phy_write(hw, sky2->port, data->reg_num & 0x1f, in sky2_ioctl()
1420 struct sky2_hw *hw = sky2->hw; in sky2_vlan_mode() local
1424 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T), in sky2_vlan_mode()
1427 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T), in sky2_vlan_mode()
1431 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), in sky2_vlan_mode()
1436 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), in sky2_vlan_mode()
1445 static inline unsigned sky2_rx_pad(const struct sky2_hw *hw) in sky2_rx_pad() argument
1447 return (hw->flags & SKY2_HW_RAM_BUFFER) ? 8 : 2; in sky2_rx_pad()
1460 sky2->rx_data_size + sky2_rx_pad(sky2->hw), in sky2_rx_alloc()
1465 if (sky2->hw->flags & SKY2_HW_RAM_BUFFER) { in sky2_rx_alloc()
1495 sky2_put_idx(sky2->hw, rxq, sky2->rx_put); in sky2_rx_update()
1500 struct sky2_hw *hw = sky2->hw; in sky2_alloc_rx_skbs() local
1513 if (sky2_rx_map_skb(hw->pdev, re, sky2->rx_data_size)) { in sky2_alloc_rx_skbs()
1533 struct sky2_hw *hw = sky2->hw; in sky2_rx_start() local
1539 sky2_qset(hw, rxq); in sky2_rx_start()
1542 if (pci_is_pcie(hw->pdev)) in sky2_rx_start()
1543 sky2_write32(hw, Q_ADDR(rxq, Q_WM), BMU_WM_PEX); in sky2_rx_start()
1547 if (hw->chip_id == CHIP_ID_YUKON_EC_U && in sky2_rx_start()
1548 hw->chip_rev > CHIP_REV_YU_EC_U_A0) in sky2_rx_start()
1549 sky2_write32(hw, Q_ADDR(rxq, Q_TEST), F_M_RX_RAM_DIS); in sky2_rx_start()
1551 sky2_prefetch_init(hw, rxq, sky2->rx_le_map, RX_LE_SIZE - 1); in sky2_rx_start()
1553 if (!(hw->flags & SKY2_HW_NEW_LE)) in sky2_rx_start()
1556 if (!(hw->flags & SKY2_HW_RSS_BROKEN)) in sky2_rx_start()
1573 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_TRUNC_OFF); in sky2_rx_start()
1575 sky2_write16(hw, SK_REG(sky2->port, RX_GMF_TR_THR), thresh); in sky2_rx_start()
1576 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_TRUNC_ON); in sky2_rx_start()
1582 if (hw->chip_id == CHIP_ID_YUKON_EX || in sky2_rx_start()
1583 hw->chip_id == CHIP_ID_YUKON_SUPR) { in sky2_rx_start()
1591 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_MACSEC_FLUSH_OFF); in sky2_rx_start()
1594 if (hw->chip_id >= CHIP_ID_YUKON_SUPR) { in sky2_rx_start()
1596 sky2_write16(hw, SK_REG(sky2->port, RX_GMF_FL_CTRL), in sky2_rx_start()
1600 sky2_write32(hw, Q_ADDR(txqaddr[sky2->port], Q_TEST), in sky2_rx_start()
1607 struct sky2_hw *hw = sky2->hw; in sky2_alloc_buffers() local
1610 sky2->tx_le = pci_alloc_consistent(hw->pdev, in sky2_alloc_buffers()
1622 sky2->rx_le = pci_zalloc_consistent(hw->pdev, RX_LE_BYTES, in sky2_alloc_buffers()
1639 struct sky2_hw *hw = sky2->hw; in sky2_free_buffers() local
1644 pci_free_consistent(hw->pdev, RX_LE_BYTES, in sky2_free_buffers()
1649 pci_free_consistent(hw->pdev, in sky2_free_buffers()
1663 struct sky2_hw *hw = sky2->hw; in sky2_hw_up() local
1667 struct net_device *otherdev = hw->dev[sky2->port^1]; in sky2_hw_up()
1676 (cap = pci_find_capability(hw->pdev, PCI_CAP_ID_PCIX))) { in sky2_hw_up()
1679 cmd = sky2_pci_read16(hw, cap + PCI_X_CMD); in sky2_hw_up()
1681 sky2_pci_write16(hw, cap + PCI_X_CMD, cmd); in sky2_hw_up()
1684 sky2_mac_init(hw, port); in sky2_hw_up()
1687 ramsize = sky2_read8(hw, B2_E_0) * 4; in sky2_hw_up()
1697 sky2_ramset(hw, rxqaddr[port], 0, rxspace); in sky2_hw_up()
1698 sky2_ramset(hw, txqaddr[port], rxspace, ramsize - rxspace); in sky2_hw_up()
1701 sky2_write8(hw, RB_ADDR(port == 0 ? Q_XS1 : Q_XS2, RB_CTRL), in sky2_hw_up()
1705 sky2_qset(hw, txqaddr[port]); in sky2_hw_up()
1708 if (hw->chip_id == CHIP_ID_YUKON_EX && hw->chip_rev == CHIP_REV_YU_EX_B0) in sky2_hw_up()
1709 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_TEST), F_TX_CHK_AUTO_OFF); in sky2_hw_up()
1712 if (hw->chip_id == CHIP_ID_YUKON_EC_U && in sky2_hw_up()
1713 hw->chip_rev == CHIP_REV_YU_EC_U_A0) in sky2_hw_up()
1714 sky2_write16(hw, Q_ADDR(txqaddr[port], Q_AL), ECU_TXFF_LEV); in sky2_hw_up()
1716 sky2_prefetch_init(hw, txqaddr[port], sky2->tx_le_map, in sky2_hw_up()
1726 static int sky2_setup_irq(struct sky2_hw *hw, const char *name) in sky2_setup_irq() argument
1728 struct pci_dev *pdev = hw->pdev; in sky2_setup_irq()
1732 (hw->flags & SKY2_HW_USE_MSI) ? 0 : IRQF_SHARED, in sky2_setup_irq()
1733 name, hw); in sky2_setup_irq()
1737 hw->flags |= SKY2_HW_IRQ_SETUP; in sky2_setup_irq()
1739 napi_enable(&hw->napi); in sky2_setup_irq()
1740 sky2_write32(hw, B0_IMSK, Y2_IS_BASE); in sky2_setup_irq()
1741 sky2_read32(hw, B0_IMSK); in sky2_setup_irq()
1752 struct sky2_hw *hw = sky2->hw; in sky2_open() local
1764 if (hw->ports == 1 && (err = sky2_setup_irq(hw, dev->name))) in sky2_open()
1770 imask = sky2_read32(hw, B0_IMSK); in sky2_open()
1772 if (hw->chip_id == CHIP_ID_YUKON_OPT || in sky2_open()
1773 hw->chip_id == CHIP_ID_YUKON_PRM || in sky2_open()
1774 hw->chip_id == CHIP_ID_YUKON_OP_2) in sky2_open()
1778 sky2_write32(hw, B0_IMSK, imask); in sky2_open()
1779 sky2_read32(hw, B0_IMSK); in sky2_open()
1844 struct sky2_hw *hw = sky2->hw; in sky2_xmit_frame() local
1858 mapping = pci_map_single(hw->pdev, skb->data, len, PCI_DMA_TODEVICE); in sky2_xmit_frame()
1860 if (pci_dma_mapping_error(hw->pdev, mapping)) in sky2_xmit_frame()
1880 if (!(hw->flags & SKY2_HW_NEW_LE)) in sky2_xmit_frame()
1887 if (hw->flags & SKY2_HW_NEW_LE) in sky2_xmit_frame()
1912 if (hw->flags & SKY2_HW_AUTO_TX_SUM) in sky2_xmit_frame()
1952 mapping = skb_frag_dma_map(&hw->pdev->dev, frag, 0, in sky2_xmit_frame()
1955 if (dma_mapping_error(&hw->pdev->dev, mapping)) in sky2_xmit_frame()
1987 sky2_put_idx(hw, txqaddr[sky2->port], sky2->tx_prod); in sky2_xmit_frame()
1995 sky2_tx_unmap(hw->pdev, re); in sky2_xmit_frame()
2000 dev_warn(&hw->pdev->dev, "%s: tx mapping error\n", dev->name); in sky2_xmit_frame()
2028 sky2_tx_unmap(sky2->hw->pdev, re); in sky2_tx_complete()
2055 static void sky2_tx_reset(struct sky2_hw *hw, unsigned port) in sky2_tx_reset() argument
2058 sky2_write8(hw, SK_REG(port, TXA_CTRL), in sky2_tx_reset()
2062 sky2_write32(hw, SK_REG(port, TXA_ITI_INI), 0L); in sky2_tx_reset()
2063 sky2_write32(hw, SK_REG(port, TXA_LIM_INI), 0L); in sky2_tx_reset()
2066 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), in sky2_tx_reset()
2070 sky2_write32(hw, Y2_QADDR(txqaddr[port], PREF_UNIT_CTRL), in sky2_tx_reset()
2073 sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), RB_RST_SET); in sky2_tx_reset()
2074 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_SET); in sky2_tx_reset()
2076 sky2_read32(hw, B0_CTST); in sky2_tx_reset()
2081 struct sky2_hw *hw = sky2->hw; in sky2_hw_down() local
2086 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF); in sky2_hw_down()
2089 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_STOP); in sky2_hw_down()
2090 sky2_read32(hw, Q_ADDR(txqaddr[port], Q_CSR)); in sky2_hw_down()
2092 sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), in sky2_hw_down()
2095 ctrl = gma_read16(hw, port, GM_GP_CTRL); in sky2_hw_down()
2097 gma_write16(hw, port, GM_GP_CTRL, ctrl); in sky2_hw_down()
2099 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET); in sky2_hw_down()
2102 if (!(hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0 && in sky2_hw_down()
2103 port == 0 && hw->dev[1] && netif_running(hw->dev[1]))) in sky2_hw_down()
2104 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_SET); in sky2_hw_down()
2106 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET); in sky2_hw_down()
2109 sky2_write32(hw, STAT_LEV_TIMER_CNT, 0); in sky2_hw_down()
2110 sky2_write32(hw, STAT_TX_TIMER_CNT, 0); in sky2_hw_down()
2111 sky2_write32(hw, STAT_ISR_TIMER_CNT, 0); in sky2_hw_down()
2112 sky2_read8(hw, STAT_ISR_TIMER_CTRL); in sky2_hw_down()
2117 sky2_phy_power_down(hw, port); in sky2_hw_down()
2120 sky2_tx_reset(hw, port); in sky2_hw_down()
2130 struct sky2_hw *hw = sky2->hw; in sky2_close() local
2138 if (hw->ports == 1) { in sky2_close()
2139 sky2_write32(hw, B0_IMSK, 0); in sky2_close()
2140 sky2_read32(hw, B0_IMSK); in sky2_close()
2142 napi_disable(&hw->napi); in sky2_close()
2143 free_irq(hw->pdev->irq, hw); in sky2_close()
2144 hw->flags &= ~SKY2_HW_IRQ_SETUP; in sky2_close()
2149 imask = sky2_read32(hw, B0_IMSK); in sky2_close()
2151 sky2_write32(hw, B0_IMSK, imask); in sky2_close()
2152 sky2_read32(hw, B0_IMSK); in sky2_close()
2154 synchronize_irq(hw->pdev->irq); in sky2_close()
2155 napi_synchronize(&hw->napi); in sky2_close()
2165 static u16 sky2_phy_speed(const struct sky2_hw *hw, u16 aux) in sky2_phy_speed() argument
2167 if (hw->flags & SKY2_HW_FIBRE_PHY) in sky2_phy_speed()
2170 if (!(hw->flags & SKY2_HW_GIGABIT)) { in sky2_phy_speed()
2189 struct sky2_hw *hw = sky2->hw; in sky2_link_up() local
2202 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK); in sky2_link_up()
2206 mod_timer(&hw->watchdog_timer, jiffies + 1); in sky2_link_up()
2209 sky2_write8(hw, SK_REG(port, LNK_LED_REG), in sky2_link_up()
2221 struct sky2_hw *hw = sky2->hw; in sky2_link_down() local
2225 gm_phy_write(hw, port, PHY_MARV_INT_MASK, 0); in sky2_link_down()
2227 reg = gma_read16(hw, port, GM_GP_CTRL); in sky2_link_down()
2229 gma_write16(hw, port, GM_GP_CTRL, reg); in sky2_link_down()
2234 sky2_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_OFF); in sky2_link_down()
2238 sky2_phy_init(hw, port); in sky2_link_down()
2251 struct sky2_hw *hw = sky2->hw; in sky2_autoneg_done() local
2255 advert = gm_phy_read(hw, port, PHY_MARV_AUNE_ADV); in sky2_autoneg_done()
2256 lpa = gm_phy_read(hw, port, PHY_MARV_AUNE_LP); in sky2_autoneg_done()
2267 sky2->speed = sky2_phy_speed(hw, aux); in sky2_autoneg_done()
2273 if (hw->flags & SKY2_HW_FIBRE_PHY) { in sky2_autoneg_done()
2300 !(hw->chip_id == CHIP_ID_YUKON_EC_U || hw->chip_id == CHIP_ID_YUKON_EX)) in sky2_autoneg_done()
2304 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON); in sky2_autoneg_done()
2306 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF); in sky2_autoneg_done()
2312 static void sky2_phy_intr(struct sky2_hw *hw, unsigned port) in sky2_phy_intr() argument
2314 struct net_device *dev = hw->dev[port]; in sky2_phy_intr()
2322 istatus = gm_phy_read(hw, port, PHY_MARV_INT_STAT); in sky2_phy_intr()
2323 phystat = gm_phy_read(hw, port, PHY_MARV_PHY_STAT); in sky2_phy_intr()
2336 sky2->speed = sky2_phy_speed(hw, phystat); in sky2_phy_intr()
2353 static void sky2_qlink_intr(struct sky2_hw *hw) in sky2_qlink_intr() argument
2355 struct sky2_port *sky2 = netdev_priv(hw->dev[0]); in sky2_qlink_intr()
2360 imask = sky2_read32(hw, B0_IMSK); in sky2_qlink_intr()
2362 sky2_write32(hw, B0_IMSK, imask); in sky2_qlink_intr()
2365 phy = sky2_pci_read16(hw, PSM_CONFIG_REG4); in sky2_qlink_intr()
2366 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); in sky2_qlink_intr()
2367 sky2_pci_write16(hw, PSM_CONFIG_REG4, phy | 1); in sky2_qlink_intr()
2368 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); in sky2_qlink_intr()
2379 struct sky2_hw *hw = sky2->hw; in sky2_tx_timeout() local
2385 sky2_read16(hw, sky2->port == 0 ? STAT_TXA1_RIDX : STAT_TXA2_RIDX), in sky2_tx_timeout()
2386 sky2_read16(hw, Q_ADDR(txqaddr[sky2->port], Q_DONE))); in sky2_tx_timeout()
2389 schedule_work(&hw->restart_work); in sky2_tx_timeout()
2395 struct sky2_hw *hw = sky2->hw; in sky2_change_mtu() local
2407 (hw->chip_id == CHIP_ID_YUKON_FE || in sky2_change_mtu()
2408 hw->chip_id == CHIP_ID_YUKON_FE_P)) in sky2_change_mtu()
2417 imask = sky2_read32(hw, B0_IMSK); in sky2_change_mtu()
2418 sky2_write32(hw, B0_IMSK, 0); in sky2_change_mtu()
2419 sky2_read32(hw, B0_IMSK); in sky2_change_mtu()
2422 napi_disable(&hw->napi); in sky2_change_mtu()
2425 synchronize_irq(hw->pdev->irq); in sky2_change_mtu()
2427 if (!(hw->flags & SKY2_HW_RAM_BUFFER)) in sky2_change_mtu()
2428 sky2_set_tx_stfwd(hw, port); in sky2_change_mtu()
2430 ctl = gma_read16(hw, port, GM_GP_CTRL); in sky2_change_mtu()
2431 gma_write16(hw, port, GM_GP_CTRL, ctl & ~GM_GPCR_RX_ENA); in sky2_change_mtu()
2447 gma_write16(hw, port, GM_SERIAL_MODE, mode); in sky2_change_mtu()
2449 sky2_write8(hw, RB_ADDR(rxqaddr[port], RB_CTRL), RB_ENA_OP_MD); in sky2_change_mtu()
2456 sky2_write32(hw, B0_IMSK, imask); in sky2_change_mtu()
2458 sky2_read32(hw, B0_Y2_SP_LISR); in sky2_change_mtu()
2459 napi_enable(&hw->napi); in sky2_change_mtu()
2464 gma_write16(hw, port, GM_GP_CTRL, ctl); in sky2_change_mtu()
2492 pci_dma_sync_single_for_cpu(sky2->hw->pdev, re->data_addr, in receive_copy()
2501 pci_dma_sync_single_for_device(sky2->hw->pdev, re->data_addr, in receive_copy()
2558 if (sky2_rx_map_skb(sky2->hw->pdev, &nre, hdr_space)) in receive_new()
2562 sky2_rx_unmap_skb(sky2->hw->pdev, re); in receive_new()
2604 if (sky2->hw->chip_id == CHIP_ID_YUKON_FE_P && in sky2_receive()
2605 sky2->hw->chip_rev == CHIP_REV_YU_FE2_A0 && in sky2_receive()
2662 napi_gro_receive(&sky2->hw->napi, skb); in sky2_skb_rx()
2665 static inline void sky2_rx_done(struct sky2_hw *hw, unsigned port, in sky2_rx_done() argument
2668 struct net_device *dev = hw->dev[port]; in sky2_rx_done()
2686 BUG_ON(sky2->hw->flags & SKY2_HW_NEW_LE); in sky2_rx_checksum()
2698 dev_notice(&sky2->hw->pdev->dev, in sky2_rx_checksum()
2707 sky2_write32(sky2->hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR), in sky2_rx_checksum()
2729 static int sky2_status_intr(struct sky2_hw *hw, int to_do, u16 idx) in sky2_status_intr() argument
2741 struct sky2_status_le *le = hw->st_le + hw->st_idx; in sky2_status_intr()
2752 hw->st_idx = RING_NEXT(hw->st_idx, hw->st_size); in sky2_status_intr()
2755 dev = hw->dev[port]; in sky2_status_intr()
2771 if (hw->flags & SKY2_HW_NEW_LE) { in sky2_status_intr()
2806 sky2_tx_done(hw->dev[0], status & 0xfff); in sky2_status_intr()
2807 if (hw->dev[1]) in sky2_status_intr()
2808 sky2_tx_done(hw->dev[1], in sky2_status_intr()
2817 } while (hw->st_idx != idx); in sky2_status_intr()
2820 sky2_write32(hw, STAT_CTRL, SC_STAT_CLR_IRQ); in sky2_status_intr()
2823 sky2_rx_done(hw, 0, total_packets[0], total_bytes[0]); in sky2_status_intr()
2824 sky2_rx_done(hw, 1, total_packets[1], total_bytes[1]); in sky2_status_intr()
2829 static void sky2_hw_error(struct sky2_hw *hw, unsigned port, u32 status) in sky2_hw_error() argument
2831 struct net_device *dev = hw->dev[port]; in sky2_hw_error()
2840 sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_RD_PERR); in sky2_hw_error()
2847 sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_WR_PERR); in sky2_hw_error()
2853 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_PE); in sky2_hw_error()
2859 sky2_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), BMU_CLR_IRQ_PAR); in sky2_hw_error()
2865 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_CLR_IRQ_TCP); in sky2_hw_error()
2869 static void sky2_hw_intr(struct sky2_hw *hw) in sky2_hw_intr() argument
2871 struct pci_dev *pdev = hw->pdev; in sky2_hw_intr()
2872 u32 status = sky2_read32(hw, B0_HWE_ISRC); in sky2_hw_intr()
2873 u32 hwmsk = sky2_read32(hw, B0_HWE_IMSK); in sky2_hw_intr()
2878 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ); in sky2_hw_intr()
2883 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); in sky2_hw_intr()
2884 pci_err = sky2_pci_read16(hw, PCI_STATUS); in sky2_hw_intr()
2889 sky2_pci_write16(hw, PCI_STATUS, in sky2_hw_intr()
2891 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); in sky2_hw_intr()
2898 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); in sky2_hw_intr()
2899 err = sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS); in sky2_hw_intr()
2900 sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS, in sky2_hw_intr()
2905 sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS); in sky2_hw_intr()
2906 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); in sky2_hw_intr()
2910 sky2_hw_error(hw, 0, status); in sky2_hw_intr()
2913 sky2_hw_error(hw, 1, status); in sky2_hw_intr()
2916 static void sky2_mac_intr(struct sky2_hw *hw, unsigned port) in sky2_mac_intr() argument
2918 struct net_device *dev = hw->dev[port]; in sky2_mac_intr()
2920 u8 status = sky2_read8(hw, SK_REG(port, GMAC_IRQ_SRC)); in sky2_mac_intr()
2925 gma_read16(hw, port, GM_RX_IRQ_SRC); in sky2_mac_intr()
2928 gma_read16(hw, port, GM_TX_IRQ_SRC); in sky2_mac_intr()
2932 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_CLI_RX_FO); in sky2_mac_intr()
2937 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_FU); in sky2_mac_intr()
2942 static void sky2_le_error(struct sky2_hw *hw, unsigned port, u16 q) in sky2_le_error() argument
2944 struct net_device *dev = hw->dev[port]; in sky2_le_error()
2945 u16 idx = sky2_read16(hw, Y2_QADDR(q, PREF_UNIT_GET_IDX)); in sky2_le_error()
2947 dev_err(&hw->pdev->dev, "%s: descriptor error q=%#x get=%u put=%u\n", in sky2_le_error()
2949 (unsigned) sky2_read16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX))); in sky2_le_error()
2951 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_IRQ_CHK); in sky2_le_error()
2957 struct sky2_hw *hw = sky2->hw; in sky2_rx_hung() local
2960 u32 mac_rp = sky2_read32(hw, SK_REG(port, RX_GMF_RP)); in sky2_rx_hung()
2961 u8 mac_lev = sky2_read8(hw, SK_REG(port, RX_GMF_RLEV)); in sky2_rx_hung()
2962 u8 fifo_rp = sky2_read8(hw, Q_ADDR(rxq, Q_RP)); in sky2_rx_hung()
2963 u8 fifo_lev = sky2_read8(hw, Q_ADDR(rxq, Q_RL)); in sky2_rx_hung()
2975 fifo_rp, sky2_read8(hw, Q_ADDR(rxq, Q_WP))); in sky2_rx_hung()
2989 struct sky2_hw *hw = (struct sky2_hw *) arg; in sky2_watchdog() local
2992 if (sky2_read32(hw, B0_ISRC)) { in sky2_watchdog()
2993 napi_schedule(&hw->napi); in sky2_watchdog()
2997 for (i = 0; i < hw->ports; i++) { in sky2_watchdog()
2998 struct net_device *dev = hw->dev[i]; in sky2_watchdog()
3004 if ((hw->flags & SKY2_HW_RAM_BUFFER) && in sky2_watchdog()
3007 schedule_work(&hw->restart_work); in sky2_watchdog()
3016 mod_timer(&hw->watchdog_timer, round_jiffies(jiffies + HZ)); in sky2_watchdog()
3020 static void sky2_err_intr(struct sky2_hw *hw, u32 status) in sky2_err_intr() argument
3023 dev_warn(&hw->pdev->dev, "error interrupt status=%#x\n", status); in sky2_err_intr()
3026 sky2_hw_intr(hw); in sky2_err_intr()
3029 sky2_mac_intr(hw, 0); in sky2_err_intr()
3032 sky2_mac_intr(hw, 1); in sky2_err_intr()
3035 sky2_le_error(hw, 0, Q_R1); in sky2_err_intr()
3038 sky2_le_error(hw, 1, Q_R2); in sky2_err_intr()
3041 sky2_le_error(hw, 0, Q_XA1); in sky2_err_intr()
3044 sky2_le_error(hw, 1, Q_XA2); in sky2_err_intr()
3049 struct sky2_hw *hw = container_of(napi, struct sky2_hw, napi); in sky2_poll() local
3050 u32 status = sky2_read32(hw, B0_Y2_SP_EISR); in sky2_poll()
3055 sky2_err_intr(hw, status); in sky2_poll()
3058 sky2_phy_intr(hw, 0); in sky2_poll()
3061 sky2_phy_intr(hw, 1); in sky2_poll()
3064 sky2_qlink_intr(hw); in sky2_poll()
3066 while ((idx = sky2_read16(hw, STAT_PUT_IDX)) != hw->st_idx) { in sky2_poll()
3067 work_done += sky2_status_intr(hw, work_limit - work_done, idx); in sky2_poll()
3074 sky2_read32(hw, B0_Y2_SP_LISR); in sky2_poll()
3082 struct sky2_hw *hw = dev_id; in sky2_intr() local
3086 status = sky2_read32(hw, B0_Y2_SP_ISRC2); in sky2_intr()
3088 sky2_write32(hw, B0_Y2_SP_ICR, 2); in sky2_intr()
3092 prefetch(&hw->st_le[hw->st_idx]); in sky2_intr()
3094 napi_schedule(&hw->napi); in sky2_intr()
3104 napi_schedule(&sky2->hw->napi); in sky2_netpoll()
3109 static u32 sky2_mhz(const struct sky2_hw *hw) in sky2_mhz() argument
3111 switch (hw->chip_id) { in sky2_mhz()
3136 static inline u32 sky2_us2clk(const struct sky2_hw *hw, u32 us) in sky2_us2clk() argument
3138 return sky2_mhz(hw) * us; in sky2_us2clk()
3141 static inline u32 sky2_clk2us(const struct sky2_hw *hw, u32 clk) in sky2_clk2us() argument
3143 return clk / sky2_mhz(hw); in sky2_clk2us()
3147 static int sky2_init(struct sky2_hw *hw) in sky2_init() argument
3152 sky2_pci_write32(hw, PCI_DEV_REG3, 0); in sky2_init()
3154 sky2_write8(hw, B0_CTST, CS_RST_CLR); in sky2_init()
3156 hw->chip_id = sky2_read8(hw, B2_CHIP_ID); in sky2_init()
3157 hw->chip_rev = (sky2_read8(hw, B2_MAC_CFG) & CFG_CHIP_R_MSK) >> 4; in sky2_init()
3159 switch (hw->chip_id) { in sky2_init()
3161 hw->flags = SKY2_HW_GIGABIT | SKY2_HW_NEWER_PHY; in sky2_init()
3162 if (hw->chip_rev < CHIP_REV_YU_XL_A2) in sky2_init()
3163 hw->flags |= SKY2_HW_RSS_BROKEN; in sky2_init()
3167 hw->flags = SKY2_HW_GIGABIT in sky2_init()
3173 hw->flags = SKY2_HW_GIGABIT in sky2_init()
3180 if (hw->chip_rev != CHIP_REV_YU_EX_B0) in sky2_init()
3181 hw->flags |= SKY2_HW_AUTO_TX_SUM; in sky2_init()
3186 if (hw->chip_rev == CHIP_REV_YU_EC_A1) { in sky2_init()
3187 dev_err(&hw->pdev->dev, "unsupported revision Yukon-EC rev A1\n"); in sky2_init()
3190 hw->flags = SKY2_HW_GIGABIT | SKY2_HW_RSS_BROKEN; in sky2_init()
3194 hw->flags = SKY2_HW_RSS_BROKEN; in sky2_init()
3198 hw->flags = SKY2_HW_NEWER_PHY in sky2_init()
3204 if (hw->chip_rev == CHIP_REV_YU_FE2_A0) in sky2_init()
3205 hw->flags |= SKY2_HW_VLAN_BROKEN | SKY2_HW_RSS_CHKSUM; in sky2_init()
3209 hw->flags = SKY2_HW_GIGABIT in sky2_init()
3215 if (hw->chip_rev == CHIP_REV_YU_SU_A0) in sky2_init()
3216 hw->flags |= SKY2_HW_RSS_CHKSUM; in sky2_init()
3220 hw->flags = SKY2_HW_GIGABIT in sky2_init()
3227 hw->flags = SKY2_HW_GIGABIT in sky2_init()
3233 dev_err(&hw->pdev->dev, "unsupported chip type 0x%x\n", in sky2_init()
3234 hw->chip_id); in sky2_init()
3238 hw->pmd_type = sky2_read8(hw, B2_PMD_TYP); in sky2_init()
3239 if (hw->pmd_type == 'L' || hw->pmd_type == 'S' || hw->pmd_type == 'P') in sky2_init()
3240 hw->flags |= SKY2_HW_FIBRE_PHY; in sky2_init()
3242 hw->ports = 1; in sky2_init()
3243 t8 = sky2_read8(hw, B2_Y2_HW_RES); in sky2_init()
3245 if (!(sky2_read8(hw, B2_Y2_CLK_GATE) & Y2_STATUS_LNK2_INAC)) in sky2_init()
3246 ++hw->ports; in sky2_init()
3249 if (sky2_read8(hw, B2_E_0)) in sky2_init()
3250 hw->flags |= SKY2_HW_RAM_BUFFER; in sky2_init()
3255 static void sky2_reset(struct sky2_hw *hw) in sky2_reset() argument
3257 struct pci_dev *pdev = hw->pdev; in sky2_reset()
3263 if (hw->chip_id == CHIP_ID_YUKON_EX in sky2_reset()
3264 || hw->chip_id == CHIP_ID_YUKON_SUPR) { in sky2_reset()
3265 sky2_write32(hw, CPU_WDOG, 0); in sky2_reset()
3266 status = sky2_read16(hw, HCU_CCSR); in sky2_reset()
3275 sky2_write16(hw, HCU_CCSR, status); in sky2_reset()
3276 sky2_write32(hw, CPU_WDOG, 0); in sky2_reset()
3278 sky2_write8(hw, B28_Y2_ASF_STAT_CMD, Y2_ASF_RESET); in sky2_reset()
3279 sky2_write16(hw, B0_CTST, Y2_ASF_DISABLE); in sky2_reset()
3282 sky2_write8(hw, B0_CTST, CS_RST_SET); in sky2_reset()
3283 sky2_write8(hw, B0_CTST, CS_RST_CLR); in sky2_reset()
3286 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); in sky2_reset()
3289 status = sky2_pci_read16(hw, PCI_STATUS); in sky2_reset()
3291 sky2_pci_write16(hw, PCI_STATUS, status); in sky2_reset()
3293 sky2_write8(hw, B0_CTST, CS_MRST_CLR); in sky2_reset()
3296 sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS, in sky2_reset()
3300 if (sky2_read32(hw, B0_HWE_ISRC) & Y2_IS_PCI_EXP) in sky2_reset()
3306 sky2_power_on(hw); in sky2_reset()
3307 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); in sky2_reset()
3309 for (i = 0; i < hw->ports; i++) { in sky2_reset()
3310 sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET); in sky2_reset()
3311 sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_CLR); in sky2_reset()
3313 if (hw->chip_id == CHIP_ID_YUKON_EX || in sky2_reset()
3314 hw->chip_id == CHIP_ID_YUKON_SUPR) in sky2_reset()
3315 sky2_write16(hw, SK_REG(i, GMAC_CTRL), in sky2_reset()
3321 if (hw->chip_id == CHIP_ID_YUKON_SUPR && hw->chip_rev > CHIP_REV_YU_SU_B0) { in sky2_reset()
3323 sky2_pci_write32(hw, PCI_DEV_REG3, P_CLK_MACSEC_DIS); in sky2_reset()
3326 if (hw->chip_id == CHIP_ID_YUKON_OPT || in sky2_reset()
3327 hw->chip_id == CHIP_ID_YUKON_PRM || in sky2_reset()
3328 hw->chip_id == CHIP_ID_YUKON_OP_2) { in sky2_reset()
3331 if (hw->chip_id == CHIP_ID_YUKON_OPT && hw->chip_rev == 0) { in sky2_reset()
3333 sky2_write32(hw, Y2_PEX_PHY_DATA, (0x80UL << 16) | (1 << 7)); in sky2_reset()
3339 sky2_write32(hw, Y2_PEX_PHY_DATA, PEX_DB_ACCESS | (0x08UL << 16)); in sky2_reset()
3349 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); in sky2_reset()
3350 sky2_pci_write16(hw, PSM_CONFIG_REG4, reg); in sky2_reset()
3353 reg = sky2_pci_read16(hw, PSM_CONFIG_REG3); in sky2_reset()
3356 sky2_pci_write16(hw, pdev->pcie_cap + PCI_EXP_LNKCTL, in sky2_reset()
3359 if (hw->chip_id == CHIP_ID_YUKON_PRM && in sky2_reset()
3360 hw->chip_rev == CHIP_REV_YU_PRM_A0) { in sky2_reset()
3362 reg = sky2_read16(hw, GPHY_CTRL); in sky2_reset()
3363 sky2_write16(hw, GPHY_CTRL, reg | GPC_INTPOL); in sky2_reset()
3366 reg = sky2_read16(hw, Y2_CFG_SPC + PCI_LDO_CTRL); in sky2_reset()
3367 sky2_write16(hw, Y2_CFG_SPC + PCI_LDO_CTRL, reg | PHY_M_UNDOC1); in sky2_reset()
3370 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); in sky2_reset()
3373 sky2_write32(hw, Y2_PEX_PHY_DATA, PEX_DB_ACCESS | (0x08UL << 16)); in sky2_reset()
3377 sky2_write32(hw, B2_I2C_IRQ, 1); in sky2_reset()
3380 sky2_write8(hw, B2_TI_CTRL, TIM_STOP); in sky2_reset()
3381 sky2_write8(hw, B2_TI_CTRL, TIM_CLR_IRQ); in sky2_reset()
3384 sky2_write32(hw, B28_DPT_CTRL, DPT_STOP); in sky2_reset()
3387 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_STOP); in sky2_reset()
3388 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ); in sky2_reset()
3391 for (i = 0; i < hw->ports; i++) in sky2_reset()
3392 sky2_write8(hw, SK_REG(i, TXA_CTRL), TXA_ENA_ARB); in sky2_reset()
3395 for (i = 0; i < hw->ports; i++) { in sky2_reset()
3396 sky2_write8(hw, RAM_BUFFER(i, B3_RI_CTRL), RI_RST_CLR); in sky2_reset()
3398 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_R1), SK_RI_TO_53); in sky2_reset()
3399 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XA1), SK_RI_TO_53); in sky2_reset()
3400 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XS1), SK_RI_TO_53); in sky2_reset()
3401 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_R1), SK_RI_TO_53); in sky2_reset()
3402 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XA1), SK_RI_TO_53); in sky2_reset()
3403 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS1), SK_RI_TO_53); in sky2_reset()
3404 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_R2), SK_RI_TO_53); in sky2_reset()
3405 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XA2), SK_RI_TO_53); in sky2_reset()
3406 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XS2), SK_RI_TO_53); in sky2_reset()
3407 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_R2), SK_RI_TO_53); in sky2_reset()
3408 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XA2), SK_RI_TO_53); in sky2_reset()
3409 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS2), SK_RI_TO_53); in sky2_reset()
3412 sky2_write32(hw, B0_HWE_IMSK, hwe_mask); in sky2_reset()
3414 for (i = 0; i < hw->ports; i++) in sky2_reset()
3415 sky2_gmac_reset(hw, i); in sky2_reset()
3417 memset(hw->st_le, 0, hw->st_size * sizeof(struct sky2_status_le)); in sky2_reset()
3418 hw->st_idx = 0; in sky2_reset()
3420 sky2_write32(hw, STAT_CTRL, SC_STAT_RST_SET); in sky2_reset()
3421 sky2_write32(hw, STAT_CTRL, SC_STAT_RST_CLR); in sky2_reset()
3423 sky2_write32(hw, STAT_LIST_ADDR_LO, hw->st_dma); in sky2_reset()
3424 sky2_write32(hw, STAT_LIST_ADDR_HI, (u64) hw->st_dma >> 32); in sky2_reset()
3427 sky2_write16(hw, STAT_LAST_IDX, hw->st_size - 1); in sky2_reset()
3429 sky2_write16(hw, STAT_TX_IDX_TH, 10); in sky2_reset()
3430 sky2_write8(hw, STAT_FIFO_WM, 16); in sky2_reset()
3433 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0) in sky2_reset()
3434 sky2_write8(hw, STAT_FIFO_ISR_WM, 4); in sky2_reset()
3436 sky2_write8(hw, STAT_FIFO_ISR_WM, 16); in sky2_reset()
3438 sky2_write32(hw, STAT_TX_TIMER_INI, sky2_us2clk(hw, 1000)); in sky2_reset()
3439 sky2_write32(hw, STAT_ISR_TIMER_INI, sky2_us2clk(hw, 20)); in sky2_reset()
3440 sky2_write32(hw, STAT_LEV_TIMER_INI, sky2_us2clk(hw, 100)); in sky2_reset()
3443 sky2_write32(hw, STAT_CTRL, SC_STAT_OP_ON); in sky2_reset()
3445 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START); in sky2_reset()
3446 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START); in sky2_reset()
3447 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START); in sky2_reset()
3483 static void sky2_all_down(struct sky2_hw *hw) in sky2_all_down() argument
3487 if (hw->flags & SKY2_HW_IRQ_SETUP) { in sky2_all_down()
3488 sky2_write32(hw, B0_IMSK, 0); in sky2_all_down()
3489 sky2_read32(hw, B0_IMSK); in sky2_all_down()
3491 synchronize_irq(hw->pdev->irq); in sky2_all_down()
3492 napi_disable(&hw->napi); in sky2_all_down()
3495 for (i = 0; i < hw->ports; i++) { in sky2_all_down()
3496 struct net_device *dev = hw->dev[i]; in sky2_all_down()
3508 static void sky2_all_up(struct sky2_hw *hw) in sky2_all_up() argument
3513 for (i = 0; i < hw->ports; i++) { in sky2_all_up()
3514 struct net_device *dev = hw->dev[i]; in sky2_all_up()
3526 if (hw->flags & SKY2_HW_IRQ_SETUP) { in sky2_all_up()
3527 sky2_write32(hw, B0_IMSK, imask); in sky2_all_up()
3528 sky2_read32(hw, B0_IMSK); in sky2_all_up()
3529 sky2_read32(hw, B0_Y2_SP_LISR); in sky2_all_up()
3530 napi_enable(&hw->napi); in sky2_all_up()
3536 struct sky2_hw *hw = container_of(work, struct sky2_hw, restart_work); in sky2_restart() local
3540 sky2_all_down(hw); in sky2_restart()
3541 sky2_reset(hw); in sky2_restart()
3542 sky2_all_up(hw); in sky2_restart()
3547 static inline u8 sky2_wol_supported(const struct sky2_hw *hw) in sky2_wol_supported() argument
3549 return sky2_is_copper(hw) ? (WAKE_PHY | WAKE_MAGIC) : 0; in sky2_wol_supported()
3556 wol->supported = sky2_wol_supported(sky2->hw); in sky2_get_wol()
3563 struct sky2_hw *hw = sky2->hw; in sky2_set_wol() local
3567 if ((wol->wolopts & ~sky2_wol_supported(sky2->hw)) || in sky2_set_wol()
3568 !device_can_wakeup(&hw->pdev->dev)) in sky2_set_wol()
3573 for (i = 0; i < hw->ports; i++) { in sky2_set_wol()
3574 struct net_device *dev = hw->dev[i]; in sky2_set_wol()
3580 device_set_wakeup_enable(&hw->pdev->dev, enable_wakeup); in sky2_set_wol()
3585 static u32 sky2_supported_modes(const struct sky2_hw *hw) in sky2_supported_modes() argument
3587 if (sky2_is_copper(hw)) { in sky2_supported_modes()
3593 if (hw->flags & SKY2_HW_GIGABIT) in sky2_supported_modes()
3605 struct sky2_hw *hw = sky2->hw; in sky2_get_settings() local
3608 ecmd->supported = sky2_supported_modes(hw); in sky2_get_settings()
3610 if (sky2_is_copper(hw)) { in sky2_get_settings()
3630 const struct sky2_hw *hw = sky2->hw; in sky2_set_settings() local
3631 u32 supported = sky2_supported_modes(hw); in sky2_set_settings()
3637 if (sky2_is_copper(hw)) in sky2_set_settings()
3706 strlcpy(info->bus_info, pci_name(sky2->hw->pdev), in sky2_get_drvinfo()
3775 struct sky2_hw *hw = sky2->hw; in sky2_phy_stats() local
3779 data[0] = get_stats64(hw, port, GM_TXO_OK_LO); in sky2_phy_stats()
3780 data[1] = get_stats64(hw, port, GM_RXO_OK_LO); in sky2_phy_stats()
3783 data[i] = get_stats32(hw, port, sky2_stats[i].offset); in sky2_phy_stats()
3826 struct sky2_hw *hw = sky2->hw; in sky2_set_mac_address() local
3834 memcpy_toio(hw->regs + B2_MAC_1 + port * 8, in sky2_set_mac_address()
3836 memcpy_toio(hw->regs + B2_MAC_2 + port * 8, in sky2_set_mac_address()
3840 gma_set_addr(hw, port, GM_SRC_ADDR_2L, dev->dev_addr); in sky2_set_mac_address()
3843 gma_set_addr(hw, port, GM_SRC_ADDR_1L, dev->dev_addr); in sky2_set_mac_address()
3859 struct sky2_hw *hw = sky2->hw; in sky2_set_multicast() local
3870 reg = gma_read16(hw, port, GM_RX_CTRL); in sky2_set_multicast()
3889 gma_write16(hw, port, GM_MC_ADDR_H1, in sky2_set_multicast()
3891 gma_write16(hw, port, GM_MC_ADDR_H2, in sky2_set_multicast()
3893 gma_write16(hw, port, GM_MC_ADDR_H3, in sky2_set_multicast()
3895 gma_write16(hw, port, GM_MC_ADDR_H4, in sky2_set_multicast()
3898 gma_write16(hw, port, GM_RX_CTRL, reg); in sky2_set_multicast()
3905 struct sky2_hw *hw = sky2->hw; in sky2_get_stats() local
3928 stats->multicast = get_stats32(hw, port, GM_RXF_MC_OK) in sky2_get_stats()
3929 + get_stats32(hw, port, GM_RXF_BC_OK); in sky2_get_stats()
3931 stats->collisions = get_stats32(hw, port, GM_TXF_COL); in sky2_get_stats()
3933 stats->rx_length_errors = get_stats32(hw, port, GM_RXF_LNG_ERR); in sky2_get_stats()
3934 stats->rx_crc_errors = get_stats32(hw, port, GM_RXF_FCS_ERR); in sky2_get_stats()
3935 stats->rx_frame_errors = get_stats32(hw, port, GM_RXF_SHT) in sky2_get_stats()
3936 + get_stats32(hw, port, GM_RXE_FRAG); in sky2_get_stats()
3937 stats->rx_over_errors = get_stats32(hw, port, GM_RXE_FIFO_OV); in sky2_get_stats()
3951 struct sky2_hw *hw = sky2->hw; in sky2_led() local
3955 if (hw->chip_id == CHIP_ID_YUKON_EC_U || in sky2_led()
3956 hw->chip_id == CHIP_ID_YUKON_EX || in sky2_led()
3957 hw->chip_id == CHIP_ID_YUKON_SUPR) { in sky2_led()
3959 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR); in sky2_led()
3960 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3); in sky2_led()
3964 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, in sky2_led()
3971 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, in sky2_led()
3978 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, in sky2_led()
3985 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, in sky2_led()
3992 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg); in sky2_led()
3994 gm_phy_write(hw, port, PHY_MARV_LED_OVER, in sky2_led()
4073 struct sky2_hw *hw = sky2->hw; in sky2_get_coalesce() local
4075 if (sky2_read8(hw, STAT_TX_TIMER_CTRL) == TIM_STOP) in sky2_get_coalesce()
4078 u32 clks = sky2_read32(hw, STAT_TX_TIMER_INI); in sky2_get_coalesce()
4079 ecmd->tx_coalesce_usecs = sky2_clk2us(hw, clks); in sky2_get_coalesce()
4081 ecmd->tx_max_coalesced_frames = sky2_read16(hw, STAT_TX_IDX_TH); in sky2_get_coalesce()
4083 if (sky2_read8(hw, STAT_LEV_TIMER_CTRL) == TIM_STOP) in sky2_get_coalesce()
4086 u32 clks = sky2_read32(hw, STAT_LEV_TIMER_INI); in sky2_get_coalesce()
4087 ecmd->rx_coalesce_usecs = sky2_clk2us(hw, clks); in sky2_get_coalesce()
4089 ecmd->rx_max_coalesced_frames = sky2_read8(hw, STAT_FIFO_WM); in sky2_get_coalesce()
4091 if (sky2_read8(hw, STAT_ISR_TIMER_CTRL) == TIM_STOP) in sky2_get_coalesce()
4094 u32 clks = sky2_read32(hw, STAT_ISR_TIMER_INI); in sky2_get_coalesce()
4095 ecmd->rx_coalesce_usecs_irq = sky2_clk2us(hw, clks); in sky2_get_coalesce()
4098 ecmd->rx_max_coalesced_frames_irq = sky2_read8(hw, STAT_FIFO_ISR_WM); in sky2_get_coalesce()
4108 struct sky2_hw *hw = sky2->hw; in sky2_set_coalesce() local
4109 const u32 tmax = sky2_clk2us(hw, 0x0ffffff); in sky2_set_coalesce()
4124 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_STOP); in sky2_set_coalesce()
4126 sky2_write32(hw, STAT_TX_TIMER_INI, in sky2_set_coalesce()
4127 sky2_us2clk(hw, ecmd->tx_coalesce_usecs)); in sky2_set_coalesce()
4128 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START); in sky2_set_coalesce()
4130 sky2_write16(hw, STAT_TX_IDX_TH, ecmd->tx_max_coalesced_frames); in sky2_set_coalesce()
4133 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_STOP); in sky2_set_coalesce()
4135 sky2_write32(hw, STAT_LEV_TIMER_INI, in sky2_set_coalesce()
4136 sky2_us2clk(hw, ecmd->rx_coalesce_usecs)); in sky2_set_coalesce()
4137 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START); in sky2_set_coalesce()
4139 sky2_write8(hw, STAT_FIFO_WM, ecmd->rx_max_coalesced_frames); in sky2_set_coalesce()
4142 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_STOP); in sky2_set_coalesce()
4144 sky2_write32(hw, STAT_ISR_TIMER_INI, in sky2_set_coalesce()
4145 sky2_us2clk(hw, ecmd->rx_coalesce_usecs_irq)); in sky2_set_coalesce()
4146 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START); in sky2_set_coalesce()
4148 sky2_write8(hw, STAT_FIFO_ISR_WM, ecmd->rx_max_coalesced_frames_irq); in sky2_set_coalesce()
4199 static int sky2_reg_access_ok(struct sky2_hw *hw, unsigned int b) in sky2_reg_access_ok() argument
4218 return hw->ports > 1; in sky2_reg_access_ok()
4251 const void __iomem *io = sky2->hw->regs; in sky2_get_regs()
4260 else if (sky2_reg_access_ok(sky2->hw, b)) in sky2_get_regs()
4273 struct sky2_hw *hw = sky2->hw; in sky2_get_eeprom_len() local
4276 reg2 = sky2_pci_read16(hw, PCI_DEV_REG2); in sky2_get_eeprom_len()
4280 static int sky2_vpd_wait(const struct sky2_hw *hw, int cap, u16 busy) in sky2_vpd_wait() argument
4284 while ( (sky2_pci_read16(hw, cap + PCI_VPD_ADDR) & PCI_VPD_ADDR_F) == busy) { in sky2_vpd_wait()
4287 dev_err(&hw->pdev->dev, "VPD cycle timed out\n"); in sky2_vpd_wait()
4296 static int sky2_vpd_read(struct sky2_hw *hw, int cap, void *data, in sky2_vpd_read() argument
4304 sky2_pci_write16(hw, cap + PCI_VPD_ADDR, offset); in sky2_vpd_read()
4305 rc = sky2_vpd_wait(hw, cap, 0); in sky2_vpd_read()
4309 val = sky2_pci_read32(hw, cap + PCI_VPD_DATA); in sky2_vpd_read()
4320 static int sky2_vpd_write(struct sky2_hw *hw, int cap, const void *data, in sky2_vpd_write() argument
4329 sky2_pci_write32(hw, cap + PCI_VPD_DATA, val); in sky2_vpd_write()
4330 sky2_pci_write32(hw, cap + PCI_VPD_ADDR, offset | PCI_VPD_ADDR_F); in sky2_vpd_write()
4332 rc = sky2_vpd_wait(hw, cap, PCI_VPD_ADDR_F); in sky2_vpd_write()
4343 int cap = pci_find_capability(sky2->hw->pdev, PCI_CAP_ID_VPD); in sky2_get_eeprom()
4350 return sky2_vpd_read(sky2->hw, cap, data, eeprom->offset, eeprom->len); in sky2_get_eeprom()
4357 int cap = pci_find_capability(sky2->hw->pdev, PCI_CAP_ID_VPD); in sky2_set_eeprom()
4369 return sky2_vpd_write(sky2->hw, cap, data, eeprom->offset, eeprom->len); in sky2_set_eeprom()
4376 const struct sky2_hw *hw = sky2->hw; in sky2_fix_features() local
4381 if (dev->mtu > ETH_DATA_LEN && hw->chip_id == CHIP_ID_YUKON_EC_U) { in sky2_fix_features()
4389 (sky2->hw->flags & SKY2_HW_RSS_CHKSUM)) { in sky2_fix_features()
4403 !(sky2->hw->flags & SKY2_HW_NEW_LE)) { in sky2_set_features()
4404 sky2_write32(sky2->hw, in sky2_set_features()
4472 static void sky2_show_vpd(struct seq_file *seq, struct sky2_hw *hw) in sky2_show_vpd() argument
4480 reg2 = sky2_pci_read16(hw, PCI_DEV_REG2); in sky2_show_vpd()
4483 seq_printf(seq, "%s Product Data\n", pci_name(hw->pdev)); in sky2_show_vpd()
4490 if (pci_read_vpd(hw->pdev, 0, vpd_size, buf) < 0) { in sky2_show_vpd()
4534 struct sky2_hw *hw = sky2->hw; in sky2_debug_show() local
4539 sky2_show_vpd(seq, hw); in sky2_debug_show()
4542 sky2_read32(hw, B0_ISRC), in sky2_debug_show()
4543 sky2_read32(hw, B0_IMSK), in sky2_debug_show()
4544 sky2_read32(hw, B0_Y2_SP_ICR)); in sky2_debug_show()
4551 napi_disable(&hw->napi); in sky2_debug_show()
4552 last = sky2_read16(hw, STAT_PUT_IDX); in sky2_debug_show()
4554 seq_printf(seq, "Status ring %u\n", hw->st_size); in sky2_debug_show()
4555 if (hw->st_idx == last) in sky2_debug_show()
4559 for (idx = hw->st_idx; idx != last && idx < hw->st_size; in sky2_debug_show()
4560 idx = RING_NEXT(idx, hw->st_size)) { in sky2_debug_show()
4561 const struct sky2_status_le *le = hw->st_le + idx; in sky2_debug_show()
4570 sky2_read16(hw, port == 0 ? STAT_TXA1_RIDX : STAT_TXA2_RIDX), in sky2_debug_show()
4571 sky2_read16(hw, Q_ADDR(txqaddr[port], Q_DONE))); in sky2_debug_show()
4618 sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_GET_IDX)), in sky2_debug_show()
4619 sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_PUT_IDX)), in sky2_debug_show()
4620 sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_LAST_IDX))); in sky2_debug_show()
4622 sky2_read32(hw, B0_Y2_SP_LISR); in sky2_debug_show()
4623 napi_enable(&hw->napi); in sky2_debug_show()
4748 static struct net_device *sky2_init_netdev(struct sky2_hw *hw, unsigned port, in sky2_init_netdev() argument
4758 SET_NETDEV_DEV(dev, &hw->pdev->dev); in sky2_init_netdev()
4759 dev->irq = hw->pdev->irq; in sky2_init_netdev()
4766 sky2->hw = hw; in sky2_init_netdev()
4774 if (hw->chip_id != CHIP_ID_YUKON_XL) in sky2_init_netdev()
4781 sky2->advertising = sky2_supported_modes(hw); in sky2_init_netdev()
4790 hw->dev[port] = dev; in sky2_init_netdev()
4800 if (!(hw->flags & SKY2_HW_RSS_BROKEN)) in sky2_init_netdev()
4803 if (!(hw->flags & SKY2_HW_VLAN_BROKEN)) { in sky2_init_netdev()
4815 iap = of_get_mac_address(hw->pdev->dev.of_node); in sky2_init_netdev()
4819 memcpy_fromio(dev->dev_addr, hw->regs + B2_MAC_1 + port * 8, in sky2_init_netdev()
4847 struct sky2_hw *hw = dev_id; in sky2_test_intr() local
4848 u32 status = sky2_read32(hw, B0_Y2_SP_ISRC2); in sky2_test_intr()
4854 hw->flags |= SKY2_HW_USE_MSI; in sky2_test_intr()
4855 wake_up(&hw->msi_wait); in sky2_test_intr()
4856 sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ); in sky2_test_intr()
4858 sky2_write32(hw, B0_Y2_SP_ICR, 2); in sky2_test_intr()
4864 static int sky2_test_msi(struct sky2_hw *hw) in sky2_test_msi() argument
4866 struct pci_dev *pdev = hw->pdev; in sky2_test_msi()
4869 init_waitqueue_head(&hw->msi_wait); in sky2_test_msi()
4871 err = request_irq(pdev->irq, sky2_test_intr, 0, DRV_NAME, hw); in sky2_test_msi()
4877 sky2_write32(hw, B0_IMSK, Y2_IS_IRQ_SW); in sky2_test_msi()
4879 sky2_write8(hw, B0_CTST, CS_ST_SW_IRQ); in sky2_test_msi()
4880 sky2_read8(hw, B0_CTST); in sky2_test_msi()
4882 wait_event_timeout(hw->msi_wait, (hw->flags & SKY2_HW_USE_MSI), HZ/10); in sky2_test_msi()
4884 if (!(hw->flags & SKY2_HW_USE_MSI)) { in sky2_test_msi()
4890 sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ); in sky2_test_msi()
4893 sky2_write32(hw, B0_IMSK, 0); in sky2_test_msi()
4894 sky2_read32(hw, B0_IMSK); in sky2_test_msi()
4896 free_irq(pdev->irq, hw); in sky2_test_msi()
4929 struct sky2_hw *hw; in sky2_probe() local
4999 hw = kzalloc(sizeof(*hw) + strlen(DRV_NAME "@pci:") in sky2_probe()
5001 if (!hw) in sky2_probe()
5004 hw->pdev = pdev; in sky2_probe()
5005 sprintf(hw->irq_name, DRV_NAME "@pci:%s", pci_name(pdev)); in sky2_probe()
5007 hw->regs = ioremap_nocache(pci_resource_start(pdev, 0), 0x4000); in sky2_probe()
5008 if (!hw->regs) { in sky2_probe()
5013 err = sky2_init(hw); in sky2_probe()
5018 hw->st_size = hw->ports * roundup_pow_of_two(3*RX_MAX_PENDING + TX_MAX_PENDING); in sky2_probe()
5019 hw->st_le = pci_alloc_consistent(pdev, hw->st_size * sizeof(struct sky2_status_le), in sky2_probe()
5020 &hw->st_dma); in sky2_probe()
5021 if (!hw->st_le) { in sky2_probe()
5027 sky2_name(hw->chip_id, buf1, sizeof(buf1)), hw->chip_rev); in sky2_probe()
5029 sky2_reset(hw); in sky2_probe()
5031 dev = sky2_init_netdev(hw, 0, using_dac, wol_default); in sky2_probe()
5038 err = sky2_test_msi(hw); in sky2_probe()
5046 netif_napi_add(dev, &hw->napi, sky2_poll, NAPI_WEIGHT); in sky2_probe()
5058 if (hw->ports > 1) { in sky2_probe()
5059 dev1 = sky2_init_netdev(hw, 1, using_dac, wol_default); in sky2_probe()
5071 err = sky2_setup_irq(hw, hw->irq_name); in sky2_probe()
5078 setup_timer(&hw->watchdog_timer, sky2_watchdog, (unsigned long) hw); in sky2_probe()
5079 INIT_WORK(&hw->restart_work, sky2_restart); in sky2_probe()
5081 pci_set_drvdata(pdev, hw); in sky2_probe()
5093 if (hw->flags & SKY2_HW_USE_MSI) in sky2_probe()
5097 pci_free_consistent(pdev, hw->st_size * sizeof(struct sky2_status_le), in sky2_probe()
5098 hw->st_le, hw->st_dma); in sky2_probe()
5100 sky2_write8(hw, B0_CTST, CS_RST_SET); in sky2_probe()
5102 iounmap(hw->regs); in sky2_probe()
5104 kfree(hw); in sky2_probe()
5115 struct sky2_hw *hw = pci_get_drvdata(pdev); in sky2_remove() local
5118 if (!hw) in sky2_remove()
5121 del_timer_sync(&hw->watchdog_timer); in sky2_remove()
5122 cancel_work_sync(&hw->restart_work); in sky2_remove()
5124 for (i = hw->ports-1; i >= 0; --i) in sky2_remove()
5125 unregister_netdev(hw->dev[i]); in sky2_remove()
5127 sky2_write32(hw, B0_IMSK, 0); in sky2_remove()
5128 sky2_read32(hw, B0_IMSK); in sky2_remove()
5130 sky2_power_aux(hw); in sky2_remove()
5132 sky2_write8(hw, B0_CTST, CS_RST_SET); in sky2_remove()
5133 sky2_read8(hw, B0_CTST); in sky2_remove()
5135 if (hw->ports > 1) { in sky2_remove()
5136 napi_disable(&hw->napi); in sky2_remove()
5137 free_irq(pdev->irq, hw); in sky2_remove()
5140 if (hw->flags & SKY2_HW_USE_MSI) in sky2_remove()
5142 pci_free_consistent(pdev, hw->st_size * sizeof(struct sky2_status_le), in sky2_remove()
5143 hw->st_le, hw->st_dma); in sky2_remove()
5147 for (i = hw->ports-1; i >= 0; --i) in sky2_remove()
5148 free_netdev(hw->dev[i]); in sky2_remove()
5150 iounmap(hw->regs); in sky2_remove()
5151 kfree(hw); in sky2_remove()
5157 struct sky2_hw *hw = pci_get_drvdata(pdev); in sky2_suspend() local
5160 if (!hw) in sky2_suspend()
5163 del_timer_sync(&hw->watchdog_timer); in sky2_suspend()
5164 cancel_work_sync(&hw->restart_work); in sky2_suspend()
5168 sky2_all_down(hw); in sky2_suspend()
5169 for (i = 0; i < hw->ports; i++) { in sky2_suspend()
5170 struct net_device *dev = hw->dev[i]; in sky2_suspend()
5177 sky2_power_aux(hw); in sky2_suspend()
5187 struct sky2_hw *hw = pci_get_drvdata(pdev); in sky2_resume() local
5190 if (!hw) in sky2_resume()
5201 sky2_reset(hw); in sky2_resume()
5202 sky2_all_up(hw); in sky2_resume()