190 		skge_write32(hw, B2_GP_IO, reg);  in skge_wol_init()
193 	skge_write32(hw, SK_REG(port, GPHY_CTRL),  in skge_wol_init()
198 	skge_write32(hw, SK_REG(port, GPHY_CTRL),  in skge_wol_init()
203 	skge_write32(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);  in skge_wol_init()
669 	skge_write32(hw, B2_IRQM_MSK, msk);  in skge_set_coalesce()
671 		skge_write32(hw, B2_IRQM_CTRL, TIM_STOP);  in skge_set_coalesce()
673 		skge_write32(hw, B2_IRQM_INI, skge_usecs2clk(hw, delay));  in skge_set_coalesce()
674 		skge_write32(hw, B2_IRQM_CTRL, TIM_START);  in skge_set_coalesce()
692 				skge_write32(hw, SK_REG(port, TX_LED_VAL), 0);  in skge_led()
696 			skge_write32(hw, SK_REG(port, RX_LED_VAL), 0);  in skge_led()
711 			skge_write32(hw, SK_REG(port, RX_LED_VAL), 100);  in skge_led()
718 				skge_write32(hw, SK_REG(port, TX_LED_VAL), 100);  in skge_led()
1139 	skge_write32(hw, B2_BSC_INI, (SK_BLK_DUR * SK_FACT_53) / 100);  in genesis_init()
1560 		skge_write32(hw, B2_GP_IO, r);  in genesis_mac_init()
1718 		skge_write32(hw, B2_GP_IO, reg);  in genesis_stop()
2051 	skge_write32(hw, B2_FAR, reg);  in is_yukon_lite_a0()
2067 		skge_write32(hw, B2_GP_IO, reg);  in yukon_mac_init()
2071 	skge_write32(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET);  in yukon_mac_init()
2072 	skge_write32(hw, SK_REG(port, GMAC_CTRL), GMC_RST_SET);  in yukon_mac_init()
2080 		skge_write32(hw, B2_GP_IO, reg);  in yukon_mac_init()
2089 	skge_write32(hw, SK_REG(port, GPHY_CTRL), reg | GPC_RST_SET);  in yukon_mac_init()
2090 	skge_write32(hw, SK_REG(port, GPHY_CTRL), reg | GPC_RST_CLR);  in yukon_mac_init()
2091 	skge_write32(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON | GMC_RST_CLR);  in yukon_mac_init()
2119 		skge_write32(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);  in yukon_mac_init()
2486 	skge_write32(hw, RB_ADDR(q, RB_START), start);  in skge_ramset()
2487 	skge_write32(hw, RB_ADDR(q, RB_WP), start);  in skge_ramset()
2488 	skge_write32(hw, RB_ADDR(q, RB_RP), start);  in skge_ramset()
2489 	skge_write32(hw, RB_ADDR(q, RB_END), end);  in skge_ramset()
2493 		skge_write32(hw, RB_ADDR(q, RB_RX_UTPP),  in skge_ramset()
2495 		skge_write32(hw, RB_ADDR(q, RB_RX_LTPP),  in skge_ramset()
2519 	skge_write32(hw, Q_ADDR(q, Q_CSR), CSR_CLR_RESET);  in skge_qset()
2520 	skge_write32(hw, Q_ADDR(q, Q_F), watermark);  in skge_qset()
2521 	skge_write32(hw, Q_ADDR(q, Q_DA_H), (u32)(base >> 32));  in skge_qset()
2522 	skge_write32(hw, Q_ADDR(q, Q_DA_L), (u32)base);  in skge_qset()
2612 	skge_write32(hw, B0_IMSK, hw->intr_mask);  in skge_up()
2638 	skge_write32(hw, RB_ADDR(port ? Q_R2 : Q_R1, RB_CTRL),  in skge_rx_stop()
2640 	skge_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_SET_RESET);  in skge_rx_stop()
2664 	skge_write32(hw, B0_IMSK, (hw->ports == 1) ? 0 : hw->intr_mask);  in skge_down()
2679 	skge_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL),  in skge_down()
2688 	skge_write32(hw, SK_REG(port, TXA_ITI_INI), 0L);  in skge_down()
2689 	skge_write32(hw, SK_REG(port, TXA_LIM_INI), 0L);  in skge_down()
2692 	skge_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), CSR_SET_RESET);  in skge_down()
2693 	skge_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), RB_RST_SET);  in skge_down()
3238 		skge_write32(hw, B0_IMSK, hw->intr_mask);  in skge_poll()
3310 		skge_write32(hw, B0_R1_CSR, CSR_IRQ_CL_P);  in skge_error_irq()
3316 		skge_write32(hw, B0_R2_CSR, CSR_IRQ_CL_P);  in skge_error_irq()
3372 	skge_write32(hw, B0_IMSK, hw->intr_mask);  in skge_extirq()
3437 	skge_write32(hw, B0_IMSK, hw->intr_mask);  in skge_intr()
3667 	skge_write32(hw, B0_HWE_IMSK, IS_ERR_MSK);  in skge_reset()
3672 	skge_write32(hw, B2_IRQM_MSK, IS_XA1_F|IS_XA2_F);  in skge_reset()
3673 	skge_write32(hw, B2_IRQM_INI, skge_usecs2clk(hw, 100));  in skge_reset()
3674 	skge_write32(hw, B2_IRQM_CTRL, TIM_START);  in skge_reset()
3677 	skge_write32(hw, B0_IMSK, 0);  in skge_reset()
4072 		skge_write32(hw, B0_IMSK, 0);  in skge_remove()
4114 	skge_write32(hw, B0_IMSK, 0);  in skge_suspend()