Lines Matching refs:hw
44 static s32 ixgbe_update_flash_X540(struct ixgbe_hw *hw);
45 static s32 ixgbe_poll_flash_update_done_X540(struct ixgbe_hw *hw);
46 static s32 ixgbe_get_swfw_sync_semaphore(struct ixgbe_hw *hw);
47 static void ixgbe_release_swfw_sync_semaphore(struct ixgbe_hw *hw);
49 enum ixgbe_media_type ixgbe_get_media_type_X540(struct ixgbe_hw *hw) in ixgbe_get_media_type_X540() argument
54 s32 ixgbe_get_invariants_X540(struct ixgbe_hw *hw) in ixgbe_get_invariants_X540() argument
56 struct ixgbe_mac_info *mac = &hw->mac; in ixgbe_get_invariants_X540()
57 struct ixgbe_phy_info *phy = &hw->phy; in ixgbe_get_invariants_X540()
60 if (!ixgbe_mng_present(hw)) in ixgbe_get_invariants_X540()
69 mac->max_msix_vectors = ixgbe_get_pcie_msix_count_generic(hw); in ixgbe_get_invariants_X540()
80 s32 ixgbe_setup_mac_link_X540(struct ixgbe_hw *hw, ixgbe_link_speed speed, in ixgbe_setup_mac_link_X540() argument
83 return hw->phy.ops.setup_link_speed(hw, speed, in ixgbe_setup_mac_link_X540()
95 s32 ixgbe_reset_hw_X540(struct ixgbe_hw *hw) in ixgbe_reset_hw_X540() argument
101 status = hw->mac.ops.stop_adapter(hw); in ixgbe_reset_hw_X540()
106 ixgbe_clear_tx_pending(hw); in ixgbe_reset_hw_X540()
110 ctrl |= IXGBE_READ_REG(hw, IXGBE_CTRL); in ixgbe_reset_hw_X540()
111 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl); in ixgbe_reset_hw_X540()
112 IXGBE_WRITE_FLUSH(hw); in ixgbe_reset_hw_X540()
117 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL); in ixgbe_reset_hw_X540()
124 hw_dbg(hw, "Reset polling failed to complete.\n"); in ixgbe_reset_hw_X540()
133 if (hw->mac.flags & IXGBE_FLAGS_DOUBLE_RESET_REQUIRED) { in ixgbe_reset_hw_X540()
134 hw->mac.flags &= ~IXGBE_FLAGS_DOUBLE_RESET_REQUIRED; in ixgbe_reset_hw_X540()
139 IXGBE_WRITE_REG(hw, IXGBE_RXPBSIZE(0), 384 << IXGBE_RXPBSIZE_SHIFT); in ixgbe_reset_hw_X540()
142 hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr); in ixgbe_reset_hw_X540()
149 hw->mac.num_rar_entries = IXGBE_X540_MAX_TX_QUEUES; in ixgbe_reset_hw_X540()
150 hw->mac.ops.init_rx_addrs(hw); in ixgbe_reset_hw_X540()
153 hw->mac.ops.get_san_mac_addr(hw, hw->mac.san_addr); in ixgbe_reset_hw_X540()
156 if (is_valid_ether_addr(hw->mac.san_addr)) { in ixgbe_reset_hw_X540()
157 hw->mac.ops.set_rar(hw, hw->mac.num_rar_entries - 1, in ixgbe_reset_hw_X540()
158 hw->mac.san_addr, 0, IXGBE_RAH_AV); in ixgbe_reset_hw_X540()
161 hw->mac.san_mac_rar_index = hw->mac.num_rar_entries - 1; in ixgbe_reset_hw_X540()
164 hw->mac.num_rar_entries--; in ixgbe_reset_hw_X540()
168 hw->mac.ops.get_wwn_prefix(hw, &hw->mac.wwnn_prefix, in ixgbe_reset_hw_X540()
169 &hw->mac.wwpn_prefix); in ixgbe_reset_hw_X540()
182 s32 ixgbe_start_hw_X540(struct ixgbe_hw *hw) in ixgbe_start_hw_X540() argument
186 ret_val = ixgbe_start_hw_generic(hw); in ixgbe_start_hw_X540()
190 return ixgbe_start_hw_gen2(hw); in ixgbe_start_hw_X540()
200 s32 ixgbe_init_eeprom_params_X540(struct ixgbe_hw *hw) in ixgbe_init_eeprom_params_X540() argument
202 struct ixgbe_eeprom_info *eeprom = &hw->eeprom; in ixgbe_init_eeprom_params_X540()
210 eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw)); in ixgbe_init_eeprom_params_X540()
216 hw_dbg(hw, "Eeprom params: type = %d, size = %d\n", in ixgbe_init_eeprom_params_X540()
231 static s32 ixgbe_read_eerd_X540(struct ixgbe_hw *hw, u16 offset, u16 *data) in ixgbe_read_eerd_X540() argument
235 if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM)) in ixgbe_read_eerd_X540()
238 status = ixgbe_read_eerd_generic(hw, offset, data); in ixgbe_read_eerd_X540()
240 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM); in ixgbe_read_eerd_X540()
253 static s32 ixgbe_read_eerd_buffer_X540(struct ixgbe_hw *hw, in ixgbe_read_eerd_buffer_X540() argument
258 if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM)) in ixgbe_read_eerd_buffer_X540()
261 status = ixgbe_read_eerd_buffer_generic(hw, offset, words, data); in ixgbe_read_eerd_buffer_X540()
263 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM); in ixgbe_read_eerd_buffer_X540()
275 static s32 ixgbe_write_eewr_X540(struct ixgbe_hw *hw, u16 offset, u16 data) in ixgbe_write_eewr_X540() argument
279 if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM)) in ixgbe_write_eewr_X540()
282 status = ixgbe_write_eewr_generic(hw, offset, data); in ixgbe_write_eewr_X540()
284 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM); in ixgbe_write_eewr_X540()
297 static s32 ixgbe_write_eewr_buffer_X540(struct ixgbe_hw *hw, in ixgbe_write_eewr_buffer_X540() argument
302 if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM)) in ixgbe_write_eewr_buffer_X540()
305 status = ixgbe_write_eewr_buffer_generic(hw, offset, words, data); in ixgbe_write_eewr_buffer_X540()
307 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM); in ixgbe_write_eewr_buffer_X540()
319 static s32 ixgbe_calc_eeprom_checksum_X540(struct ixgbe_hw *hw) in ixgbe_calc_eeprom_checksum_X540() argument
338 if (ixgbe_read_eerd_generic(hw, i, &word)) { in ixgbe_calc_eeprom_checksum_X540()
339 hw_dbg(hw, "EEPROM read failed\n"); in ixgbe_calc_eeprom_checksum_X540()
353 if (ixgbe_read_eerd_generic(hw, i, &pointer)) { in ixgbe_calc_eeprom_checksum_X540()
354 hw_dbg(hw, "EEPROM read failed\n"); in ixgbe_calc_eeprom_checksum_X540()
360 pointer >= hw->eeprom.word_size) in ixgbe_calc_eeprom_checksum_X540()
363 if (ixgbe_read_eerd_generic(hw, pointer, &length)) { in ixgbe_calc_eeprom_checksum_X540()
364 hw_dbg(hw, "EEPROM read failed\n"); in ixgbe_calc_eeprom_checksum_X540()
371 (pointer + length) >= hw->eeprom.word_size) in ixgbe_calc_eeprom_checksum_X540()
375 if (ixgbe_read_eerd_generic(hw, j, &word)) { in ixgbe_calc_eeprom_checksum_X540()
376 hw_dbg(hw, "EEPROM read failed\n"); in ixgbe_calc_eeprom_checksum_X540()
396 static s32 ixgbe_validate_eeprom_checksum_X540(struct ixgbe_hw *hw, in ixgbe_validate_eeprom_checksum_X540() argument
407 status = hw->eeprom.ops.read(hw, 0, &checksum); in ixgbe_validate_eeprom_checksum_X540()
409 hw_dbg(hw, "EEPROM read failed\n"); in ixgbe_validate_eeprom_checksum_X540()
413 if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM)) in ixgbe_validate_eeprom_checksum_X540()
416 status = hw->eeprom.ops.calc_checksum(hw); in ixgbe_validate_eeprom_checksum_X540()
425 status = ixgbe_read_eerd_generic(hw, IXGBE_EEPROM_CHECKSUM, in ixgbe_validate_eeprom_checksum_X540()
434 hw_dbg(hw, "Invalid EEPROM checksum"); in ixgbe_validate_eeprom_checksum_X540()
443 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM); in ixgbe_validate_eeprom_checksum_X540()
456 static s32 ixgbe_update_eeprom_checksum_X540(struct ixgbe_hw *hw) in ixgbe_update_eeprom_checksum_X540() argument
465 status = hw->eeprom.ops.read(hw, 0, &checksum); in ixgbe_update_eeprom_checksum_X540()
467 hw_dbg(hw, "EEPROM read failed\n"); in ixgbe_update_eeprom_checksum_X540()
471 if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM)) in ixgbe_update_eeprom_checksum_X540()
474 status = hw->eeprom.ops.calc_checksum(hw); in ixgbe_update_eeprom_checksum_X540()
483 status = ixgbe_write_eewr_generic(hw, IXGBE_EEPROM_CHECKSUM, checksum); in ixgbe_update_eeprom_checksum_X540()
487 status = ixgbe_update_flash_X540(hw); in ixgbe_update_eeprom_checksum_X540()
490 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM); in ixgbe_update_eeprom_checksum_X540()
501 static s32 ixgbe_update_flash_X540(struct ixgbe_hw *hw) in ixgbe_update_flash_X540() argument
506 status = ixgbe_poll_flash_update_done_X540(hw); in ixgbe_update_flash_X540()
508 hw_dbg(hw, "Flash update time out\n"); in ixgbe_update_flash_X540()
512 flup = IXGBE_READ_REG(hw, IXGBE_EEC(hw)) | IXGBE_EEC_FLUP; in ixgbe_update_flash_X540()
513 IXGBE_WRITE_REG(hw, IXGBE_EEC(hw), flup); in ixgbe_update_flash_X540()
515 status = ixgbe_poll_flash_update_done_X540(hw); in ixgbe_update_flash_X540()
517 hw_dbg(hw, "Flash update complete\n"); in ixgbe_update_flash_X540()
519 hw_dbg(hw, "Flash update time out\n"); in ixgbe_update_flash_X540()
521 if (hw->revision_id == 0) { in ixgbe_update_flash_X540()
522 flup = IXGBE_READ_REG(hw, IXGBE_EEC(hw)); in ixgbe_update_flash_X540()
526 IXGBE_WRITE_REG(hw, IXGBE_EEC(hw), flup); in ixgbe_update_flash_X540()
529 status = ixgbe_poll_flash_update_done_X540(hw); in ixgbe_update_flash_X540()
531 hw_dbg(hw, "Flash update complete\n"); in ixgbe_update_flash_X540()
533 hw_dbg(hw, "Flash update time out\n"); in ixgbe_update_flash_X540()
546 static s32 ixgbe_poll_flash_update_done_X540(struct ixgbe_hw *hw) in ixgbe_poll_flash_update_done_X540() argument
552 reg = IXGBE_READ_REG(hw, IXGBE_EEC(hw)); in ixgbe_poll_flash_update_done_X540()
568 s32 ixgbe_acquire_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask) in ixgbe_acquire_swfw_sync_X540() argument
591 if (ixgbe_get_swfw_sync_semaphore(hw)) in ixgbe_acquire_swfw_sync_X540()
594 swfw_sync = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC(hw)); in ixgbe_acquire_swfw_sync_X540()
597 IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC(hw), swfw_sync); in ixgbe_acquire_swfw_sync_X540()
598 ixgbe_release_swfw_sync_semaphore(hw); in ixgbe_acquire_swfw_sync_X540()
606 ixgbe_release_swfw_sync_semaphore(hw); in ixgbe_acquire_swfw_sync_X540()
612 hw_dbg(hw, "Failed to get SW only semaphore\n"); in ixgbe_acquire_swfw_sync_X540()
621 if (ixgbe_get_swfw_sync_semaphore(hw)) in ixgbe_acquire_swfw_sync_X540()
623 swfw_sync = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC(hw)); in ixgbe_acquire_swfw_sync_X540()
626 IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC(hw), swfw_sync); in ixgbe_acquire_swfw_sync_X540()
627 ixgbe_release_swfw_sync_semaphore(hw); in ixgbe_acquire_swfw_sync_X540()
642 ixgbe_release_swfw_sync_X540(hw, rmask); in ixgbe_acquire_swfw_sync_X540()
643 ixgbe_release_swfw_sync_semaphore(hw); in ixgbe_acquire_swfw_sync_X540()
646 ixgbe_release_swfw_sync_semaphore(hw); in ixgbe_acquire_swfw_sync_X540()
659 void ixgbe_release_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask) in ixgbe_release_swfw_sync_X540() argument
666 ixgbe_get_swfw_sync_semaphore(hw); in ixgbe_release_swfw_sync_X540()
668 swfw_sync = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC(hw)); in ixgbe_release_swfw_sync_X540()
670 IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC(hw), swfw_sync); in ixgbe_release_swfw_sync_X540()
672 ixgbe_release_swfw_sync_semaphore(hw); in ixgbe_release_swfw_sync_X540()
682 static s32 ixgbe_get_swfw_sync_semaphore(struct ixgbe_hw *hw) in ixgbe_get_swfw_sync_semaphore() argument
693 swsm = IXGBE_READ_REG(hw, IXGBE_SWSM(hw)); in ixgbe_get_swfw_sync_semaphore()
700 hw_dbg(hw, in ixgbe_get_swfw_sync_semaphore()
707 swsm = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC(hw)); in ixgbe_get_swfw_sync_semaphore()
717 hw_dbg(hw, "REGSMP Software NVM semaphore not granted\n"); in ixgbe_get_swfw_sync_semaphore()
718 ixgbe_release_swfw_sync_semaphore(hw); in ixgbe_get_swfw_sync_semaphore()
728 static void ixgbe_release_swfw_sync_semaphore(struct ixgbe_hw *hw) in ixgbe_release_swfw_sync_semaphore() argument
734 swsm = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC(hw)); in ixgbe_release_swfw_sync_semaphore()
736 IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC(hw), swsm); in ixgbe_release_swfw_sync_semaphore()
738 swsm = IXGBE_READ_REG(hw, IXGBE_SWSM(hw)); in ixgbe_release_swfw_sync_semaphore()
740 IXGBE_WRITE_REG(hw, IXGBE_SWSM(hw), swsm); in ixgbe_release_swfw_sync_semaphore()
742 IXGBE_WRITE_FLUSH(hw); in ixgbe_release_swfw_sync_semaphore()
753 s32 ixgbe_blink_led_start_X540(struct ixgbe_hw *hw, u32 index) in ixgbe_blink_led_start_X540() argument
765 hw->mac.ops.check_link(hw, &speed, &link_up, false); in ixgbe_blink_led_start_X540()
767 macc_reg = IXGBE_READ_REG(hw, IXGBE_MACC); in ixgbe_blink_led_start_X540()
769 IXGBE_WRITE_REG(hw, IXGBE_MACC, macc_reg); in ixgbe_blink_led_start_X540()
772 ledctl_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL); in ixgbe_blink_led_start_X540()
775 IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, ledctl_reg); in ixgbe_blink_led_start_X540()
776 IXGBE_WRITE_FLUSH(hw); in ixgbe_blink_led_start_X540()
789 s32 ixgbe_blink_led_stop_X540(struct ixgbe_hw *hw, u32 index) in ixgbe_blink_led_stop_X540() argument
795 ledctl_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL); in ixgbe_blink_led_stop_X540()
799 IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, ledctl_reg); in ixgbe_blink_led_stop_X540()
802 macc_reg = IXGBE_READ_REG(hw, IXGBE_MACC); in ixgbe_blink_led_stop_X540()
804 IXGBE_WRITE_REG(hw, IXGBE_MACC, macc_reg); in ixgbe_blink_led_stop_X540()
805 IXGBE_WRITE_FLUSH(hw); in ixgbe_blink_led_stop_X540()