432 		u32 reg_offset, vf_shift, vfre;  in ixgbe_set_vf_lpe()  local
465 		reg_offset = vf / 32;  in ixgbe_set_vf_lpe()
468 		vfre = IXGBE_READ_REG(hw, IXGBE_VFRE(reg_offset));  in ixgbe_set_vf_lpe()
473 		IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), vfre);  in ixgbe_set_vf_lpe()
662 	u32 reg, reg_offset, vf_shift;  in ixgbe_vf_reset_msg()  local
678 	reg_offset = vf / 32;  in ixgbe_vf_reset_msg()
681 	reg = IXGBE_READ_REG(hw, IXGBE_VFTE(reg_offset));  in ixgbe_vf_reset_msg()
683 	IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), reg);  in ixgbe_vf_reset_msg()
689 	reg = IXGBE_READ_REG(hw, IXGBE_VFRE(reg_offset));  in ixgbe_vf_reset_msg()
708 	IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), reg);  in ixgbe_vf_reset_msg()
714 	reg = IXGBE_READ_REG(hw, IXGBE_VMECM(reg_offset));  in ixgbe_vf_reset_msg()
716 	IXGBE_WRITE_REG(hw, IXGBE_VMECM(reg_offset), reg);  in ixgbe_vf_reset_msg()