Lines Matching refs:hw
36 static void ixgbe_i2c_start(struct ixgbe_hw *hw);
37 static void ixgbe_i2c_stop(struct ixgbe_hw *hw);
38 static s32 ixgbe_clock_in_i2c_byte(struct ixgbe_hw *hw, u8 *data);
39 static s32 ixgbe_clock_out_i2c_byte(struct ixgbe_hw *hw, u8 data);
40 static s32 ixgbe_get_i2c_ack(struct ixgbe_hw *hw);
41 static s32 ixgbe_clock_in_i2c_bit(struct ixgbe_hw *hw, bool *data);
42 static s32 ixgbe_clock_out_i2c_bit(struct ixgbe_hw *hw, bool data);
43 static void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl);
44 static void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl);
45 static s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data);
46 static bool ixgbe_get_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl);
47 static void ixgbe_i2c_bus_clear(struct ixgbe_hw *hw);
49 static s32 ixgbe_get_phy_id(struct ixgbe_hw *hw);
50 static s32 ixgbe_identify_qsfp_module_generic(struct ixgbe_hw *hw);
59 static s32 ixgbe_out_i2c_byte_ack(struct ixgbe_hw *hw, u8 byte) in ixgbe_out_i2c_byte_ack() argument
63 status = ixgbe_clock_out_i2c_byte(hw, byte); in ixgbe_out_i2c_byte_ack()
66 return ixgbe_get_i2c_ack(hw); in ixgbe_out_i2c_byte_ack()
76 static s32 ixgbe_in_i2c_byte_ack(struct ixgbe_hw *hw, u8 *byte) in ixgbe_in_i2c_byte_ack() argument
80 status = ixgbe_clock_in_i2c_byte(hw, byte); in ixgbe_in_i2c_byte_ack()
84 return ixgbe_clock_out_i2c_bit(hw, false); in ixgbe_in_i2c_byte_ack()
112 static s32 ixgbe_read_i2c_combined_generic_int(struct ixgbe_hw *hw, u8 addr, in ixgbe_read_i2c_combined_generic_int() argument
115 u32 swfw_mask = hw->phy.phy_semaphore_mask; in ixgbe_read_i2c_combined_generic_int()
128 if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)) in ixgbe_read_i2c_combined_generic_int()
130 ixgbe_i2c_start(hw); in ixgbe_read_i2c_combined_generic_int()
132 if (ixgbe_out_i2c_byte_ack(hw, addr)) in ixgbe_read_i2c_combined_generic_int()
135 if (ixgbe_out_i2c_byte_ack(hw, reg_high)) in ixgbe_read_i2c_combined_generic_int()
138 if (ixgbe_out_i2c_byte_ack(hw, reg & 0xFF)) in ixgbe_read_i2c_combined_generic_int()
141 if (ixgbe_out_i2c_byte_ack(hw, csum)) in ixgbe_read_i2c_combined_generic_int()
144 ixgbe_i2c_start(hw); in ixgbe_read_i2c_combined_generic_int()
146 if (ixgbe_out_i2c_byte_ack(hw, addr | 1)) in ixgbe_read_i2c_combined_generic_int()
149 if (ixgbe_in_i2c_byte_ack(hw, &high_bits)) in ixgbe_read_i2c_combined_generic_int()
152 if (ixgbe_in_i2c_byte_ack(hw, &low_bits)) in ixgbe_read_i2c_combined_generic_int()
155 if (ixgbe_clock_in_i2c_byte(hw, &csum_byte)) in ixgbe_read_i2c_combined_generic_int()
158 if (ixgbe_clock_out_i2c_bit(hw, false)) in ixgbe_read_i2c_combined_generic_int()
160 ixgbe_i2c_stop(hw); in ixgbe_read_i2c_combined_generic_int()
162 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_read_i2c_combined_generic_int()
167 ixgbe_i2c_bus_clear(hw); in ixgbe_read_i2c_combined_generic_int()
169 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_read_i2c_combined_generic_int()
172 hw_dbg(hw, "I2C byte read combined error - Retry.\n"); in ixgbe_read_i2c_combined_generic_int()
174 hw_dbg(hw, "I2C byte read combined error.\n"); in ixgbe_read_i2c_combined_generic_int()
189 s32 ixgbe_read_i2c_combined_generic(struct ixgbe_hw *hw, u8 addr, in ixgbe_read_i2c_combined_generic() argument
192 return ixgbe_read_i2c_combined_generic_int(hw, addr, reg, val, true); in ixgbe_read_i2c_combined_generic()
204 s32 ixgbe_read_i2c_combined_generic_unlocked(struct ixgbe_hw *hw, u8 addr, in ixgbe_read_i2c_combined_generic_unlocked() argument
207 return ixgbe_read_i2c_combined_generic_int(hw, addr, reg, val, false); in ixgbe_read_i2c_combined_generic_unlocked()
220 static s32 ixgbe_write_i2c_combined_generic_int(struct ixgbe_hw *hw, u8 addr, in ixgbe_write_i2c_combined_generic_int() argument
223 u32 swfw_mask = hw->phy.phy_semaphore_mask; in ixgbe_write_i2c_combined_generic_int()
235 if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)) in ixgbe_write_i2c_combined_generic_int()
237 ixgbe_i2c_start(hw); in ixgbe_write_i2c_combined_generic_int()
239 if (ixgbe_out_i2c_byte_ack(hw, addr)) in ixgbe_write_i2c_combined_generic_int()
242 if (ixgbe_out_i2c_byte_ack(hw, reg_high)) in ixgbe_write_i2c_combined_generic_int()
245 if (ixgbe_out_i2c_byte_ack(hw, reg & 0xFF)) in ixgbe_write_i2c_combined_generic_int()
248 if (ixgbe_out_i2c_byte_ack(hw, val >> 8)) in ixgbe_write_i2c_combined_generic_int()
251 if (ixgbe_out_i2c_byte_ack(hw, val & 0xFF)) in ixgbe_write_i2c_combined_generic_int()
254 if (ixgbe_out_i2c_byte_ack(hw, csum)) in ixgbe_write_i2c_combined_generic_int()
256 ixgbe_i2c_stop(hw); in ixgbe_write_i2c_combined_generic_int()
258 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_write_i2c_combined_generic_int()
262 ixgbe_i2c_bus_clear(hw); in ixgbe_write_i2c_combined_generic_int()
264 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_write_i2c_combined_generic_int()
267 hw_dbg(hw, "I2C byte write combined error - Retry.\n"); in ixgbe_write_i2c_combined_generic_int()
269 hw_dbg(hw, "I2C byte write combined error.\n"); in ixgbe_write_i2c_combined_generic_int()
284 s32 ixgbe_write_i2c_combined_generic(struct ixgbe_hw *hw, in ixgbe_write_i2c_combined_generic() argument
287 return ixgbe_write_i2c_combined_generic_int(hw, addr, reg, val, true); in ixgbe_write_i2c_combined_generic()
299 s32 ixgbe_write_i2c_combined_generic_unlocked(struct ixgbe_hw *hw, in ixgbe_write_i2c_combined_generic_unlocked() argument
302 return ixgbe_write_i2c_combined_generic_int(hw, addr, reg, val, false); in ixgbe_write_i2c_combined_generic_unlocked()
311 s32 ixgbe_identify_phy_generic(struct ixgbe_hw *hw) in ixgbe_identify_phy_generic() argument
316 if (!hw->phy.phy_semaphore_mask) { in ixgbe_identify_phy_generic()
317 if (hw->bus.lan_id) in ixgbe_identify_phy_generic()
318 hw->phy.phy_semaphore_mask = IXGBE_GSSR_PHY1_SM; in ixgbe_identify_phy_generic()
320 hw->phy.phy_semaphore_mask = IXGBE_GSSR_PHY0_SM; in ixgbe_identify_phy_generic()
323 if (hw->phy.type == ixgbe_phy_unknown) { in ixgbe_identify_phy_generic()
325 hw->phy.mdio.prtad = phy_addr; in ixgbe_identify_phy_generic()
326 if (mdio45_probe(&hw->phy.mdio, phy_addr) == 0) { in ixgbe_identify_phy_generic()
327 ixgbe_get_phy_id(hw); in ixgbe_identify_phy_generic()
328 hw->phy.type = in ixgbe_identify_phy_generic()
329 ixgbe_get_phy_type_from_id(hw->phy.id); in ixgbe_identify_phy_generic()
331 if (hw->phy.type == ixgbe_phy_unknown) { in ixgbe_identify_phy_generic()
332 hw->phy.ops.read_reg(hw, in ixgbe_identify_phy_generic()
339 hw->phy.type = in ixgbe_identify_phy_generic()
342 hw->phy.type = in ixgbe_identify_phy_generic()
350 hw->phy.mdio.prtad = 0; in ixgbe_identify_phy_generic()
365 bool ixgbe_check_reset_blocked(struct ixgbe_hw *hw) in ixgbe_check_reset_blocked() argument
370 if (hw->mac.type == ixgbe_mac_82598EB) in ixgbe_check_reset_blocked()
373 mmngc = IXGBE_READ_REG(hw, IXGBE_MMNGC); in ixgbe_check_reset_blocked()
375 hw_dbg(hw, "MNG_VETO bit detected.\n"); in ixgbe_check_reset_blocked()
387 static s32 ixgbe_get_phy_id(struct ixgbe_hw *hw) in ixgbe_get_phy_id() argument
393 status = hw->phy.ops.read_reg(hw, MDIO_DEVID1, MDIO_MMD_PMAPMD, in ixgbe_get_phy_id()
397 hw->phy.id = (u32)(phy_id_high << 16); in ixgbe_get_phy_id()
398 status = hw->phy.ops.read_reg(hw, MDIO_DEVID2, MDIO_MMD_PMAPMD, in ixgbe_get_phy_id()
400 hw->phy.id |= (u32)(phy_id_low & IXGBE_PHY_REVISION_MASK); in ixgbe_get_phy_id()
401 hw->phy.revision = (u32)(phy_id_low & ~IXGBE_PHY_REVISION_MASK); in ixgbe_get_phy_id()
444 s32 ixgbe_reset_phy_generic(struct ixgbe_hw *hw) in ixgbe_reset_phy_generic() argument
450 if (hw->phy.type == ixgbe_phy_unknown) in ixgbe_reset_phy_generic()
451 status = ixgbe_identify_phy_generic(hw); in ixgbe_reset_phy_generic()
453 if (status != 0 || hw->phy.type == ixgbe_phy_none) in ixgbe_reset_phy_generic()
457 if (!hw->phy.reset_if_overtemp && in ixgbe_reset_phy_generic()
458 (IXGBE_ERR_OVERTEMP == hw->phy.ops.check_overtemp(hw))) in ixgbe_reset_phy_generic()
462 if (ixgbe_check_reset_blocked(hw)) in ixgbe_reset_phy_generic()
469 hw->phy.ops.write_reg(hw, MDIO_CTRL1, in ixgbe_reset_phy_generic()
480 hw->phy.ops.read_reg(hw, MDIO_CTRL1, in ixgbe_reset_phy_generic()
489 hw_dbg(hw, "PHY reset polling failed to complete.\n"); in ixgbe_reset_phy_generic()
503 s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, in ixgbe_read_phy_reg_mdi() argument
511 (hw->phy.mdio.prtad << IXGBE_MSCA_PHY_ADDR_SHIFT) | in ixgbe_read_phy_reg_mdi()
514 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_read_phy_reg_mdi()
523 command = IXGBE_READ_REG(hw, IXGBE_MSCA); in ixgbe_read_phy_reg_mdi()
530 hw_dbg(hw, "PHY address command did not complete.\n"); in ixgbe_read_phy_reg_mdi()
539 (hw->phy.mdio.prtad << IXGBE_MSCA_PHY_ADDR_SHIFT) | in ixgbe_read_phy_reg_mdi()
542 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_read_phy_reg_mdi()
551 command = IXGBE_READ_REG(hw, IXGBE_MSCA); in ixgbe_read_phy_reg_mdi()
557 hw_dbg(hw, "PHY read command didn't complete\n"); in ixgbe_read_phy_reg_mdi()
564 data = IXGBE_READ_REG(hw, IXGBE_MSRWD); in ixgbe_read_phy_reg_mdi()
578 s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_read_phy_reg_generic() argument
582 u32 gssr = hw->phy.phy_semaphore_mask; in ixgbe_read_phy_reg_generic()
584 if (hw->mac.ops.acquire_swfw_sync(hw, gssr) == 0) { in ixgbe_read_phy_reg_generic()
585 status = ixgbe_read_phy_reg_mdi(hw, reg_addr, device_type, in ixgbe_read_phy_reg_generic()
587 hw->mac.ops.release_swfw_sync(hw, gssr); in ixgbe_read_phy_reg_generic()
603 s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_write_phy_reg_mdi() argument
609 IXGBE_WRITE_REG(hw, IXGBE_MSRWD, (u32)phy_data); in ixgbe_write_phy_reg_mdi()
614 (hw->phy.mdio.prtad << IXGBE_MSCA_PHY_ADDR_SHIFT) | in ixgbe_write_phy_reg_mdi()
617 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_write_phy_reg_mdi()
627 command = IXGBE_READ_REG(hw, IXGBE_MSCA); in ixgbe_write_phy_reg_mdi()
633 hw_dbg(hw, "PHY address cmd didn't complete\n"); in ixgbe_write_phy_reg_mdi()
643 (hw->phy.mdio.prtad << IXGBE_MSCA_PHY_ADDR_SHIFT) | in ixgbe_write_phy_reg_mdi()
646 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_write_phy_reg_mdi()
655 command = IXGBE_READ_REG(hw, IXGBE_MSCA); in ixgbe_write_phy_reg_mdi()
661 hw_dbg(hw, "PHY write cmd didn't complete\n"); in ixgbe_write_phy_reg_mdi()
676 s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_write_phy_reg_generic() argument
680 u32 gssr = hw->phy.phy_semaphore_mask; in ixgbe_write_phy_reg_generic()
682 if (hw->mac.ops.acquire_swfw_sync(hw, gssr) == 0) { in ixgbe_write_phy_reg_generic()
683 status = ixgbe_write_phy_reg_mdi(hw, reg_addr, device_type, in ixgbe_write_phy_reg_generic()
685 hw->mac.ops.release_swfw_sync(hw, gssr); in ixgbe_write_phy_reg_generic()
699 s32 ixgbe_setup_phy_link_generic(struct ixgbe_hw *hw) in ixgbe_setup_phy_link_generic() argument
706 ixgbe_get_copper_link_capabilities_generic(hw, &speed, &autoneg); in ixgbe_setup_phy_link_generic()
710 hw->phy.ops.read_reg(hw, MDIO_AN_10GBT_CTRL, in ixgbe_setup_phy_link_generic()
715 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL) in ixgbe_setup_phy_link_generic()
718 hw->phy.ops.write_reg(hw, MDIO_AN_10GBT_CTRL, in ixgbe_setup_phy_link_generic()
725 hw->phy.ops.read_reg(hw, in ixgbe_setup_phy_link_generic()
731 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL) in ixgbe_setup_phy_link_generic()
734 hw->phy.ops.write_reg(hw, in ixgbe_setup_phy_link_generic()
742 hw->phy.ops.read_reg(hw, MDIO_AN_ADVERTISE, in ixgbe_setup_phy_link_generic()
748 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL) in ixgbe_setup_phy_link_generic()
751 hw->phy.ops.write_reg(hw, MDIO_AN_ADVERTISE, in ixgbe_setup_phy_link_generic()
757 if (ixgbe_check_reset_blocked(hw)) in ixgbe_setup_phy_link_generic()
761 hw->phy.ops.read_reg(hw, MDIO_CTRL1, in ixgbe_setup_phy_link_generic()
766 hw->phy.ops.write_reg(hw, MDIO_CTRL1, in ixgbe_setup_phy_link_generic()
777 s32 ixgbe_setup_phy_link_speed_generic(struct ixgbe_hw *hw, in ixgbe_setup_phy_link_speed_generic() argument
786 hw->phy.autoneg_advertised = 0; in ixgbe_setup_phy_link_speed_generic()
789 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_10GB_FULL; in ixgbe_setup_phy_link_speed_generic()
792 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_1GB_FULL; in ixgbe_setup_phy_link_speed_generic()
795 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_100_FULL; in ixgbe_setup_phy_link_speed_generic()
798 hw->phy.ops.setup_link(hw); in ixgbe_setup_phy_link_speed_generic()
810 static s32 ixgbe_get_copper_speeds_supported(struct ixgbe_hw *hw) in ixgbe_get_copper_speeds_supported() argument
815 status = hw->phy.ops.read_reg(hw, MDIO_SPEED, MDIO_MMD_PMAPMD, in ixgbe_get_copper_speeds_supported()
821 hw->phy.speeds_supported |= IXGBE_LINK_SPEED_10GB_FULL; in ixgbe_get_copper_speeds_supported()
823 hw->phy.speeds_supported |= IXGBE_LINK_SPEED_1GB_FULL; in ixgbe_get_copper_speeds_supported()
825 hw->phy.speeds_supported |= IXGBE_LINK_SPEED_100_FULL; in ixgbe_get_copper_speeds_supported()
827 switch (hw->mac.type) { in ixgbe_get_copper_speeds_supported()
829 hw->phy.speeds_supported |= IXGBE_LINK_SPEED_2_5GB_FULL; in ixgbe_get_copper_speeds_supported()
830 hw->phy.speeds_supported |= IXGBE_LINK_SPEED_5GB_FULL; in ixgbe_get_copper_speeds_supported()
833 hw->phy.speeds_supported &= ~IXGBE_LINK_SPEED_100_FULL; in ixgbe_get_copper_speeds_supported()
848 s32 ixgbe_get_copper_link_capabilities_generic(struct ixgbe_hw *hw, in ixgbe_get_copper_link_capabilities_generic() argument
855 if (!hw->phy.speeds_supported) in ixgbe_get_copper_link_capabilities_generic()
856 status = ixgbe_get_copper_speeds_supported(hw); in ixgbe_get_copper_link_capabilities_generic()
858 *speed = hw->phy.speeds_supported; in ixgbe_get_copper_link_capabilities_generic()
869 s32 ixgbe_check_phy_link_tnx(struct ixgbe_hw *hw, ixgbe_link_speed *speed, in ixgbe_check_phy_link_tnx() argument
890 status = hw->phy.ops.read_reg(hw, in ixgbe_check_phy_link_tnx()
919 s32 ixgbe_setup_phy_link_tnx(struct ixgbe_hw *hw) in ixgbe_setup_phy_link_tnx() argument
925 ixgbe_get_copper_link_capabilities_generic(hw, &speed, &autoneg); in ixgbe_setup_phy_link_tnx()
929 hw->phy.ops.read_reg(hw, MDIO_AN_10GBT_CTRL, in ixgbe_setup_phy_link_tnx()
934 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL) in ixgbe_setup_phy_link_tnx()
937 hw->phy.ops.write_reg(hw, MDIO_AN_10GBT_CTRL, in ixgbe_setup_phy_link_tnx()
944 hw->phy.ops.read_reg(hw, IXGBE_MII_AUTONEG_XNP_TX_REG, in ixgbe_setup_phy_link_tnx()
949 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL) in ixgbe_setup_phy_link_tnx()
952 hw->phy.ops.write_reg(hw, IXGBE_MII_AUTONEG_XNP_TX_REG, in ixgbe_setup_phy_link_tnx()
959 hw->phy.ops.read_reg(hw, MDIO_AN_ADVERTISE, in ixgbe_setup_phy_link_tnx()
965 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL) in ixgbe_setup_phy_link_tnx()
968 hw->phy.ops.write_reg(hw, MDIO_AN_ADVERTISE, in ixgbe_setup_phy_link_tnx()
974 if (ixgbe_check_reset_blocked(hw)) in ixgbe_setup_phy_link_tnx()
978 hw->phy.ops.read_reg(hw, MDIO_CTRL1, in ixgbe_setup_phy_link_tnx()
983 hw->phy.ops.write_reg(hw, MDIO_CTRL1, in ixgbe_setup_phy_link_tnx()
993 s32 ixgbe_get_phy_firmware_version_tnx(struct ixgbe_hw *hw, in ixgbe_get_phy_firmware_version_tnx() argument
998 status = hw->phy.ops.read_reg(hw, TNX_FW_REV, in ixgbe_get_phy_firmware_version_tnx()
1010 s32 ixgbe_get_phy_firmware_version_generic(struct ixgbe_hw *hw, in ixgbe_get_phy_firmware_version_generic() argument
1015 status = hw->phy.ops.read_reg(hw, AQ_FW_REV, in ixgbe_get_phy_firmware_version_generic()
1026 s32 ixgbe_reset_phy_nl(struct ixgbe_hw *hw) in ixgbe_reset_phy_nl() argument
1036 if (ixgbe_check_reset_blocked(hw)) in ixgbe_reset_phy_nl()
1039 hw->phy.ops.read_reg(hw, MDIO_CTRL1, MDIO_MMD_PHYXS, &phy_data); in ixgbe_reset_phy_nl()
1042 hw->phy.ops.write_reg(hw, MDIO_CTRL1, MDIO_MMD_PHYXS, in ixgbe_reset_phy_nl()
1046 hw->phy.ops.read_reg(hw, MDIO_CTRL1, MDIO_MMD_PHYXS, in ixgbe_reset_phy_nl()
1054 hw_dbg(hw, "PHY reset did not complete.\n"); in ixgbe_reset_phy_nl()
1059 ret_val = ixgbe_get_sfp_init_sequence_offsets(hw, &list_offset, in ixgbe_reset_phy_nl()
1064 ret_val = hw->eeprom.ops.read(hw, data_offset, &block_crc); in ixgbe_reset_phy_nl()
1070 ret_val = hw->eeprom.ops.read(hw, data_offset, &eword); in ixgbe_reset_phy_nl()
1079 hw_dbg(hw, "DELAY: %d MS\n", edata); in ixgbe_reset_phy_nl()
1083 hw_dbg(hw, "DATA:\n"); in ixgbe_reset_phy_nl()
1085 ret_val = hw->eeprom.ops.read(hw, data_offset++, in ixgbe_reset_phy_nl()
1090 ret_val = hw->eeprom.ops.read(hw, data_offset, in ixgbe_reset_phy_nl()
1094 hw->phy.ops.write_reg(hw, phy_offset, in ixgbe_reset_phy_nl()
1096 hw_dbg(hw, "Wrote %4.4x to %4.4x\n", eword, in ixgbe_reset_phy_nl()
1104 hw_dbg(hw, "CONTROL:\n"); in ixgbe_reset_phy_nl()
1106 hw_dbg(hw, "EOL\n"); in ixgbe_reset_phy_nl()
1109 hw_dbg(hw, "SOL\n"); in ixgbe_reset_phy_nl()
1111 hw_dbg(hw, "Bad control value\n"); in ixgbe_reset_phy_nl()
1116 hw_dbg(hw, "Bad control type\n"); in ixgbe_reset_phy_nl()
1124 hw_err(hw, "eeprom read at offset %d failed\n", data_offset); in ixgbe_reset_phy_nl()
1134 s32 ixgbe_identify_module_generic(struct ixgbe_hw *hw) in ixgbe_identify_module_generic() argument
1136 switch (hw->mac.ops.get_media_type(hw)) { in ixgbe_identify_module_generic()
1138 return ixgbe_identify_sfp_module_generic(hw); in ixgbe_identify_module_generic()
1140 return ixgbe_identify_qsfp_module_generic(hw); in ixgbe_identify_module_generic()
1142 hw->phy.sfp_type = ixgbe_sfp_type_not_present; in ixgbe_identify_module_generic()
1155 s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw) in ixgbe_identify_sfp_module_generic() argument
1157 struct ixgbe_adapter *adapter = hw->back; in ixgbe_identify_sfp_module_generic()
1160 enum ixgbe_sfp_type stored_sfp_type = hw->phy.sfp_type; in ixgbe_identify_sfp_module_generic()
1169 if (hw->mac.ops.get_media_type(hw) != ixgbe_media_type_fiber) { in ixgbe_identify_sfp_module_generic()
1170 hw->phy.sfp_type = ixgbe_sfp_type_not_present; in ixgbe_identify_sfp_module_generic()
1175 hw->mac.ops.set_lan_id(hw); in ixgbe_identify_sfp_module_generic()
1177 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1185 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_sfp_module_generic()
1188 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1195 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1201 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1224 if (hw->mac.type == ixgbe_mac_82598EB) { in ixgbe_identify_sfp_module_generic()
1226 hw->phy.sfp_type = ixgbe_sfp_type_da_cu; in ixgbe_identify_sfp_module_generic()
1228 hw->phy.sfp_type = ixgbe_sfp_type_sr; in ixgbe_identify_sfp_module_generic()
1230 hw->phy.sfp_type = ixgbe_sfp_type_lr; in ixgbe_identify_sfp_module_generic()
1232 hw->phy.sfp_type = ixgbe_sfp_type_unknown; in ixgbe_identify_sfp_module_generic()
1235 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1236 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1239 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1242 hw->phy.ops.read_i2c_eeprom( in ixgbe_identify_sfp_module_generic()
1243 hw, IXGBE_SFF_CABLE_SPEC_COMP, in ixgbe_identify_sfp_module_generic()
1247 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1248 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1251 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1254 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1260 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1261 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1264 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1267 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1268 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1271 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1274 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1275 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1278 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1281 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1282 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1285 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1288 hw->phy.sfp_type = ixgbe_sfp_type_unknown; in ixgbe_identify_sfp_module_generic()
1292 if (hw->phy.sfp_type != stored_sfp_type) in ixgbe_identify_sfp_module_generic()
1293 hw->phy.sfp_setup_needed = true; in ixgbe_identify_sfp_module_generic()
1296 hw->phy.multispeed_fiber = false; in ixgbe_identify_sfp_module_generic()
1301 hw->phy.multispeed_fiber = true; in ixgbe_identify_sfp_module_generic()
1304 if (hw->phy.type != ixgbe_phy_nl) { in ixgbe_identify_sfp_module_generic()
1305 hw->phy.id = identifier; in ixgbe_identify_sfp_module_generic()
1306 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1313 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1320 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1335 hw->phy.type = in ixgbe_identify_sfp_module_generic()
1340 hw->phy.type = ixgbe_phy_sfp_ftl_active; in ixgbe_identify_sfp_module_generic()
1342 hw->phy.type = ixgbe_phy_sfp_ftl; in ixgbe_identify_sfp_module_generic()
1345 hw->phy.type = ixgbe_phy_sfp_avago; in ixgbe_identify_sfp_module_generic()
1348 hw->phy.type = ixgbe_phy_sfp_intel; in ixgbe_identify_sfp_module_generic()
1352 hw->phy.type = in ixgbe_identify_sfp_module_generic()
1355 hw->phy.type = in ixgbe_identify_sfp_module_generic()
1358 hw->phy.type = ixgbe_phy_sfp_unknown; in ixgbe_identify_sfp_module_generic()
1370 !(hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core1 || in ixgbe_identify_sfp_module_generic()
1371 hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core0 || in ixgbe_identify_sfp_module_generic()
1372 hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core0 || in ixgbe_identify_sfp_module_generic()
1373 hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core1 || in ixgbe_identify_sfp_module_generic()
1374 hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core0 || in ixgbe_identify_sfp_module_generic()
1375 hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core1)) { in ixgbe_identify_sfp_module_generic()
1376 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_sfp_module_generic()
1381 if (hw->mac.type == ixgbe_mac_82598EB) in ixgbe_identify_sfp_module_generic()
1384 hw->mac.ops.get_device_caps(hw, &enforce_sfp); in ixgbe_identify_sfp_module_generic()
1386 !(hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core0 || in ixgbe_identify_sfp_module_generic()
1387 hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core1 || in ixgbe_identify_sfp_module_generic()
1388 hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core0 || in ixgbe_identify_sfp_module_generic()
1389 hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core1 || in ixgbe_identify_sfp_module_generic()
1390 hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core0 || in ixgbe_identify_sfp_module_generic()
1391 hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core1)) { in ixgbe_identify_sfp_module_generic()
1393 if (hw->phy.type == ixgbe_phy_sfp_intel) in ixgbe_identify_sfp_module_generic()
1395 if (hw->allow_unsupported_sfp) { in ixgbe_identify_sfp_module_generic()
1399 hw_dbg(hw, "SFP+ module not supported\n"); in ixgbe_identify_sfp_module_generic()
1400 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_sfp_module_generic()
1406 hw->phy.sfp_type = ixgbe_sfp_type_not_present; in ixgbe_identify_sfp_module_generic()
1407 if (hw->phy.type != ixgbe_phy_nl) { in ixgbe_identify_sfp_module_generic()
1408 hw->phy.id = 0; in ixgbe_identify_sfp_module_generic()
1409 hw->phy.type = ixgbe_phy_unknown; in ixgbe_identify_sfp_module_generic()
1420 static s32 ixgbe_identify_qsfp_module_generic(struct ixgbe_hw *hw) in ixgbe_identify_qsfp_module_generic() argument
1422 struct ixgbe_adapter *adapter = hw->back; in ixgbe_identify_qsfp_module_generic()
1425 enum ixgbe_sfp_type stored_sfp_type = hw->phy.sfp_type; in ixgbe_identify_qsfp_module_generic()
1436 if (hw->mac.ops.get_media_type(hw) != ixgbe_media_type_fiber_qsfp) { in ixgbe_identify_qsfp_module_generic()
1437 hw->phy.sfp_type = ixgbe_sfp_type_not_present; in ixgbe_identify_qsfp_module_generic()
1442 hw->mac.ops.set_lan_id(hw); in ixgbe_identify_qsfp_module_generic()
1444 status = hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_IDENTIFIER, in ixgbe_identify_qsfp_module_generic()
1451 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_qsfp_module_generic()
1455 hw->phy.id = identifier; in ixgbe_identify_qsfp_module_generic()
1457 status = hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_QSFP_10GBE_COMP, in ixgbe_identify_qsfp_module_generic()
1463 status = hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_QSFP_1GBE_COMP, in ixgbe_identify_qsfp_module_generic()
1470 hw->phy.type = ixgbe_phy_qsfp_passive_unknown; in ixgbe_identify_qsfp_module_generic()
1471 if (hw->bus.lan_id == 0) in ixgbe_identify_qsfp_module_generic()
1472 hw->phy.sfp_type = ixgbe_sfp_type_da_cu_core0; in ixgbe_identify_qsfp_module_generic()
1474 hw->phy.sfp_type = ixgbe_sfp_type_da_cu_core1; in ixgbe_identify_qsfp_module_generic()
1477 if (hw->bus.lan_id == 0) in ixgbe_identify_qsfp_module_generic()
1478 hw->phy.sfp_type = ixgbe_sfp_type_srlr_core0; in ixgbe_identify_qsfp_module_generic()
1480 hw->phy.sfp_type = ixgbe_sfp_type_srlr_core1; in ixgbe_identify_qsfp_module_generic()
1489 hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1493 hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1497 hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1510 hw->phy.type = ixgbe_phy_qsfp_active_unknown; in ixgbe_identify_qsfp_module_generic()
1511 if (hw->bus.lan_id == 0) in ixgbe_identify_qsfp_module_generic()
1512 hw->phy.sfp_type = in ixgbe_identify_qsfp_module_generic()
1515 hw->phy.sfp_type = in ixgbe_identify_qsfp_module_generic()
1519 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_qsfp_module_generic()
1524 if (hw->phy.sfp_type != stored_sfp_type) in ixgbe_identify_qsfp_module_generic()
1525 hw->phy.sfp_setup_needed = true; in ixgbe_identify_qsfp_module_generic()
1528 hw->phy.multispeed_fiber = false; in ixgbe_identify_qsfp_module_generic()
1533 hw->phy.multispeed_fiber = true; in ixgbe_identify_qsfp_module_generic()
1538 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1545 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1552 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1565 hw->phy.type = ixgbe_phy_qsfp_intel; in ixgbe_identify_qsfp_module_generic()
1567 hw->phy.type = ixgbe_phy_qsfp_unknown; in ixgbe_identify_qsfp_module_generic()
1569 hw->mac.ops.get_device_caps(hw, &enforce_sfp); in ixgbe_identify_qsfp_module_generic()
1572 if (hw->phy.type == ixgbe_phy_qsfp_intel) in ixgbe_identify_qsfp_module_generic()
1574 if (hw->allow_unsupported_sfp) { in ixgbe_identify_qsfp_module_generic()
1578 hw_dbg(hw, "QSFP module not supported\n"); in ixgbe_identify_qsfp_module_generic()
1579 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_qsfp_module_generic()
1587 hw->phy.sfp_type = ixgbe_sfp_type_not_present; in ixgbe_identify_qsfp_module_generic()
1588 hw->phy.id = 0; in ixgbe_identify_qsfp_module_generic()
1589 hw->phy.type = ixgbe_phy_unknown; in ixgbe_identify_qsfp_module_generic()
1603 s32 ixgbe_get_sfp_init_sequence_offsets(struct ixgbe_hw *hw, in ixgbe_get_sfp_init_sequence_offsets() argument
1608 u16 sfp_type = hw->phy.sfp_type; in ixgbe_get_sfp_init_sequence_offsets()
1610 if (hw->phy.sfp_type == ixgbe_sfp_type_unknown) in ixgbe_get_sfp_init_sequence_offsets()
1613 if (hw->phy.sfp_type == ixgbe_sfp_type_not_present) in ixgbe_get_sfp_init_sequence_offsets()
1616 if ((hw->device_id == IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM) && in ixgbe_get_sfp_init_sequence_offsets()
1617 (hw->phy.sfp_type == ixgbe_sfp_type_da_cu)) in ixgbe_get_sfp_init_sequence_offsets()
1636 if (hw->eeprom.ops.read(hw, IXGBE_PHY_INIT_OFFSET_NL, list_offset)) { in ixgbe_get_sfp_init_sequence_offsets()
1637 hw_err(hw, "eeprom read at %d failed\n", in ixgbe_get_sfp_init_sequence_offsets()
1652 if (hw->eeprom.ops.read(hw, *list_offset, &sfp_id)) in ixgbe_get_sfp_init_sequence_offsets()
1658 if (hw->eeprom.ops.read(hw, *list_offset, data_offset)) in ixgbe_get_sfp_init_sequence_offsets()
1661 hw_dbg(hw, "SFP+ module not supported\n"); in ixgbe_get_sfp_init_sequence_offsets()
1668 if (hw->eeprom.ops.read(hw, *list_offset, &sfp_id)) in ixgbe_get_sfp_init_sequence_offsets()
1674 hw_dbg(hw, "No matching SFP+ module found\n"); in ixgbe_get_sfp_init_sequence_offsets()
1681 hw_err(hw, "eeprom read at offset %d failed\n", *list_offset); in ixgbe_get_sfp_init_sequence_offsets()
1693 s32 ixgbe_read_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_eeprom_generic() argument
1696 return hw->phy.ops.read_i2c_byte(hw, byte_offset, in ixgbe_read_i2c_eeprom_generic()
1709 s32 ixgbe_read_i2c_sff8472_generic(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_sff8472_generic() argument
1712 return hw->phy.ops.read_i2c_byte(hw, byte_offset, in ixgbe_read_i2c_sff8472_generic()
1725 s32 ixgbe_write_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_write_i2c_eeprom_generic() argument
1728 return hw->phy.ops.write_i2c_byte(hw, byte_offset, in ixgbe_write_i2c_eeprom_generic()
1739 static bool ixgbe_is_sfp_probe(struct ixgbe_hw *hw, u8 offset, u8 addr) in ixgbe_is_sfp_probe() argument
1743 hw->phy.sfp_type == ixgbe_sfp_type_not_present) in ixgbe_is_sfp_probe()
1758 static s32 ixgbe_read_i2c_byte_generic_int(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_byte_generic_int() argument
1764 u32 swfw_mask = hw->phy.phy_semaphore_mask; in ixgbe_read_i2c_byte_generic_int()
1767 if (ixgbe_is_sfp_probe(hw, byte_offset, dev_addr)) in ixgbe_read_i2c_byte_generic_int()
1773 if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)) in ixgbe_read_i2c_byte_generic_int()
1776 ixgbe_i2c_start(hw); in ixgbe_read_i2c_byte_generic_int()
1779 status = ixgbe_clock_out_i2c_byte(hw, dev_addr); in ixgbe_read_i2c_byte_generic_int()
1783 status = ixgbe_get_i2c_ack(hw); in ixgbe_read_i2c_byte_generic_int()
1787 status = ixgbe_clock_out_i2c_byte(hw, byte_offset); in ixgbe_read_i2c_byte_generic_int()
1791 status = ixgbe_get_i2c_ack(hw); in ixgbe_read_i2c_byte_generic_int()
1795 ixgbe_i2c_start(hw); in ixgbe_read_i2c_byte_generic_int()
1798 status = ixgbe_clock_out_i2c_byte(hw, (dev_addr | 0x1)); in ixgbe_read_i2c_byte_generic_int()
1802 status = ixgbe_get_i2c_ack(hw); in ixgbe_read_i2c_byte_generic_int()
1806 status = ixgbe_clock_in_i2c_byte(hw, data); in ixgbe_read_i2c_byte_generic_int()
1810 status = ixgbe_clock_out_i2c_bit(hw, nack); in ixgbe_read_i2c_byte_generic_int()
1814 ixgbe_i2c_stop(hw); in ixgbe_read_i2c_byte_generic_int()
1816 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_read_i2c_byte_generic_int()
1820 ixgbe_i2c_bus_clear(hw); in ixgbe_read_i2c_byte_generic_int()
1822 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_read_i2c_byte_generic_int()
1827 hw_dbg(hw, "I2C byte read error - Retrying.\n"); in ixgbe_read_i2c_byte_generic_int()
1829 hw_dbg(hw, "I2C byte read error.\n"); in ixgbe_read_i2c_byte_generic_int()
1845 s32 ixgbe_read_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_byte_generic() argument
1848 return ixgbe_read_i2c_byte_generic_int(hw, byte_offset, dev_addr, in ixgbe_read_i2c_byte_generic()
1861 s32 ixgbe_read_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_byte_generic_unlocked() argument
1864 return ixgbe_read_i2c_byte_generic_int(hw, byte_offset, dev_addr, in ixgbe_read_i2c_byte_generic_unlocked()
1878 static s32 ixgbe_write_i2c_byte_generic_int(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_write_i2c_byte_generic_int() argument
1884 u32 swfw_mask = hw->phy.phy_semaphore_mask; in ixgbe_write_i2c_byte_generic_int()
1886 if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)) in ixgbe_write_i2c_byte_generic_int()
1890 ixgbe_i2c_start(hw); in ixgbe_write_i2c_byte_generic_int()
1892 status = ixgbe_clock_out_i2c_byte(hw, dev_addr); in ixgbe_write_i2c_byte_generic_int()
1896 status = ixgbe_get_i2c_ack(hw); in ixgbe_write_i2c_byte_generic_int()
1900 status = ixgbe_clock_out_i2c_byte(hw, byte_offset); in ixgbe_write_i2c_byte_generic_int()
1904 status = ixgbe_get_i2c_ack(hw); in ixgbe_write_i2c_byte_generic_int()
1908 status = ixgbe_clock_out_i2c_byte(hw, data); in ixgbe_write_i2c_byte_generic_int()
1912 status = ixgbe_get_i2c_ack(hw); in ixgbe_write_i2c_byte_generic_int()
1916 ixgbe_i2c_stop(hw); in ixgbe_write_i2c_byte_generic_int()
1918 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_write_i2c_byte_generic_int()
1922 ixgbe_i2c_bus_clear(hw); in ixgbe_write_i2c_byte_generic_int()
1925 hw_dbg(hw, "I2C byte write error - Retrying.\n"); in ixgbe_write_i2c_byte_generic_int()
1927 hw_dbg(hw, "I2C byte write error.\n"); in ixgbe_write_i2c_byte_generic_int()
1931 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_write_i2c_byte_generic_int()
1945 s32 ixgbe_write_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_write_i2c_byte_generic() argument
1948 return ixgbe_write_i2c_byte_generic_int(hw, byte_offset, dev_addr, in ixgbe_write_i2c_byte_generic()
1961 s32 ixgbe_write_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_write_i2c_byte_generic_unlocked() argument
1964 return ixgbe_write_i2c_byte_generic_int(hw, byte_offset, dev_addr, in ixgbe_write_i2c_byte_generic_unlocked()
1975 static void ixgbe_i2c_start(struct ixgbe_hw *hw) in ixgbe_i2c_start() argument
1977 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_i2c_start()
1979 i2cctl |= IXGBE_I2C_BB_EN(hw); in ixgbe_i2c_start()
1982 ixgbe_set_i2c_data(hw, &i2cctl, 1); in ixgbe_i2c_start()
1983 ixgbe_raise_i2c_clk(hw, &i2cctl); in ixgbe_i2c_start()
1988 ixgbe_set_i2c_data(hw, &i2cctl, 0); in ixgbe_i2c_start()
1993 ixgbe_lower_i2c_clk(hw, &i2cctl); in ixgbe_i2c_start()
2008 static void ixgbe_i2c_stop(struct ixgbe_hw *hw) in ixgbe_i2c_stop() argument
2010 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_i2c_stop()
2011 u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN(hw); in ixgbe_i2c_stop()
2012 u32 clk_oe_bit = IXGBE_I2C_CLK_OE_N_EN(hw); in ixgbe_i2c_stop()
2013 u32 bb_en_bit = IXGBE_I2C_BB_EN(hw); in ixgbe_i2c_stop()
2016 ixgbe_set_i2c_data(hw, &i2cctl, 0); in ixgbe_i2c_stop()
2017 ixgbe_raise_i2c_clk(hw, &i2cctl); in ixgbe_i2c_stop()
2022 ixgbe_set_i2c_data(hw, &i2cctl, 1); in ixgbe_i2c_stop()
2030 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), i2cctl); in ixgbe_i2c_stop()
2031 IXGBE_WRITE_FLUSH(hw); in ixgbe_i2c_stop()
2042 static s32 ixgbe_clock_in_i2c_byte(struct ixgbe_hw *hw, u8 *data) in ixgbe_clock_in_i2c_byte() argument
2049 ixgbe_clock_in_i2c_bit(hw, &bit); in ixgbe_clock_in_i2c_byte()
2063 static s32 ixgbe_clock_out_i2c_byte(struct ixgbe_hw *hw, u8 data) in ixgbe_clock_out_i2c_byte() argument
2072 status = ixgbe_clock_out_i2c_bit(hw, bit); in ixgbe_clock_out_i2c_byte()
2079 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_clock_out_i2c_byte()
2080 i2cctl |= IXGBE_I2C_DATA_OUT(hw); in ixgbe_clock_out_i2c_byte()
2081 i2cctl |= IXGBE_I2C_DATA_OE_N_EN(hw); in ixgbe_clock_out_i2c_byte()
2082 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), i2cctl); in ixgbe_clock_out_i2c_byte()
2083 IXGBE_WRITE_FLUSH(hw); in ixgbe_clock_out_i2c_byte()
2094 static s32 ixgbe_get_i2c_ack(struct ixgbe_hw *hw) in ixgbe_get_i2c_ack() argument
2096 u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN(hw); in ixgbe_get_i2c_ack()
2099 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_get_i2c_ack()
2104 i2cctl |= IXGBE_I2C_DATA_OUT(hw); in ixgbe_get_i2c_ack()
2106 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), i2cctl); in ixgbe_get_i2c_ack()
2107 IXGBE_WRITE_FLUSH(hw); in ixgbe_get_i2c_ack()
2109 ixgbe_raise_i2c_clk(hw, &i2cctl); in ixgbe_get_i2c_ack()
2117 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_get_i2c_ack()
2118 ack = ixgbe_get_i2c_data(hw, &i2cctl); in ixgbe_get_i2c_ack()
2126 hw_dbg(hw, "I2C ack was not received.\n"); in ixgbe_get_i2c_ack()
2130 ixgbe_lower_i2c_clk(hw, &i2cctl); in ixgbe_get_i2c_ack()
2145 static s32 ixgbe_clock_in_i2c_bit(struct ixgbe_hw *hw, bool *data) in ixgbe_clock_in_i2c_bit() argument
2147 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_clock_in_i2c_bit()
2148 u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN(hw); in ixgbe_clock_in_i2c_bit()
2151 i2cctl |= IXGBE_I2C_DATA_OUT(hw); in ixgbe_clock_in_i2c_bit()
2153 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), i2cctl); in ixgbe_clock_in_i2c_bit()
2154 IXGBE_WRITE_FLUSH(hw); in ixgbe_clock_in_i2c_bit()
2156 ixgbe_raise_i2c_clk(hw, &i2cctl); in ixgbe_clock_in_i2c_bit()
2161 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_clock_in_i2c_bit()
2162 *data = ixgbe_get_i2c_data(hw, &i2cctl); in ixgbe_clock_in_i2c_bit()
2164 ixgbe_lower_i2c_clk(hw, &i2cctl); in ixgbe_clock_in_i2c_bit()
2179 static s32 ixgbe_clock_out_i2c_bit(struct ixgbe_hw *hw, bool data) in ixgbe_clock_out_i2c_bit() argument
2182 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_clock_out_i2c_bit()
2184 status = ixgbe_set_i2c_data(hw, &i2cctl, data); in ixgbe_clock_out_i2c_bit()
2186 ixgbe_raise_i2c_clk(hw, &i2cctl); in ixgbe_clock_out_i2c_bit()
2191 ixgbe_lower_i2c_clk(hw, &i2cctl); in ixgbe_clock_out_i2c_bit()
2198 hw_dbg(hw, "I2C data was not set to %X\n", data); in ixgbe_clock_out_i2c_bit()
2212 static void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl) in ixgbe_raise_i2c_clk() argument
2214 u32 clk_oe_bit = IXGBE_I2C_CLK_OE_N_EN(hw); in ixgbe_raise_i2c_clk()
2221 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), *i2cctl); in ixgbe_raise_i2c_clk()
2225 *i2cctl |= IXGBE_I2C_CLK_OUT(hw); in ixgbe_raise_i2c_clk()
2226 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), *i2cctl); in ixgbe_raise_i2c_clk()
2227 IXGBE_WRITE_FLUSH(hw); in ixgbe_raise_i2c_clk()
2231 i2cctl_r = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_raise_i2c_clk()
2232 if (i2cctl_r & IXGBE_I2C_CLK_IN(hw)) in ixgbe_raise_i2c_clk()
2245 static void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl) in ixgbe_lower_i2c_clk() argument
2248 *i2cctl &= ~IXGBE_I2C_CLK_OUT(hw); in ixgbe_lower_i2c_clk()
2249 *i2cctl &= ~IXGBE_I2C_CLK_OE_N_EN(hw); in ixgbe_lower_i2c_clk()
2251 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), *i2cctl); in ixgbe_lower_i2c_clk()
2252 IXGBE_WRITE_FLUSH(hw); in ixgbe_lower_i2c_clk()
2267 static s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data) in ixgbe_set_i2c_data() argument
2269 u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN(hw); in ixgbe_set_i2c_data()
2272 *i2cctl |= IXGBE_I2C_DATA_OUT(hw); in ixgbe_set_i2c_data()
2274 *i2cctl &= ~IXGBE_I2C_DATA_OUT(hw); in ixgbe_set_i2c_data()
2277 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), *i2cctl); in ixgbe_set_i2c_data()
2278 IXGBE_WRITE_FLUSH(hw); in ixgbe_set_i2c_data()
2287 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), *i2cctl); in ixgbe_set_i2c_data()
2288 IXGBE_WRITE_FLUSH(hw); in ixgbe_set_i2c_data()
2292 *i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_set_i2c_data()
2293 if (data != ixgbe_get_i2c_data(hw, i2cctl)) { in ixgbe_set_i2c_data()
2294 hw_dbg(hw, "Error - I2C data was not set to %X.\n", data); in ixgbe_set_i2c_data()
2309 static bool ixgbe_get_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl) in ixgbe_get_i2c_data() argument
2311 u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN(hw); in ixgbe_get_i2c_data()
2315 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), *i2cctl); in ixgbe_get_i2c_data()
2316 IXGBE_WRITE_FLUSH(hw); in ixgbe_get_i2c_data()
2320 if (*i2cctl & IXGBE_I2C_DATA_IN(hw)) in ixgbe_get_i2c_data()
2332 static void ixgbe_i2c_bus_clear(struct ixgbe_hw *hw) in ixgbe_i2c_bus_clear() argument
2337 ixgbe_i2c_start(hw); in ixgbe_i2c_bus_clear()
2338 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_i2c_bus_clear()
2340 ixgbe_set_i2c_data(hw, &i2cctl, 1); in ixgbe_i2c_bus_clear()
2343 ixgbe_raise_i2c_clk(hw, &i2cctl); in ixgbe_i2c_bus_clear()
2348 ixgbe_lower_i2c_clk(hw, &i2cctl); in ixgbe_i2c_bus_clear()
2354 ixgbe_i2c_start(hw); in ixgbe_i2c_bus_clear()
2357 ixgbe_i2c_stop(hw); in ixgbe_i2c_bus_clear()
2366 s32 ixgbe_tn_check_overtemp(struct ixgbe_hw *hw) in ixgbe_tn_check_overtemp() argument
2370 if (hw->device_id != IXGBE_DEV_ID_82599_T3_LOM) in ixgbe_tn_check_overtemp()
2374 hw->phy.ops.read_reg(hw, IXGBE_TN_LASI_STATUS_REG, in ixgbe_tn_check_overtemp()
2387 s32 ixgbe_set_copper_phy_power(struct ixgbe_hw *hw, bool on) in ixgbe_set_copper_phy_power() argument
2393 if (hw->mac.ops.get_media_type(hw) != ixgbe_media_type_copper) in ixgbe_set_copper_phy_power()
2396 status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_VENDOR_SPECIFIC_1_CONTROL, in ixgbe_set_copper_phy_power()
2405 if (ixgbe_check_reset_blocked(hw)) in ixgbe_set_copper_phy_power()
2410 status = hw->phy.ops.write_reg(hw, IXGBE_MDIO_VENDOR_SPECIFIC_1_CONTROL, in ixgbe_set_copper_phy_power()