1782 s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,  in ixgbe_set_rar_generic()  argument
1795 	hw->mac.ops.set_vmdq(hw, index, vmdq);  in ixgbe_set_rar_generic()
2871 s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq)  in ixgbe_clear_vmdq_generic()  argument
2891 	if (vmdq == IXGBE_CLEAR_VMDQ_ALL) {  in ixgbe_clear_vmdq_generic()
2900 	} else if (vmdq < 32) {  in ixgbe_clear_vmdq_generic()
2901 		mpsar_lo &= ~(1 << vmdq);  in ixgbe_clear_vmdq_generic()
2904 		mpsar_hi &= ~(1 << (vmdq - 32));  in ixgbe_clear_vmdq_generic()
2920 s32 ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq)  in ixgbe_set_vmdq_generic()  argument
2931 	if (vmdq < 32) {  in ixgbe_set_vmdq_generic()
2933 		mpsar |= 1 << vmdq;  in ixgbe_set_vmdq_generic()
2937 		mpsar |= 1 << (vmdq - 32);  in ixgbe_set_vmdq_generic()
2953 s32 ixgbe_set_vmdq_san_mac_generic(struct ixgbe_hw *hw, u32 vmdq)  in ixgbe_set_vmdq_san_mac_generic()  argument
2957 	if (vmdq < 32) {  in ixgbe_set_vmdq_san_mac_generic()
2958 		IXGBE_WRITE_REG(hw, IXGBE_MPSAR_LO(rar), 1 << vmdq);  in ixgbe_set_vmdq_san_mac_generic()
2962 		IXGBE_WRITE_REG(hw, IXGBE_MPSAR_HI(rar), 1 << (vmdq - 32));  in ixgbe_set_vmdq_san_mac_generic()