Lines Matching refs:hw

44 static void ixgbe_disable_tx_laser_multispeed_fiber(struct ixgbe_hw *hw);
45 static void ixgbe_enable_tx_laser_multispeed_fiber(struct ixgbe_hw *hw);
46 static void ixgbe_flap_tx_laser_multispeed_fiber(struct ixgbe_hw *hw);
49 static s32 ixgbe_setup_mac_link_smartspeed(struct ixgbe_hw *hw,
52 static void ixgbe_stop_mac_link_on_d3_82599(struct ixgbe_hw *hw);
53 static s32 ixgbe_start_mac_link_82599(struct ixgbe_hw *hw,
55 static s32 ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw,
58 static s32 ixgbe_setup_copper_link_82599(struct ixgbe_hw *hw,
61 static s32 ixgbe_verify_fw_version_82599(struct ixgbe_hw *hw);
62 static s32 ixgbe_read_i2c_byte_82599(struct ixgbe_hw *hw, u8 byte_offset,
64 static s32 ixgbe_write_i2c_byte_82599(struct ixgbe_hw *hw, u8 byte_offset,
66 static s32 ixgbe_reset_pipeline_82599(struct ixgbe_hw *hw);
67 static bool ixgbe_verify_lesm_fw_enabled_82599(struct ixgbe_hw *hw);
69 bool ixgbe_mng_enabled(struct ixgbe_hw *hw) in ixgbe_mng_enabled() argument
73 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw)); in ixgbe_mng_enabled()
77 manc = IXGBE_READ_REG(hw, IXGBE_MANC); in ixgbe_mng_enabled()
81 factps = IXGBE_READ_REG(hw, IXGBE_FACTPS(hw)); in ixgbe_mng_enabled()
88 static void ixgbe_init_mac_link_ops_82599(struct ixgbe_hw *hw) in ixgbe_init_mac_link_ops_82599() argument
90 struct ixgbe_mac_info *mac = &hw->mac; in ixgbe_init_mac_link_ops_82599()
95 if ((mac->ops.get_media_type(hw) == ixgbe_media_type_fiber) && in ixgbe_init_mac_link_ops_82599()
96 !ixgbe_mng_enabled(hw)) { in ixgbe_init_mac_link_ops_82599()
108 if (hw->phy.multispeed_fiber) { in ixgbe_init_mac_link_ops_82599()
115 if ((mac->ops.get_media_type(hw) == in ixgbe_init_mac_link_ops_82599()
117 (hw->phy.smart_speed == ixgbe_smart_speed_auto || in ixgbe_init_mac_link_ops_82599()
118 hw->phy.smart_speed == ixgbe_smart_speed_on) && in ixgbe_init_mac_link_ops_82599()
119 !ixgbe_verify_lesm_fw_enabled_82599(hw)) in ixgbe_init_mac_link_ops_82599()
126 static s32 ixgbe_setup_sfp_modules_82599(struct ixgbe_hw *hw) in ixgbe_setup_sfp_modules_82599() argument
131 if (hw->phy.sfp_type != ixgbe_sfp_type_unknown) { in ixgbe_setup_sfp_modules_82599()
132 ixgbe_init_mac_link_ops_82599(hw); in ixgbe_setup_sfp_modules_82599()
134 hw->phy.ops.reset = NULL; in ixgbe_setup_sfp_modules_82599()
136 ret_val = ixgbe_get_sfp_init_sequence_offsets(hw, &list_offset, in ixgbe_setup_sfp_modules_82599()
142 ret_val = hw->mac.ops.acquire_swfw_sync(hw, in ixgbe_setup_sfp_modules_82599()
147 if (hw->eeprom.ops.read(hw, ++data_offset, &data_value)) in ixgbe_setup_sfp_modules_82599()
150 IXGBE_WRITE_REG(hw, IXGBE_CORECTL, data_value); in ixgbe_setup_sfp_modules_82599()
151 IXGBE_WRITE_FLUSH(hw); in ixgbe_setup_sfp_modules_82599()
152 if (hw->eeprom.ops.read(hw, ++data_offset, &data_value)) in ixgbe_setup_sfp_modules_82599()
157 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_MAC_CSR_SM); in ixgbe_setup_sfp_modules_82599()
162 usleep_range(hw->eeprom.semaphore_delay * 1000, in ixgbe_setup_sfp_modules_82599()
163 hw->eeprom.semaphore_delay * 2000); in ixgbe_setup_sfp_modules_82599()
166 ret_val = hw->mac.ops.prot_autoc_write(hw, in ixgbe_setup_sfp_modules_82599()
167 hw->mac.orig_autoc | IXGBE_AUTOC_LMS_10G_SERIAL, in ixgbe_setup_sfp_modules_82599()
171 hw_dbg(hw, " sfp module setup not complete\n"); in ixgbe_setup_sfp_modules_82599()
180 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_MAC_CSR_SM); in ixgbe_setup_sfp_modules_82599()
184 usleep_range(hw->eeprom.semaphore_delay * 1000, in ixgbe_setup_sfp_modules_82599()
185 hw->eeprom.semaphore_delay * 2000); in ixgbe_setup_sfp_modules_82599()
186 hw_err(hw, "eeprom read at offset %d failed\n", data_offset); in ixgbe_setup_sfp_modules_82599()
201 static s32 prot_autoc_read_82599(struct ixgbe_hw *hw, bool *locked, in prot_autoc_read_82599() argument
208 if (ixgbe_verify_lesm_fw_enabled_82599(hw)) { in prot_autoc_read_82599()
209 ret_val = hw->mac.ops.acquire_swfw_sync(hw, in prot_autoc_read_82599()
217 *reg_val = IXGBE_READ_REG(hw, IXGBE_AUTOC); in prot_autoc_read_82599()
231 static s32 prot_autoc_write_82599(struct ixgbe_hw *hw, u32 autoc, bool locked) in prot_autoc_write_82599() argument
236 if (ixgbe_check_reset_blocked(hw)) in prot_autoc_write_82599()
243 if (!locked && ixgbe_verify_lesm_fw_enabled_82599(hw)) { in prot_autoc_write_82599()
244 ret_val = hw->mac.ops.acquire_swfw_sync(hw, in prot_autoc_write_82599()
252 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc); in prot_autoc_write_82599()
253 ret_val = ixgbe_reset_pipeline_82599(hw); in prot_autoc_write_82599()
260 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_MAC_CSR_SM); in prot_autoc_write_82599()
265 static s32 ixgbe_get_invariants_82599(struct ixgbe_hw *hw) in ixgbe_get_invariants_82599() argument
267 struct ixgbe_mac_info *mac = &hw->mac; in ixgbe_get_invariants_82599()
269 ixgbe_init_mac_link_ops_82599(hw); in ixgbe_get_invariants_82599()
277 mac->max_msix_vectors = ixgbe_get_pcie_msix_count_generic(hw); in ixgbe_get_invariants_82599()
291 static s32 ixgbe_init_phy_ops_82599(struct ixgbe_hw *hw) in ixgbe_init_phy_ops_82599() argument
293 struct ixgbe_mac_info *mac = &hw->mac; in ixgbe_init_phy_ops_82599()
294 struct ixgbe_phy_info *phy = &hw->phy; in ixgbe_init_phy_ops_82599()
298 if (hw->device_id == IXGBE_DEV_ID_82599_QSFP_SF_QP) { in ixgbe_init_phy_ops_82599()
300 hw->phy.qsfp_shared_i2c_bus = true; in ixgbe_init_phy_ops_82599()
303 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); in ixgbe_init_phy_ops_82599()
309 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp); in ixgbe_init_phy_ops_82599()
310 IXGBE_WRITE_FLUSH(hw); in ixgbe_init_phy_ops_82599()
317 ret_val = phy->ops.identify(hw); in ixgbe_init_phy_ops_82599()
320 ixgbe_init_mac_link_ops_82599(hw); in ixgbe_init_phy_ops_82599()
323 if (mac->ops.get_media_type(hw) == ixgbe_media_type_copper) { in ixgbe_init_phy_ops_82599()
330 switch (hw->phy.type) { in ixgbe_init_phy_ops_82599()
352 static s32 ixgbe_get_link_capabilities_82599(struct ixgbe_hw *hw, in ixgbe_get_link_capabilities_82599() argument
359 if (hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core0 || in ixgbe_get_link_capabilities_82599()
360 hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core1 || in ixgbe_get_link_capabilities_82599()
361 hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core0 || in ixgbe_get_link_capabilities_82599()
362 hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core1 || in ixgbe_get_link_capabilities_82599()
363 hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core0 || in ixgbe_get_link_capabilities_82599()
364 hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core1) { in ixgbe_get_link_capabilities_82599()
375 if (hw->mac.orig_link_settings_stored) in ixgbe_get_link_capabilities_82599()
376 autoc = hw->mac.orig_autoc; in ixgbe_get_link_capabilities_82599()
378 autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC); in ixgbe_get_link_capabilities_82599()
433 if (hw->phy.multispeed_fiber) { in ixgbe_get_link_capabilities_82599()
438 if (hw->phy.media_type == ixgbe_media_type_fiber_qsfp) in ixgbe_get_link_capabilities_82599()
453 static enum ixgbe_media_type ixgbe_get_media_type_82599(struct ixgbe_hw *hw) in ixgbe_get_media_type_82599() argument
456 switch (hw->phy.type) { in ixgbe_get_media_type_82599()
465 switch (hw->device_id) { in ixgbe_get_media_type_82599()
507 static void ixgbe_stop_mac_link_on_d3_82599(struct ixgbe_hw *hw) in ixgbe_stop_mac_link_on_d3_82599() argument
512 hw->eeprom.ops.read(hw, IXGBE_EEPROM_CTRL_2, &ee_ctrl_2); in ixgbe_stop_mac_link_on_d3_82599()
514 if (!ixgbe_mng_present(hw) && !hw->wol_enabled && in ixgbe_stop_mac_link_on_d3_82599()
516 autoc2_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC2); in ixgbe_stop_mac_link_on_d3_82599()
518 IXGBE_WRITE_REG(hw, IXGBE_AUTOC2, autoc2_reg); in ixgbe_stop_mac_link_on_d3_82599()
530 static s32 ixgbe_start_mac_link_82599(struct ixgbe_hw *hw, in ixgbe_start_mac_link_82599() argument
539 if (ixgbe_verify_lesm_fw_enabled_82599(hw)) { in ixgbe_start_mac_link_82599()
540 status = hw->mac.ops.acquire_swfw_sync(hw, in ixgbe_start_mac_link_82599()
549 ixgbe_reset_pipeline_82599(hw); in ixgbe_start_mac_link_82599()
552 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_MAC_CSR_SM); in ixgbe_start_mac_link_82599()
556 autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC); in ixgbe_start_mac_link_82599()
565 links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS); in ixgbe_start_mac_link_82599()
572 hw_dbg(hw, "Autoneg did not complete.\n"); in ixgbe_start_mac_link_82599()
591 static void ixgbe_disable_tx_laser_multispeed_fiber(struct ixgbe_hw *hw) in ixgbe_disable_tx_laser_multispeed_fiber() argument
593 u32 esdp_reg = IXGBE_READ_REG(hw, IXGBE_ESDP); in ixgbe_disable_tx_laser_multispeed_fiber()
596 if (ixgbe_check_reset_blocked(hw)) in ixgbe_disable_tx_laser_multispeed_fiber()
601 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp_reg); in ixgbe_disable_tx_laser_multispeed_fiber()
602 IXGBE_WRITE_FLUSH(hw); in ixgbe_disable_tx_laser_multispeed_fiber()
614 static void ixgbe_enable_tx_laser_multispeed_fiber(struct ixgbe_hw *hw) in ixgbe_enable_tx_laser_multispeed_fiber() argument
616 u32 esdp_reg = IXGBE_READ_REG(hw, IXGBE_ESDP); in ixgbe_enable_tx_laser_multispeed_fiber()
620 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp_reg); in ixgbe_enable_tx_laser_multispeed_fiber()
621 IXGBE_WRITE_FLUSH(hw); in ixgbe_enable_tx_laser_multispeed_fiber()
637 static void ixgbe_flap_tx_laser_multispeed_fiber(struct ixgbe_hw *hw) in ixgbe_flap_tx_laser_multispeed_fiber() argument
640 if (ixgbe_check_reset_blocked(hw)) in ixgbe_flap_tx_laser_multispeed_fiber()
643 if (hw->mac.autotry_restart) { in ixgbe_flap_tx_laser_multispeed_fiber()
644 ixgbe_disable_tx_laser_multispeed_fiber(hw); in ixgbe_flap_tx_laser_multispeed_fiber()
645 ixgbe_enable_tx_laser_multispeed_fiber(hw); in ixgbe_flap_tx_laser_multispeed_fiber()
646 hw->mac.autotry_restart = false; in ixgbe_flap_tx_laser_multispeed_fiber()
658 ixgbe_set_hard_rate_select_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed) in ixgbe_set_hard_rate_select_speed() argument
660 u32 esdp_reg = IXGBE_READ_REG(hw, IXGBE_ESDP); in ixgbe_set_hard_rate_select_speed()
671 hw_dbg(hw, "Invalid fixed module speed\n"); in ixgbe_set_hard_rate_select_speed()
675 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp_reg); in ixgbe_set_hard_rate_select_speed()
676 IXGBE_WRITE_FLUSH(hw); in ixgbe_set_hard_rate_select_speed()
687 static s32 ixgbe_setup_mac_link_smartspeed(struct ixgbe_hw *hw, in ixgbe_setup_mac_link_smartspeed() argument
695 u32 autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC); in ixgbe_setup_mac_link_smartspeed()
698 hw->phy.autoneg_advertised = 0; in ixgbe_setup_mac_link_smartspeed()
701 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_10GB_FULL; in ixgbe_setup_mac_link_smartspeed()
704 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_1GB_FULL; in ixgbe_setup_mac_link_smartspeed()
707 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_100_FULL; in ixgbe_setup_mac_link_smartspeed()
717 hw->phy.smart_speed_active = false; in ixgbe_setup_mac_link_smartspeed()
719 status = ixgbe_setup_mac_link_82599(hw, speed, in ixgbe_setup_mac_link_smartspeed()
734 status = hw->mac.ops.check_link(hw, &link_speed, in ixgbe_setup_mac_link_smartspeed()
753 hw->phy.smart_speed_active = true; in ixgbe_setup_mac_link_smartspeed()
754 status = ixgbe_setup_mac_link_82599(hw, speed, in ixgbe_setup_mac_link_smartspeed()
769 status = hw->mac.ops.check_link(hw, &link_speed, in ixgbe_setup_mac_link_smartspeed()
779 hw->phy.smart_speed_active = false; in ixgbe_setup_mac_link_smartspeed()
780 status = ixgbe_setup_mac_link_82599(hw, speed, in ixgbe_setup_mac_link_smartspeed()
785 hw_dbg(hw, "Smartspeed has downgraded the link speed from the maximum advertised\n"); in ixgbe_setup_mac_link_smartspeed()
797 static s32 ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw, in ixgbe_setup_mac_link_82599() argument
804 u32 autoc2 = IXGBE_READ_REG(hw, IXGBE_AUTOC2); in ixgbe_setup_mac_link_82599()
809 u32 current_autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC); in ixgbe_setup_mac_link_82599()
816 status = hw->mac.ops.get_link_capabilities(hw, &link_capabilities, in ixgbe_setup_mac_link_82599()
827 if (hw->mac.orig_link_settings_stored) in ixgbe_setup_mac_link_82599()
828 orig_autoc = hw->mac.orig_autoc; in ixgbe_setup_mac_link_82599()
844 (hw->phy.smart_speed_active == false)) in ixgbe_setup_mac_link_82599()
873 status = hw->mac.ops.prot_autoc_write(hw, autoc, false); in ixgbe_setup_mac_link_82599()
885 IXGBE_READ_REG(hw, IXGBE_LINKS); in ixgbe_setup_mac_link_82599()
893 hw_dbg(hw, "Autoneg did not complete.\n"); in ixgbe_setup_mac_link_82599()
913 static s32 ixgbe_setup_copper_link_82599(struct ixgbe_hw *hw, in ixgbe_setup_copper_link_82599() argument
920 status = hw->phy.ops.setup_link_speed(hw, speed, in ixgbe_setup_copper_link_82599()
923 ixgbe_start_mac_link_82599(hw, autoneg_wait_to_complete); in ixgbe_setup_copper_link_82599()
936 static s32 ixgbe_reset_hw_82599(struct ixgbe_hw *hw) in ixgbe_reset_hw_82599() argument
945 status = hw->mac.ops.stop_adapter(hw); in ixgbe_reset_hw_82599()
950 ixgbe_clear_tx_pending(hw); in ixgbe_reset_hw_82599()
955 status = hw->phy.ops.init(hw); in ixgbe_reset_hw_82599()
961 if (hw->phy.sfp_setup_needed) { in ixgbe_reset_hw_82599()
962 status = hw->mac.ops.setup_sfp(hw); in ixgbe_reset_hw_82599()
963 hw->phy.sfp_setup_needed = false; in ixgbe_reset_hw_82599()
970 if (hw->phy.reset_disable == false && hw->phy.ops.reset != NULL) in ixgbe_reset_hw_82599()
971 hw->phy.ops.reset(hw); in ixgbe_reset_hw_82599()
974 curr_lms = IXGBE_READ_REG(hw, IXGBE_AUTOC) & IXGBE_AUTOC_LMS_MASK; in ixgbe_reset_hw_82599()
984 if (!hw->force_full_reset) { in ixgbe_reset_hw_82599()
985 hw->mac.ops.check_link(hw, &link_speed, &link_up, false); in ixgbe_reset_hw_82599()
990 ctrl |= IXGBE_READ_REG(hw, IXGBE_CTRL); in ixgbe_reset_hw_82599()
991 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl); in ixgbe_reset_hw_82599()
992 IXGBE_WRITE_FLUSH(hw); in ixgbe_reset_hw_82599()
997 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL); in ixgbe_reset_hw_82599()
1004 hw_dbg(hw, "Reset polling failed to complete.\n"); in ixgbe_reset_hw_82599()
1014 if (hw->mac.flags & IXGBE_FLAGS_DOUBLE_RESET_REQUIRED) { in ixgbe_reset_hw_82599()
1015 hw->mac.flags &= ~IXGBE_FLAGS_DOUBLE_RESET_REQUIRED; in ixgbe_reset_hw_82599()
1024 autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC); in ixgbe_reset_hw_82599()
1025 autoc2 = IXGBE_READ_REG(hw, IXGBE_AUTOC2); in ixgbe_reset_hw_82599()
1030 IXGBE_WRITE_REG(hw, IXGBE_AUTOC2, autoc2); in ixgbe_reset_hw_82599()
1031 IXGBE_WRITE_FLUSH(hw); in ixgbe_reset_hw_82599()
1034 if (hw->mac.orig_link_settings_stored == false) { in ixgbe_reset_hw_82599()
1035 hw->mac.orig_autoc = autoc; in ixgbe_reset_hw_82599()
1036 hw->mac.orig_autoc2 = autoc2; in ixgbe_reset_hw_82599()
1037 hw->mac.orig_link_settings_stored = true; in ixgbe_reset_hw_82599()
1046 if ((hw->phy.multispeed_fiber && ixgbe_mng_enabled(hw)) || in ixgbe_reset_hw_82599()
1047 hw->wol_enabled) in ixgbe_reset_hw_82599()
1048 hw->mac.orig_autoc = in ixgbe_reset_hw_82599()
1049 (hw->mac.orig_autoc & ~IXGBE_AUTOC_LMS_MASK) | in ixgbe_reset_hw_82599()
1052 if (autoc != hw->mac.orig_autoc) { in ixgbe_reset_hw_82599()
1053 status = hw->mac.ops.prot_autoc_write(hw, in ixgbe_reset_hw_82599()
1054 hw->mac.orig_autoc, in ixgbe_reset_hw_82599()
1061 (hw->mac.orig_autoc2 & IXGBE_AUTOC2_UPPER_MASK)) { in ixgbe_reset_hw_82599()
1063 autoc2 |= (hw->mac.orig_autoc2 & in ixgbe_reset_hw_82599()
1065 IXGBE_WRITE_REG(hw, IXGBE_AUTOC2, autoc2); in ixgbe_reset_hw_82599()
1070 hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr); in ixgbe_reset_hw_82599()
1077 hw->mac.num_rar_entries = 128; in ixgbe_reset_hw_82599()
1078 hw->mac.ops.init_rx_addrs(hw); in ixgbe_reset_hw_82599()
1081 hw->mac.ops.get_san_mac_addr(hw, hw->mac.san_addr); in ixgbe_reset_hw_82599()
1084 if (is_valid_ether_addr(hw->mac.san_addr)) { in ixgbe_reset_hw_82599()
1085 hw->mac.ops.set_rar(hw, hw->mac.num_rar_entries - 1, in ixgbe_reset_hw_82599()
1086 hw->mac.san_addr, 0, IXGBE_RAH_AV); in ixgbe_reset_hw_82599()
1089 hw->mac.san_mac_rar_index = hw->mac.num_rar_entries - 1; in ixgbe_reset_hw_82599()
1092 hw->mac.num_rar_entries--; in ixgbe_reset_hw_82599()
1096 hw->mac.ops.get_wwn_prefix(hw, &hw->mac.wwnn_prefix, in ixgbe_reset_hw_82599()
1097 &hw->mac.wwpn_prefix); in ixgbe_reset_hw_82599()
1107 static s32 ixgbe_fdir_check_cmd_complete(struct ixgbe_hw *hw, u32 *fdircmd) in ixgbe_fdir_check_cmd_complete() argument
1112 *fdircmd = IXGBE_READ_REG(hw, IXGBE_FDIRCMD); in ixgbe_fdir_check_cmd_complete()
1125 s32 ixgbe_reinit_fdir_tables_82599(struct ixgbe_hw *hw) in ixgbe_reinit_fdir_tables_82599() argument
1128 u32 fdirctrl = IXGBE_READ_REG(hw, IXGBE_FDIRCTRL); in ixgbe_reinit_fdir_tables_82599()
1138 err = ixgbe_fdir_check_cmd_complete(hw, &fdircmd); in ixgbe_reinit_fdir_tables_82599()
1140 …hw_dbg(hw, "Flow Director previous command did not complete, aborting table re-initialization.\n"); in ixgbe_reinit_fdir_tables_82599()
1144 IXGBE_WRITE_REG(hw, IXGBE_FDIRFREE, 0); in ixgbe_reinit_fdir_tables_82599()
1145 IXGBE_WRITE_FLUSH(hw); in ixgbe_reinit_fdir_tables_82599()
1153 IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD, in ixgbe_reinit_fdir_tables_82599()
1154 (IXGBE_READ_REG(hw, IXGBE_FDIRCMD) | in ixgbe_reinit_fdir_tables_82599()
1156 IXGBE_WRITE_FLUSH(hw); in ixgbe_reinit_fdir_tables_82599()
1157 IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD, in ixgbe_reinit_fdir_tables_82599()
1158 (IXGBE_READ_REG(hw, IXGBE_FDIRCMD) & in ixgbe_reinit_fdir_tables_82599()
1160 IXGBE_WRITE_FLUSH(hw); in ixgbe_reinit_fdir_tables_82599()
1165 IXGBE_WRITE_REG(hw, IXGBE_FDIRHASH, 0x00); in ixgbe_reinit_fdir_tables_82599()
1166 IXGBE_WRITE_FLUSH(hw); in ixgbe_reinit_fdir_tables_82599()
1168 IXGBE_WRITE_REG(hw, IXGBE_FDIRCTRL, fdirctrl); in ixgbe_reinit_fdir_tables_82599()
1169 IXGBE_WRITE_FLUSH(hw); in ixgbe_reinit_fdir_tables_82599()
1173 if (IXGBE_READ_REG(hw, IXGBE_FDIRCTRL) & in ixgbe_reinit_fdir_tables_82599()
1179 hw_dbg(hw, "Flow Director Signature poll time exceeded!\n"); in ixgbe_reinit_fdir_tables_82599()
1184 IXGBE_READ_REG(hw, IXGBE_FDIRUSTAT); in ixgbe_reinit_fdir_tables_82599()
1185 IXGBE_READ_REG(hw, IXGBE_FDIRFSTAT); in ixgbe_reinit_fdir_tables_82599()
1186 IXGBE_READ_REG(hw, IXGBE_FDIRMATCH); in ixgbe_reinit_fdir_tables_82599()
1187 IXGBE_READ_REG(hw, IXGBE_FDIRMISS); in ixgbe_reinit_fdir_tables_82599()
1188 IXGBE_READ_REG(hw, IXGBE_FDIRLEN); in ixgbe_reinit_fdir_tables_82599()
1198 static void ixgbe_fdir_enable_82599(struct ixgbe_hw *hw, u32 fdirctrl) in ixgbe_fdir_enable_82599() argument
1203 IXGBE_WRITE_REG(hw, IXGBE_FDIRHKEY, IXGBE_ATR_BUCKET_HASH_KEY); in ixgbe_fdir_enable_82599()
1204 IXGBE_WRITE_REG(hw, IXGBE_FDIRSKEY, IXGBE_ATR_SIGNATURE_HASH_KEY); in ixgbe_fdir_enable_82599()
1219 IXGBE_WRITE_REG(hw, IXGBE_FDIRCTRL, fdirctrl); in ixgbe_fdir_enable_82599()
1220 IXGBE_WRITE_FLUSH(hw); in ixgbe_fdir_enable_82599()
1222 if (IXGBE_READ_REG(hw, IXGBE_FDIRCTRL) & in ixgbe_fdir_enable_82599()
1229 hw_dbg(hw, "Flow Director poll time exceeded!\n"); in ixgbe_fdir_enable_82599()
1238 s32 ixgbe_init_fdir_signature_82599(struct ixgbe_hw *hw, u32 fdirctrl) in ixgbe_init_fdir_signature_82599() argument
1251 ixgbe_fdir_enable_82599(hw, fdirctrl); in ixgbe_init_fdir_signature_82599()
1262 s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 fdirctrl) in ixgbe_init_fdir_perfect_82599() argument
1279 ixgbe_fdir_enable_82599(hw, fdirctrl); in ixgbe_init_fdir_perfect_82599()
1384 s32 ixgbe_fdir_add_signature_filter_82599(struct ixgbe_hw *hw, in ixgbe_fdir_add_signature_filter_82599() argument
1410 hw_dbg(hw, " Error on flow type input\n"); in ixgbe_fdir_add_signature_filter_82599()
1428 IXGBE_WRITE_REG64(hw, IXGBE_FDIRHASH, fdirhashcmd); in ixgbe_fdir_add_signature_filter_82599()
1430 hw_dbg(hw, "Tx Queue=%x hash=%x\n", queue, (u32)fdirhashcmd); in ixgbe_fdir_add_signature_filter_82599()
1540 s32 ixgbe_fdir_set_input_mask_82599(struct ixgbe_hw *hw, in ixgbe_fdir_set_input_mask_82599() argument
1559 hw_dbg(hw, " bucket hash should always be 0 in mask\n"); in ixgbe_fdir_set_input_mask_82599()
1568 hw_dbg(hw, " Error on vm pool mask\n"); in ixgbe_fdir_set_input_mask_82599()
1577 hw_dbg(hw, " Error on src/dst port mask\n"); in ixgbe_fdir_set_input_mask_82599()
1583 hw_dbg(hw, " Error on flow type mask\n"); in ixgbe_fdir_set_input_mask_82599()
1602 hw_dbg(hw, " Error on VLAN mask\n"); in ixgbe_fdir_set_input_mask_82599()
1613 hw_dbg(hw, " Error on flexible byte mask\n"); in ixgbe_fdir_set_input_mask_82599()
1618 IXGBE_WRITE_REG(hw, IXGBE_FDIRM, fdirm); in ixgbe_fdir_set_input_mask_82599()
1624 IXGBE_WRITE_REG(hw, IXGBE_FDIRTCPM, ~fdirtcpm); in ixgbe_fdir_set_input_mask_82599()
1625 IXGBE_WRITE_REG(hw, IXGBE_FDIRUDPM, ~fdirtcpm); in ixgbe_fdir_set_input_mask_82599()
1628 switch (hw->mac.type) { in ixgbe_fdir_set_input_mask_82599()
1631 IXGBE_WRITE_REG(hw, IXGBE_FDIRSCTPM, ~fdirtcpm); in ixgbe_fdir_set_input_mask_82599()
1638 IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRSIP4M, in ixgbe_fdir_set_input_mask_82599()
1640 IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRDIP4M, in ixgbe_fdir_set_input_mask_82599()
1646 s32 ixgbe_fdir_write_perfect_filter_82599(struct ixgbe_hw *hw, in ixgbe_fdir_write_perfect_filter_82599() argument
1654 IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRSIPv6(0), in ixgbe_fdir_write_perfect_filter_82599()
1656 IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRSIPv6(1), in ixgbe_fdir_write_perfect_filter_82599()
1658 IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRSIPv6(2), in ixgbe_fdir_write_perfect_filter_82599()
1662 IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRIPSA, input->formatted.src_ip[0]); in ixgbe_fdir_write_perfect_filter_82599()
1665 IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRIPDA, input->formatted.dst_ip[0]); in ixgbe_fdir_write_perfect_filter_82599()
1671 IXGBE_WRITE_REG(hw, IXGBE_FDIRPORT, fdirport); in ixgbe_fdir_write_perfect_filter_82599()
1677 IXGBE_WRITE_REG(hw, IXGBE_FDIRVLAN, fdirvlan); in ixgbe_fdir_write_perfect_filter_82599()
1682 IXGBE_WRITE_REG(hw, IXGBE_FDIRHASH, fdirhash); in ixgbe_fdir_write_perfect_filter_82599()
1688 IXGBE_WRITE_FLUSH(hw); in ixgbe_fdir_write_perfect_filter_82599()
1699 IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD, fdircmd); in ixgbe_fdir_write_perfect_filter_82599()
1700 err = ixgbe_fdir_check_cmd_complete(hw, &fdircmd); in ixgbe_fdir_write_perfect_filter_82599()
1702 hw_dbg(hw, "Flow Director command did not complete!\n"); in ixgbe_fdir_write_perfect_filter_82599()
1709 s32 ixgbe_fdir_erase_perfect_filter_82599(struct ixgbe_hw *hw, in ixgbe_fdir_erase_perfect_filter_82599() argument
1720 IXGBE_WRITE_REG(hw, IXGBE_FDIRHASH, fdirhash); in ixgbe_fdir_erase_perfect_filter_82599()
1723 IXGBE_WRITE_FLUSH(hw); in ixgbe_fdir_erase_perfect_filter_82599()
1726 IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD, IXGBE_FDIRCMD_CMD_QUERY_REM_FILT); in ixgbe_fdir_erase_perfect_filter_82599()
1728 err = ixgbe_fdir_check_cmd_complete(hw, &fdircmd); in ixgbe_fdir_erase_perfect_filter_82599()
1730 hw_dbg(hw, "Flow Director command did not complete!\n"); in ixgbe_fdir_erase_perfect_filter_82599()
1736 IXGBE_WRITE_REG(hw, IXGBE_FDIRHASH, fdirhash); in ixgbe_fdir_erase_perfect_filter_82599()
1737 IXGBE_WRITE_FLUSH(hw); in ixgbe_fdir_erase_perfect_filter_82599()
1738 IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD, in ixgbe_fdir_erase_perfect_filter_82599()
1753 static s32 ixgbe_read_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 *val) in ixgbe_read_analog_reg8_82599() argument
1757 IXGBE_WRITE_REG(hw, IXGBE_CORECTL, IXGBE_CORECTL_WRITE_CMD | in ixgbe_read_analog_reg8_82599()
1759 IXGBE_WRITE_FLUSH(hw); in ixgbe_read_analog_reg8_82599()
1761 core_ctl = IXGBE_READ_REG(hw, IXGBE_CORECTL); in ixgbe_read_analog_reg8_82599()
1775 static s32 ixgbe_write_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 val) in ixgbe_write_analog_reg8_82599() argument
1780 IXGBE_WRITE_REG(hw, IXGBE_CORECTL, core_ctl); in ixgbe_write_analog_reg8_82599()
1781 IXGBE_WRITE_FLUSH(hw); in ixgbe_write_analog_reg8_82599()
1795 static s32 ixgbe_start_hw_82599(struct ixgbe_hw *hw) in ixgbe_start_hw_82599() argument
1799 ret_val = ixgbe_start_hw_generic(hw); in ixgbe_start_hw_82599()
1803 ret_val = ixgbe_start_hw_gen2(hw); in ixgbe_start_hw_82599()
1808 hw->mac.autotry_restart = true; in ixgbe_start_hw_82599()
1813 return ixgbe_verify_fw_version_82599(hw); in ixgbe_start_hw_82599()
1824 static s32 ixgbe_identify_phy_82599(struct ixgbe_hw *hw) in ixgbe_identify_phy_82599() argument
1829 status = ixgbe_identify_phy_generic(hw); in ixgbe_identify_phy_82599()
1832 if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_copper) in ixgbe_identify_phy_82599()
1834 status = ixgbe_identify_module_generic(hw); in ixgbe_identify_phy_82599()
1838 if (hw->phy.type == ixgbe_phy_unknown) { in ixgbe_identify_phy_82599()
1839 hw->phy.type = ixgbe_phy_none; in ixgbe_identify_phy_82599()
1844 if (hw->phy.type == ixgbe_phy_sfp_unsupported) in ixgbe_identify_phy_82599()
1857 static s32 ixgbe_enable_rx_dma_82599(struct ixgbe_hw *hw, u32 regval) in ixgbe_enable_rx_dma_82599() argument
1865 hw->mac.ops.disable_rx_buff(hw); in ixgbe_enable_rx_dma_82599()
1868 hw->mac.ops.enable_rx(hw); in ixgbe_enable_rx_dma_82599()
1870 hw->mac.ops.disable_rx(hw); in ixgbe_enable_rx_dma_82599()
1872 hw->mac.ops.enable_rx_buff(hw); in ixgbe_enable_rx_dma_82599()
1887 static s32 ixgbe_verify_fw_version_82599(struct ixgbe_hw *hw) in ixgbe_verify_fw_version_82599() argument
1895 if (hw->phy.media_type != ixgbe_media_type_fiber) in ixgbe_verify_fw_version_82599()
1900 if (hw->eeprom.ops.read(hw, offset, &fw_offset)) in ixgbe_verify_fw_version_82599()
1908 if (hw->eeprom.ops.read(hw, offset, &fw_ptp_cfg_offset)) in ixgbe_verify_fw_version_82599()
1916 if (hw->eeprom.ops.read(hw, offset, &fw_version)) in ixgbe_verify_fw_version_82599()
1925 hw_err(hw, "eeprom read at offset %d failed\n", offset); in ixgbe_verify_fw_version_82599()
1936 static bool ixgbe_verify_lesm_fw_enabled_82599(struct ixgbe_hw *hw) in ixgbe_verify_lesm_fw_enabled_82599() argument
1942 status = hw->eeprom.ops.read(hw, IXGBE_FW_PTR, &fw_offset); in ixgbe_verify_lesm_fw_enabled_82599()
1948 status = hw->eeprom.ops.read(hw, (fw_offset + in ixgbe_verify_lesm_fw_enabled_82599()
1957 status = hw->eeprom.ops.read(hw, (fw_lesm_param_offset + in ixgbe_verify_lesm_fw_enabled_82599()
1978 static s32 ixgbe_read_eeprom_buffer_82599(struct ixgbe_hw *hw, u16 offset, in ixgbe_read_eeprom_buffer_82599() argument
1981 struct ixgbe_eeprom_info *eeprom = &hw->eeprom; in ixgbe_read_eeprom_buffer_82599()
1988 return ixgbe_read_eerd_buffer_generic(hw, offset, words, data); in ixgbe_read_eeprom_buffer_82599()
1990 return ixgbe_read_eeprom_buffer_bit_bang_generic(hw, offset, words, in ixgbe_read_eeprom_buffer_82599()
2004 static s32 ixgbe_read_eeprom_82599(struct ixgbe_hw *hw, in ixgbe_read_eeprom_82599() argument
2007 struct ixgbe_eeprom_info *eeprom = &hw->eeprom; in ixgbe_read_eeprom_82599()
2014 return ixgbe_read_eerd_generic(hw, offset, data); in ixgbe_read_eeprom_82599()
2016 return ixgbe_read_eeprom_bit_bang_generic(hw, offset, data); in ixgbe_read_eeprom_82599()
2028 static s32 ixgbe_reset_pipeline_82599(struct ixgbe_hw *hw) in ixgbe_reset_pipeline_82599() argument
2035 autoc2_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC2); in ixgbe_reset_pipeline_82599()
2038 IXGBE_WRITE_REG(hw, IXGBE_AUTOC2, autoc2_reg); in ixgbe_reset_pipeline_82599()
2039 IXGBE_WRITE_FLUSH(hw); in ixgbe_reset_pipeline_82599()
2042 autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC); in ixgbe_reset_pipeline_82599()
2046 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, in ixgbe_reset_pipeline_82599()
2052 anlp1_reg = IXGBE_READ_REG(hw, IXGBE_ANLP1); in ixgbe_reset_pipeline_82599()
2058 hw_dbg(hw, "auto negotiation not completed\n"); in ixgbe_reset_pipeline_82599()
2067 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg); in ixgbe_reset_pipeline_82599()
2068 IXGBE_WRITE_FLUSH(hw); in ixgbe_reset_pipeline_82599()
2082 static s32 ixgbe_read_i2c_byte_82599(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_byte_82599() argument
2089 if (hw->phy.qsfp_shared_i2c_bus == true) { in ixgbe_read_i2c_byte_82599()
2091 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); in ixgbe_read_i2c_byte_82599()
2093 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp); in ixgbe_read_i2c_byte_82599()
2094 IXGBE_WRITE_FLUSH(hw); in ixgbe_read_i2c_byte_82599()
2097 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); in ixgbe_read_i2c_byte_82599()
2106 hw_dbg(hw, "Driver can't access resource, acquiring I2C bus timeout.\n"); in ixgbe_read_i2c_byte_82599()
2112 status = ixgbe_read_i2c_byte_generic(hw, byte_offset, dev_addr, data); in ixgbe_read_i2c_byte_82599()
2115 if (hw->phy.qsfp_shared_i2c_bus == true) { in ixgbe_read_i2c_byte_82599()
2117 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); in ixgbe_read_i2c_byte_82599()
2119 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp); in ixgbe_read_i2c_byte_82599()
2120 IXGBE_WRITE_FLUSH(hw); in ixgbe_read_i2c_byte_82599()
2135 static s32 ixgbe_write_i2c_byte_82599(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_write_i2c_byte_82599() argument
2142 if (hw->phy.qsfp_shared_i2c_bus == true) { in ixgbe_write_i2c_byte_82599()
2144 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); in ixgbe_write_i2c_byte_82599()
2146 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp); in ixgbe_write_i2c_byte_82599()
2147 IXGBE_WRITE_FLUSH(hw); in ixgbe_write_i2c_byte_82599()
2150 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); in ixgbe_write_i2c_byte_82599()
2159 hw_dbg(hw, "Driver can't access resource, acquiring I2C bus timeout.\n"); in ixgbe_write_i2c_byte_82599()
2165 status = ixgbe_write_i2c_byte_generic(hw, byte_offset, dev_addr, data); in ixgbe_write_i2c_byte_82599()
2168 if (hw->phy.qsfp_shared_i2c_bus == true) { in ixgbe_write_i2c_byte_82599()
2170 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); in ixgbe_write_i2c_byte_82599()
2172 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp); in ixgbe_write_i2c_byte_82599()
2173 IXGBE_WRITE_FLUSH(hw); in ixgbe_write_i2c_byte_82599()