Lines Matching refs:hw
34 static s32 igb_set_default_fc(struct e1000_hw *hw);
35 static s32 igb_set_fc_watermarks(struct e1000_hw *hw);
45 s32 igb_get_bus_info_pcie(struct e1000_hw *hw) in igb_get_bus_info_pcie() argument
47 struct e1000_bus_info *bus = &hw->bus; in igb_get_bus_info_pcie()
54 ret_val = igb_read_pcie_cap_reg(hw, in igb_get_bus_info_pcie()
91 void igb_clear_vfta(struct e1000_hw *hw) in igb_clear_vfta() argument
110 static void igb_write_vfta(struct e1000_hw *hw, u32 offset, u32 value) in igb_write_vfta() argument
128 void igb_clear_vfta_i350(struct e1000_hw *hw) in igb_clear_vfta_i350() argument
150 static void igb_write_vfta_i350(struct e1000_hw *hw, u32 offset, u32 value) in igb_write_vfta_i350() argument
169 void igb_init_rx_addrs(struct e1000_hw *hw, u16 rar_count) in igb_init_rx_addrs() argument
177 hw->mac.ops.rar_set(hw, hw->mac.addr, 0); in igb_init_rx_addrs()
182 hw->mac.ops.rar_set(hw, mac_addr, i); in igb_init_rx_addrs()
194 s32 igb_vfta_set(struct e1000_hw *hw, u32 vid, bool add) in igb_vfta_set() argument
199 struct igb_adapter *adapter = hw->back; in igb_vfta_set()
213 if ((hw->mac.type == e1000_i350) || (hw->mac.type == e1000_i354)) in igb_vfta_set()
214 igb_write_vfta_i350(hw, index, vfta); in igb_vfta_set()
216 igb_write_vfta(hw, index, vfta); in igb_vfta_set()
233 s32 igb_check_alt_mac_addr(struct e1000_hw *hw) in igb_check_alt_mac_addr() argument
243 if (hw->mac.type >= e1000_82580) in igb_check_alt_mac_addr()
246 ret_val = hw->nvm.ops.read(hw, NVM_ALT_MAC_ADDR_PTR, 1, in igb_check_alt_mac_addr()
258 if (hw->bus.func == E1000_FUNC_1) in igb_check_alt_mac_addr()
260 if (hw->bus.func == E1000_FUNC_2) in igb_check_alt_mac_addr()
263 if (hw->bus.func == E1000_FUNC_3) in igb_check_alt_mac_addr()
267 ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data); in igb_check_alt_mac_addr()
287 hw->mac.ops.rar_set(hw, alt_mac_addr, 0); in igb_check_alt_mac_addr()
302 void igb_rar_set(struct e1000_hw *hw, u8 *addr, u32 index) in igb_rar_set() argument
339 void igb_mta_set(struct e1000_hw *hw, u32 hash_value) in igb_mta_set() argument
352 hash_reg = (hash_value >> 5) & (hw->mac.mta_reg_count - 1); in igb_mta_set()
372 static u32 igb_hash_mc_addr(struct e1000_hw *hw, u8 *mc_addr) in igb_hash_mc_addr() argument
378 hash_mask = (hw->mac.mta_reg_count * 32) - 1; in igb_hash_mc_addr()
411 switch (hw->mac.mc_filter_type) { in igb_hash_mc_addr()
441 void igb_update_mc_addr_list(struct e1000_hw *hw, in igb_update_mc_addr_list() argument
448 memset(&hw->mac.mta_shadow, 0, sizeof(hw->mac.mta_shadow)); in igb_update_mc_addr_list()
452 hash_value = igb_hash_mc_addr(hw, mc_addr_list); in igb_update_mc_addr_list()
454 hash_reg = (hash_value >> 5) & (hw->mac.mta_reg_count - 1); in igb_update_mc_addr_list()
457 hw->mac.mta_shadow[hash_reg] |= (1 << hash_bit); in igb_update_mc_addr_list()
462 for (i = hw->mac.mta_reg_count - 1; i >= 0; i--) in igb_update_mc_addr_list()
463 array_wr32(E1000_MTA, i, hw->mac.mta_shadow[i]); in igb_update_mc_addr_list()
473 void igb_clear_hw_cntrs_base(struct e1000_hw *hw) in igb_clear_hw_cntrs_base() argument
522 s32 igb_check_for_copper_link(struct e1000_hw *hw) in igb_check_for_copper_link() argument
524 struct e1000_mac_info *mac = &hw->mac; in igb_check_for_copper_link()
542 ret_val = igb_phy_has_link(hw, 1, 0, &link); in igb_check_for_copper_link()
554 igb_check_downshift(hw); in igb_check_for_copper_link()
568 igb_config_collision_dist(hw); in igb_check_for_copper_link()
575 ret_val = igb_config_fc_after_link_up(hw); in igb_check_for_copper_link()
593 s32 igb_setup_link(struct e1000_hw *hw) in igb_setup_link() argument
600 if (igb_check_reset_block(hw)) in igb_setup_link()
606 if (hw->fc.requested_mode == e1000_fc_default) { in igb_setup_link()
607 ret_val = igb_set_default_fc(hw); in igb_setup_link()
616 hw->fc.current_mode = hw->fc.requested_mode; in igb_setup_link()
618 hw_dbg("After fix-ups FlowControl is now = %x\n", hw->fc.current_mode); in igb_setup_link()
621 ret_val = hw->mac.ops.setup_physical_interface(hw); in igb_setup_link()
635 wr32(E1000_FCTTV, hw->fc.pause_time); in igb_setup_link()
637 ret_val = igb_set_fc_watermarks(hw); in igb_setup_link()
652 void igb_config_collision_dist(struct e1000_hw *hw) in igb_config_collision_dist() argument
673 static s32 igb_set_fc_watermarks(struct e1000_hw *hw) in igb_set_fc_watermarks() argument
684 if (hw->fc.current_mode & e1000_fc_tx_pause) { in igb_set_fc_watermarks()
689 fcrtl = hw->fc.low_water; in igb_set_fc_watermarks()
690 if (hw->fc.send_xon) in igb_set_fc_watermarks()
693 fcrth = hw->fc.high_water; in igb_set_fc_watermarks()
708 static s32 igb_set_default_fc(struct e1000_hw *hw) in igb_set_default_fc() argument
722 if (hw->mac.type == e1000_i350) { in igb_set_default_fc()
723 lan_offset = NVM_82580_LAN_FUNC_OFFSET(hw->bus.func); in igb_set_default_fc()
724 ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG in igb_set_default_fc()
727 ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG, in igb_set_default_fc()
737 hw->fc.requested_mode = e1000_fc_none; in igb_set_default_fc()
740 hw->fc.requested_mode = e1000_fc_tx_pause; in igb_set_default_fc()
742 hw->fc.requested_mode = e1000_fc_full; in igb_set_default_fc()
758 s32 igb_force_mac_fc(struct e1000_hw *hw) in igb_force_mac_fc() argument
782 hw_dbg("hw->fc.current_mode = %u\n", hw->fc.current_mode); in igb_force_mac_fc()
784 switch (hw->fc.current_mode) { in igb_force_mac_fc()
821 s32 igb_config_fc_after_link_up(struct e1000_hw *hw) in igb_config_fc_after_link_up() argument
823 struct e1000_mac_info *mac = &hw->mac; in igb_config_fc_after_link_up()
834 if (hw->phy.media_type == e1000_media_type_internal_serdes) in igb_config_fc_after_link_up()
835 ret_val = igb_force_mac_fc(hw); in igb_config_fc_after_link_up()
837 if (hw->phy.media_type == e1000_media_type_copper) in igb_config_fc_after_link_up()
838 ret_val = igb_force_mac_fc(hw); in igb_config_fc_after_link_up()
851 if ((hw->phy.media_type == e1000_media_type_copper) && mac->autoneg) { in igb_config_fc_after_link_up()
856 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, in igb_config_fc_after_link_up()
860 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, in igb_config_fc_after_link_up()
876 ret_val = hw->phy.ops.read_reg(hw, PHY_AUTONEG_ADV, in igb_config_fc_after_link_up()
880 ret_val = hw->phy.ops.read_reg(hw, PHY_LP_ABILITY, in igb_config_fc_after_link_up()
926 if (hw->fc.requested_mode == e1000_fc_full) { in igb_config_fc_after_link_up()
927 hw->fc.current_mode = e1000_fc_full; in igb_config_fc_after_link_up()
930 hw->fc.current_mode = e1000_fc_rx_pause; in igb_config_fc_after_link_up()
945 hw->fc.current_mode = e1000_fc_tx_pause; in igb_config_fc_after_link_up()
959 hw->fc.current_mode = e1000_fc_rx_pause; in igb_config_fc_after_link_up()
982 else if ((hw->fc.requested_mode == e1000_fc_none) || in igb_config_fc_after_link_up()
983 (hw->fc.requested_mode == e1000_fc_tx_pause) || in igb_config_fc_after_link_up()
984 (hw->fc.strict_ieee)) { in igb_config_fc_after_link_up()
985 hw->fc.current_mode = e1000_fc_none; in igb_config_fc_after_link_up()
988 hw->fc.current_mode = e1000_fc_rx_pause; in igb_config_fc_after_link_up()
996 ret_val = hw->mac.ops.get_speed_and_duplex(hw, &speed, &duplex); in igb_config_fc_after_link_up()
1003 hw->fc.current_mode = e1000_fc_none; in igb_config_fc_after_link_up()
1008 ret_val = igb_force_mac_fc(hw); in igb_config_fc_after_link_up()
1019 if ((hw->phy.media_type == e1000_media_type_internal_serdes) in igb_config_fc_after_link_up()
1081 if (hw->fc.requested_mode == e1000_fc_full) { in igb_config_fc_after_link_up()
1082 hw->fc.current_mode = e1000_fc_full; in igb_config_fc_after_link_up()
1085 hw->fc.current_mode = e1000_fc_rx_pause; in igb_config_fc_after_link_up()
1100 hw->fc.current_mode = e1000_fc_tx_pause; in igb_config_fc_after_link_up()
1114 hw->fc.current_mode = e1000_fc_rx_pause; in igb_config_fc_after_link_up()
1120 hw->fc.current_mode = e1000_fc_none; in igb_config_fc_after_link_up()
1131 ret_val = igb_force_mac_fc(hw); in igb_config_fc_after_link_up()
1151 s32 igb_get_speed_and_duplex_copper(struct e1000_hw *hw, u16 *speed, in igb_get_speed_and_duplex_copper() argument
1185 s32 igb_get_hw_semaphore(struct e1000_hw *hw) in igb_get_hw_semaphore() argument
1189 s32 timeout = hw->nvm.word_size + 1; in igb_get_hw_semaphore()
1222 igb_put_hw_semaphore(hw); in igb_get_hw_semaphore()
1238 void igb_put_hw_semaphore(struct e1000_hw *hw) in igb_put_hw_semaphore() argument
1255 s32 igb_get_auto_rd_done(struct e1000_hw *hw) in igb_get_auto_rd_done() argument
1286 static s32 igb_valid_led_default(struct e1000_hw *hw, u16 *data) in igb_valid_led_default() argument
1290 ret_val = hw->nvm.ops.read(hw, NVM_ID_LED_SETTINGS, 1, data); in igb_valid_led_default()
1297 switch (hw->phy.media_type) { in igb_valid_led_default()
1316 s32 igb_id_led_init(struct e1000_hw *hw) in igb_id_led_init() argument
1318 struct e1000_mac_info *mac = &hw->mac; in igb_id_led_init()
1327 if ((hw->mac.type == e1000_i210) || in igb_id_led_init()
1328 (hw->mac.type == e1000_i211)) in igb_id_led_init()
1329 ret_val = igb_valid_led_default_i210(hw, &data); in igb_id_led_init()
1331 ret_val = igb_valid_led_default(hw, &data); in igb_id_led_init()
1389 s32 igb_cleanup_led(struct e1000_hw *hw) in igb_cleanup_led() argument
1391 wr32(E1000_LEDCTL, hw->mac.ledctl_default); in igb_cleanup_led()
1401 s32 igb_blink_led(struct e1000_hw *hw) in igb_blink_led() argument
1406 if (hw->phy.media_type == e1000_media_type_fiber) { in igb_blink_led()
1417 ledctl_blink = hw->mac.ledctl_mode2; in igb_blink_led()
1419 u32 mode = (hw->mac.ledctl_mode2 >> i) & in igb_blink_led()
1421 u32 led_default = hw->mac.ledctl_default >> i; in igb_blink_led()
1446 s32 igb_led_off(struct e1000_hw *hw) in igb_led_off() argument
1448 switch (hw->phy.media_type) { in igb_led_off()
1450 wr32(E1000_LEDCTL, hw->mac.ledctl_mode1); in igb_led_off()
1470 s32 igb_disable_pcie_master(struct e1000_hw *hw) in igb_disable_pcie_master() argument
1476 if (hw->bus.type != e1000_bus_type_pci_express) in igb_disable_pcie_master()
1508 s32 igb_validate_mdi_setting(struct e1000_hw *hw) in igb_validate_mdi_setting() argument
1513 if (hw->mac.type >= e1000_82580) in igb_validate_mdi_setting()
1516 if (!hw->mac.autoneg && (hw->phy.mdix == 0 || hw->phy.mdix == 3)) { in igb_validate_mdi_setting()
1518 hw->phy.mdix = 1; in igb_validate_mdi_setting()
1538 s32 igb_write_8bit_ctrl_reg(struct e1000_hw *hw, u32 reg, in igb_write_8bit_ctrl_reg() argument
1572 bool igb_enable_mng_pass_thru(struct e1000_hw *hw) in igb_enable_mng_pass_thru() argument
1578 if (!hw->mac.asf_firmware_present) in igb_enable_mng_pass_thru()
1586 if (hw->mac.arc_subsystem_valid) { in igb_enable_mng_pass_thru()