Lines Matching refs:icr0
3417 u32 icr0, icr0_remaining; in i40e_intr() local
3420 icr0 = rd32(hw, I40E_PFINT_ICR0); in i40e_intr()
3424 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0) in i40e_intr()
3428 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) || in i40e_intr()
3429 (icr0 & I40E_PFINT_ICR0_SWINT_MASK)) in i40e_intr()
3435 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK; in i40e_intr()
3440 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) { in i40e_intr()
3458 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) { in i40e_intr()
3463 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) { in i40e_intr()
3468 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) { in i40e_intr()
3473 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) { in i40e_intr()
3490 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) { in i40e_intr()
3491 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK; in i40e_intr()
3498 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) { in i40e_intr()
3502 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK; in i40e_intr()
3511 icr0_remaining = icr0 & ena_mask; in i40e_intr()