55 		hw->aq.asq.tail = I40E_VF_ATQT1;  in i40e_adminq_init_regs()
56 		hw->aq.asq.head = I40E_VF_ATQH1;  in i40e_adminq_init_regs()
57 		hw->aq.asq.len  = I40E_VF_ATQLEN1;  in i40e_adminq_init_regs()
58 		hw->aq.asq.bal  = I40E_VF_ATQBAL1;  in i40e_adminq_init_regs()
59 		hw->aq.asq.bah  = I40E_VF_ATQBAH1;  in i40e_adminq_init_regs()
66 		hw->aq.asq.tail = I40E_PF_ATQT;  in i40e_adminq_init_regs()
67 		hw->aq.asq.head = I40E_PF_ATQH;  in i40e_adminq_init_regs()
68 		hw->aq.asq.len  = I40E_PF_ATQLEN;  in i40e_adminq_init_regs()
69 		hw->aq.asq.bal  = I40E_PF_ATQBAL;  in i40e_adminq_init_regs()
70 		hw->aq.asq.bah  = I40E_PF_ATQBAH;  in i40e_adminq_init_regs()
87 	ret_code = i40e_allocate_dma_mem(hw, &hw->aq.asq.desc_buf,  in i40e_alloc_adminq_asq_ring()
95 	ret_code = i40e_allocate_virt_mem(hw, &hw->aq.asq.cmd_buf,  in i40e_alloc_adminq_asq_ring()
99 		i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf);  in i40e_alloc_adminq_asq_ring()
132 	i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf);  in i40e_free_adminq_asq()
225 	ret_code = i40e_allocate_virt_mem(hw, &hw->aq.asq.dma_head,  in i40e_alloc_asq_bufs()
229 	hw->aq.asq.r.asq_bi = (struct i40e_dma_mem *)hw->aq.asq.dma_head.va;  in i40e_alloc_asq_bufs()
233 		bi = &hw->aq.asq.r.asq_bi[i];  in i40e_alloc_asq_bufs()
248 		i40e_free_dma_mem(hw, &hw->aq.asq.r.asq_bi[i]);  in i40e_alloc_asq_bufs()
249 	i40e_free_virt_mem(hw, &hw->aq.asq.dma_head);  in i40e_alloc_asq_bufs()
283 		if (hw->aq.asq.r.asq_bi[i].pa)  in i40e_free_asq_bufs()
284 			i40e_free_dma_mem(hw, &hw->aq.asq.r.asq_bi[i]);  in i40e_free_asq_bufs()
287 	i40e_free_virt_mem(hw, &hw->aq.asq.cmd_buf);  in i40e_free_asq_bufs()
290 	i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf);  in i40e_free_asq_bufs()
293 	i40e_free_virt_mem(hw, &hw->aq.asq.dma_head);  in i40e_free_asq_bufs()
308 	wr32(hw, hw->aq.asq.head, 0);  in i40e_config_asq_regs()
309 	wr32(hw, hw->aq.asq.tail, 0);  in i40e_config_asq_regs()
312 	wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries |  in i40e_config_asq_regs()
314 	wr32(hw, hw->aq.asq.bal, lower_32_bits(hw->aq.asq.desc_buf.pa));  in i40e_config_asq_regs()
315 	wr32(hw, hw->aq.asq.bah, upper_32_bits(hw->aq.asq.desc_buf.pa));  in i40e_config_asq_regs()
318 	reg = rd32(hw, hw->aq.asq.bal);  in i40e_config_asq_regs()
319 	if (reg != lower_32_bits(hw->aq.asq.desc_buf.pa))  in i40e_config_asq_regs()
374 	if (hw->aq.asq.count > 0) {  in i40e_init_asq()
387 	hw->aq.asq.next_to_use = 0;  in i40e_init_asq()
388 	hw->aq.asq.next_to_clean = 0;  in i40e_init_asq()
406 	hw->aq.asq.count = hw->aq.num_asq_entries;  in i40e_init_asq()
487 	if (hw->aq.asq.count == 0) {  in i40e_shutdown_asq()
493 	wr32(hw, hw->aq.asq.head, 0);  in i40e_shutdown_asq()
494 	wr32(hw, hw->aq.asq.tail, 0);  in i40e_shutdown_asq()
495 	wr32(hw, hw->aq.asq.len, 0);  in i40e_shutdown_asq()
496 	wr32(hw, hw->aq.asq.bal, 0);  in i40e_shutdown_asq()
497 	wr32(hw, hw->aq.asq.bah, 0);  in i40e_shutdown_asq()
499 	hw->aq.asq.count = 0; /* to indicate uninitialized queue */  in i40e_shutdown_asq()
677 	struct i40e_adminq_ring *asq = &(hw->aq.asq);  in i40e_clean_asq()  local
679 	u16 ntc = asq->next_to_clean;  in i40e_clean_asq()
683 	desc = I40E_ADMINQ_DESC(*asq, ntc);  in i40e_clean_asq()
684 	details = I40E_ADMINQ_DETAILS(*asq, ntc);  in i40e_clean_asq()
685 	while (rd32(hw, hw->aq.asq.head) != ntc) {  in i40e_clean_asq()
687 			   "ntc %d head %d.\n", ntc, rd32(hw, hw->aq.asq.head));  in i40e_clean_asq()
698 		if (ntc == asq->count)  in i40e_clean_asq()
700 		desc = I40E_ADMINQ_DESC(*asq, ntc);  in i40e_clean_asq()
701 		details = I40E_ADMINQ_DETAILS(*asq, ntc);  in i40e_clean_asq()
704 	asq->next_to_clean = ntc;  in i40e_clean_asq()
706 	return I40E_DESC_UNUSED(asq);  in i40e_clean_asq()
721 	return rd32(hw, hw->aq.asq.head) == hw->aq.asq.next_to_use;  in i40e_asq_done()
752 	if (hw->aq.asq.count == 0) {  in i40e_asq_send_command()
761 	val = rd32(hw, hw->aq.asq.head);  in i40e_asq_send_command()
769 	details = I40E_ADMINQ_DETAILS(hw->aq.asq, hw->aq.asq.next_to_use);  in i40e_asq_send_command()
824 	desc_on_ring = I40E_ADMINQ_DESC(hw->aq.asq, hw->aq.asq.next_to_use);  in i40e_asq_send_command()
831 		dma_buff = &(hw->aq.asq.r.asq_bi[hw->aq.asq.next_to_use]);  in i40e_asq_send_command()
849 	(hw->aq.asq.next_to_use)++;  in i40e_asq_send_command()
850 	if (hw->aq.asq.next_to_use == hw->aq.asq.count)  in i40e_asq_send_command()
851 		hw->aq.asq.next_to_use = 0;  in i40e_asq_send_command()
853 		wr32(hw, hw->aq.asq.tail, hw->aq.asq.next_to_use);  in i40e_asq_send_command()
1057 	hw->aq.asq.next_to_use = 0;  in i40e_resume_aq()
1058 	hw->aq.asq.next_to_clean = 0;  in i40e_resume_aq()