31 static s32 fm10k_reset_hw_pf(struct fm10k_hw *hw)  in fm10k_reset_hw_pf()  argument
38 	fm10k_write_reg(hw, FM10K_EIMR, FM10K_EIMR_DISABLE(ALL));  in fm10k_reset_hw_pf()
41 	fm10k_write_reg(hw, FM10K_ITR2(0), 0);  in fm10k_reset_hw_pf()
42 	fm10k_write_reg(hw, FM10K_INT_CTRL, 0);  in fm10k_reset_hw_pf()
48 		fm10k_write_reg(hw, FM10K_TQMAP(i), 0);  in fm10k_reset_hw_pf()
49 		fm10k_write_reg(hw, FM10K_RQMAP(i), 0);  in fm10k_reset_hw_pf()
53 	err = fm10k_disable_queues_generic(hw, FM10K_MAX_QUEUES);  in fm10k_reset_hw_pf()
58 	reg = fm10k_read_reg(hw, FM10K_DMA_CTRL);  in fm10k_reset_hw_pf()
63 	reg = fm10k_read_reg(hw, FM10K_DMA_CTRL2);  in fm10k_reset_hw_pf()
69 	fm10k_write_reg(hw, FM10K_DMA_CTRL, reg);  in fm10k_reset_hw_pf()
72 	fm10k_write_flush(hw);  in fm10k_reset_hw_pf()
76 	reg = fm10k_read_reg(hw, FM10K_IP);  in fm10k_reset_hw_pf()
90 static bool fm10k_is_ari_hierarchy_pf(struct fm10k_hw *hw)  in fm10k_is_ari_hierarchy_pf()  argument
92 	u16 sriov_ctrl = fm10k_read_pci_cfg_word(hw, FM10K_PCIE_SRIOV_CTRL);  in fm10k_is_ari_hierarchy_pf()
102 static s32 fm10k_init_hw_pf(struct fm10k_hw *hw)  in fm10k_init_hw_pf()  argument
108 	fm10k_write_reg(hw, FM10K_DGLORTDEC(fm10k_dglort_default), 0);  in fm10k_init_hw_pf()
109 	fm10k_write_reg(hw, FM10K_DGLORTMAP(fm10k_dglort_default),  in fm10k_init_hw_pf()
114 		fm10k_write_reg(hw, FM10K_DGLORTMAP(i), FM10K_DGLORTMAP_NONE);  in fm10k_init_hw_pf()
117 	fm10k_write_reg(hw, FM10K_ITR2(0), 0);  in fm10k_init_hw_pf()
120 	fm10k_write_reg(hw, FM10K_ITR2(FM10K_ITR_REG_COUNT_PF), 0);  in fm10k_init_hw_pf()
124 		fm10k_write_reg(hw, FM10K_ITR2(i), i - 1);  in fm10k_init_hw_pf()
127 	fm10k_write_reg(hw, FM10K_INT_CTRL, FM10K_INT_CTRL_ENABLEMODERATOR);  in fm10k_init_hw_pf()
131 		 (hw->mac.default_vid << FM10K_TXQCTL_VID_SHIFT);  in fm10k_init_hw_pf()
135 		fm10k_write_reg(hw, FM10K_TQDLOC(i),  in fm10k_init_hw_pf()
138 		fm10k_write_reg(hw, FM10K_TXQCTL(i), txqctl);  in fm10k_init_hw_pf()
141 		fm10k_write_reg(hw, FM10K_TPH_TXCTRL(i),  in fm10k_init_hw_pf()
146 		fm10k_write_reg(hw, FM10K_TPH_RXCTRL(i),  in fm10k_init_hw_pf()
154 	switch (hw->bus.speed) {  in fm10k_init_hw_pf()
170 	fm10k_write_reg(hw, FM10K_DTXTCPFLGL, FM10K_TSO_FLAGS_LOW);  in fm10k_init_hw_pf()
171 	fm10k_write_reg(hw, FM10K_DTXTCPFLGH, FM10K_TSO_FLAGS_HI);  in fm10k_init_hw_pf()
182 	fm10k_write_reg(hw, FM10K_DMA_CTRL, dma_ctrl);  in fm10k_init_hw_pf()
185 	hw->mac.max_queues = FM10K_MAX_QUEUES_PF;  in fm10k_init_hw_pf()
188 	hw->iov.total_vfs = fm10k_is_ari_hierarchy_pf(hw) ? 64 : 7;  in fm10k_init_hw_pf()
205 static s32 fm10k_update_vlan_pf(struct fm10k_hw *hw, u32 vid, u8 vsi, bool set)  in fm10k_update_vlan_pf()  argument
238 		vlan_table = fm10k_read_reg(hw, reg);  in fm10k_update_vlan_pf()
246 			fm10k_write_reg(hw, reg, vlan_table ^ mask);  in fm10k_update_vlan_pf()
258 static s32 fm10k_read_mac_addr_pf(struct fm10k_hw *hw)  in fm10k_read_mac_addr_pf()  argument
264 	serial_num = fm10k_read_reg(hw, FM10K_SM_AREA(1));  in fm10k_read_mac_addr_pf()
274 	serial_num = fm10k_read_reg(hw, FM10K_SM_AREA(0));  in fm10k_read_mac_addr_pf()
285 		hw->mac.perm_addr[i] = perm_addr[i];  in fm10k_read_mac_addr_pf()
286 		hw->mac.addr[i] = perm_addr[i];  in fm10k_read_mac_addr_pf()
299 bool fm10k_glort_valid_pf(struct fm10k_hw *hw, u16 glort)  in fm10k_glort_valid_pf()  argument
301 	glort &= hw->mac.dglort_map >> FM10K_DGLORTMAP_MASK_SHIFT;  in fm10k_glort_valid_pf()
303 	return glort == (hw->mac.dglort_map & FM10K_DGLORTMAP_NONE);  in fm10k_glort_valid_pf()
318 static s32 fm10k_update_xc_addr_pf(struct fm10k_hw *hw, u16 glort,  in fm10k_update_xc_addr_pf()  argument
321 	struct fm10k_mbx_info *mbx = &hw->mbx;  in fm10k_update_xc_addr_pf()
329 	if (!fm10k_glort_valid_pf(hw, glort) || vid >= FM10K_VLAN_TABLE_VID_MAX)  in fm10k_update_xc_addr_pf()
350 	return mbx->ops.enqueue_tx(hw, mbx, msg);  in fm10k_update_xc_addr_pf()
365 static s32 fm10k_update_uc_addr_pf(struct fm10k_hw *hw, u16 glort,  in fm10k_update_uc_addr_pf()  argument
372 	return fm10k_update_xc_addr_pf(hw, glort, mac, vid, add, flags);  in fm10k_update_uc_addr_pf()
386 static s32 fm10k_update_mc_addr_pf(struct fm10k_hw *hw, u16 glort,  in fm10k_update_mc_addr_pf()  argument
393 	return fm10k_update_xc_addr_pf(hw, glort, mac, vid, add, 0);  in fm10k_update_mc_addr_pf()
406 static s32 fm10k_update_xcast_mode_pf(struct fm10k_hw *hw, u16 glort, u8 mode)  in fm10k_update_xcast_mode_pf()  argument
408 	struct fm10k_mbx_info *mbx = &hw->mbx;  in fm10k_update_xcast_mode_pf()
414 	if (!fm10k_glort_valid_pf(hw, glort))  in fm10k_update_xcast_mode_pf()
428 	return mbx->ops.enqueue_tx(hw, mbx, msg);  in fm10k_update_xcast_mode_pf()
439 static void fm10k_update_int_moderator_pf(struct fm10k_hw *hw)  in fm10k_update_int_moderator_pf()  argument
444 	fm10k_write_reg(hw, FM10K_INT_CTRL, 0);  in fm10k_update_int_moderator_pf()
448 		if (!fm10k_read_reg(hw, FM10K_MSIX_VECTOR_MASK(i)))  in fm10k_update_int_moderator_pf()
453 	fm10k_write_reg(hw, FM10K_ITR2(FM10K_ITR_REG_COUNT_PF), i);  in fm10k_update_int_moderator_pf()
456 	if (!hw->iov.num_vfs)  in fm10k_update_int_moderator_pf()
457 		fm10k_write_reg(hw, FM10K_ITR2(0), i);  in fm10k_update_int_moderator_pf()
460 	fm10k_write_reg(hw, FM10K_INT_CTRL, FM10K_INT_CTRL_ENABLEMODERATOR);  in fm10k_update_int_moderator_pf()
472 static s32 fm10k_update_lport_state_pf(struct fm10k_hw *hw, u16 glort,  in fm10k_update_lport_state_pf()  argument
475 	struct fm10k_mbx_info *mbx = &hw->mbx;  in fm10k_update_lport_state_pf()
483 	if (!fm10k_glort_valid_pf(hw, glort))  in fm10k_update_lport_state_pf()
495 	return mbx->ops.enqueue_tx(hw, mbx, msg);  in fm10k_update_lport_state_pf()
507 static s32 fm10k_configure_dglort_map_pf(struct fm10k_hw *hw,  in fm10k_configure_dglort_map_pf()  argument
536 			fm10k_write_reg(hw, FM10K_TX_SGLORT(q_idx), glort);  in fm10k_configure_dglort_map_pf()
537 			fm10k_write_reg(hw, FM10K_RX_SGLORT(q_idx), glort);  in fm10k_configure_dglort_map_pf()
552 			txqctl = fm10k_read_reg(hw, FM10K_TXQCTL(q_idx));  in fm10k_configure_dglort_map_pf()
555 			fm10k_write_reg(hw, FM10K_TXQCTL(q_idx), txqctl);  in fm10k_configure_dglort_map_pf()
578 	fm10k_write_reg(hw, FM10K_DGLORTDEC(dglort->idx), dglortdec);  in fm10k_configure_dglort_map_pf()
579 	fm10k_write_reg(hw, FM10K_DGLORTMAP(dglort->idx), dglortmap);  in fm10k_configure_dglort_map_pf()
584 u16 fm10k_queues_per_pool(struct fm10k_hw *hw)  in fm10k_queues_per_pool()  argument
586 	u16 num_pools = hw->iov.num_pools;  in fm10k_queues_per_pool()
592 u16 fm10k_vf_queue_index(struct fm10k_hw *hw, u16 vf_idx)  in fm10k_vf_queue_index()  argument
594 	u16 num_vfs = hw->iov.num_vfs;  in fm10k_vf_queue_index()
597 	vf_q_idx -= fm10k_queues_per_pool(hw) * (num_vfs - vf_idx);  in fm10k_vf_queue_index()
602 static u16 fm10k_vectors_per_pool(struct fm10k_hw *hw)  in fm10k_vectors_per_pool()  argument
604 	u16 num_pools = hw->iov.num_pools;  in fm10k_vectors_per_pool()
610 static u16 fm10k_vf_vector_index(struct fm10k_hw *hw, u16 vf_idx)  in fm10k_vf_vector_index()  argument
614 	vf_v_idx += fm10k_vectors_per_pool(hw) * vf_idx;  in fm10k_vf_vector_index()
628 static s32 fm10k_iov_assign_resources_pf(struct fm10k_hw *hw, u16 num_vfs,  in fm10k_iov_assign_resources_pf()  argument
632 	u32 vid = hw->mac.default_vid << FM10K_TXQCTL_VID_SHIFT;  in fm10k_iov_assign_resources_pf()
640 	if ((num_vfs > num_pools) || (num_vfs > hw->iov.total_vfs))  in fm10k_iov_assign_resources_pf()
644 	hw->iov.num_vfs = num_vfs;  in fm10k_iov_assign_resources_pf()
645 	hw->iov.num_pools = num_pools;  in fm10k_iov_assign_resources_pf()
649 	qpp = fm10k_queues_per_pool(hw);  in fm10k_iov_assign_resources_pf()
650 	vpp = fm10k_vectors_per_pool(hw);  in fm10k_iov_assign_resources_pf()
653 	vf_q_idx = fm10k_vf_queue_index(hw, 0);  in fm10k_iov_assign_resources_pf()
658 		fm10k_write_reg(hw, FM10K_TC_MAXCREDIT(i), 0);  in fm10k_iov_assign_resources_pf()
659 		fm10k_write_reg(hw, FM10K_TC_RATE(i), 0);  in fm10k_iov_assign_resources_pf()
660 		fm10k_write_reg(hw, FM10K_TC_CREDIT(i),  in fm10k_iov_assign_resources_pf()
666 		fm10k_write_reg(hw, FM10K_MBMEM(i), 0);  in fm10k_iov_assign_resources_pf()
669 	fm10k_write_reg(hw, FM10K_PFVFLREC(0), ~0);  in fm10k_iov_assign_resources_pf()
670 	fm10k_write_reg(hw, FM10K_PFVFLREC(1), ~0);  in fm10k_iov_assign_resources_pf()
674 		fm10k_write_reg(hw, FM10K_TXDCTL(i), 0);  in fm10k_iov_assign_resources_pf()
675 		fm10k_write_reg(hw, FM10K_TXQCTL(i), FM10K_TXQCTL_PF |  in fm10k_iov_assign_resources_pf()
677 		fm10k_write_reg(hw, FM10K_RXQCTL(i), FM10K_RXQCTL_PF);  in fm10k_iov_assign_resources_pf()
685 			fm10k_write_reg(hw, FM10K_ITR2(i), i - vpp);  in fm10k_iov_assign_resources_pf()
687 			fm10k_write_reg(hw, FM10K_ITR2(i), i - 1);  in fm10k_iov_assign_resources_pf()
691 	fm10k_write_reg(hw, FM10K_ITR2(0),  in fm10k_iov_assign_resources_pf()
692 			fm10k_vf_vector_index(hw, num_vfs - 1));  in fm10k_iov_assign_resources_pf()
701 			fm10k_write_reg(hw, FM10K_TXDCTL(vf_q_idx), 0);  in fm10k_iov_assign_resources_pf()
702 			fm10k_write_reg(hw, FM10K_TXQCTL(vf_q_idx),  in fm10k_iov_assign_resources_pf()
705 			fm10k_write_reg(hw, FM10K_RXDCTL(vf_q_idx),  in fm10k_iov_assign_resources_pf()
708 			fm10k_write_reg(hw, FM10K_RXQCTL(vf_q_idx),  in fm10k_iov_assign_resources_pf()
713 			fm10k_write_reg(hw, FM10K_TQMAP(qmap_idx), vf_q_idx);  in fm10k_iov_assign_resources_pf()
714 			fm10k_write_reg(hw, FM10K_RQMAP(qmap_idx), vf_q_idx);  in fm10k_iov_assign_resources_pf()
719 			fm10k_write_reg(hw, FM10K_TQMAP(qmap_idx), vf_q_idx0);  in fm10k_iov_assign_resources_pf()
720 			fm10k_write_reg(hw, FM10K_RQMAP(qmap_idx), vf_q_idx0);  in fm10k_iov_assign_resources_pf()
726 		fm10k_write_reg(hw, FM10K_TQMAP(qmap_idx), 0);  in fm10k_iov_assign_resources_pf()
727 		fm10k_write_reg(hw, FM10K_RQMAP(qmap_idx), 0);  in fm10k_iov_assign_resources_pf()
743 static s32 fm10k_iov_configure_tc_pf(struct fm10k_hw *hw, u16 vf_idx, int rate)  in fm10k_iov_configure_tc_pf()  argument
750 	if (vf_idx >= hw->iov.num_vfs)  in fm10k_iov_configure_tc_pf()
754 	switch (hw->bus.speed) {  in fm10k_iov_configure_tc_pf()
788 	fm10k_write_reg(hw, FM10K_TC_RATE(vf_idx), tc_rate | interval);  in fm10k_iov_configure_tc_pf()
789 	fm10k_write_reg(hw, FM10K_TC_MAXCREDIT(vf_idx), FM10K_TC_MAXCREDIT_64K);  in fm10k_iov_configure_tc_pf()
790 	fm10k_write_reg(hw, FM10K_TC_CREDIT(vf_idx), FM10K_TC_MAXCREDIT_64K);  in fm10k_iov_configure_tc_pf()
803 static s32 fm10k_iov_assign_int_moderator_pf(struct fm10k_hw *hw, u16 vf_idx)  in fm10k_iov_assign_int_moderator_pf()  argument
808 	if (vf_idx >= hw->iov.num_vfs)  in fm10k_iov_assign_int_moderator_pf()
812 	vf_v_idx = fm10k_vf_vector_index(hw, vf_idx);  in fm10k_iov_assign_int_moderator_pf()
813 	vf_v_limit = vf_v_idx + fm10k_vectors_per_pool(hw);  in fm10k_iov_assign_int_moderator_pf()
817 		if (!fm10k_read_reg(hw, FM10K_MSIX_VECTOR_MASK(i)))  in fm10k_iov_assign_int_moderator_pf()
822 	if (vf_idx == (hw->iov.num_vfs - 1))  in fm10k_iov_assign_int_moderator_pf()
823 		fm10k_write_reg(hw, FM10K_ITR2(0), i);  in fm10k_iov_assign_int_moderator_pf()
825 		fm10k_write_reg(hw, FM10K_ITR2(vf_v_limit), i);  in fm10k_iov_assign_int_moderator_pf()
837 static s32 fm10k_iov_assign_default_mac_vlan_pf(struct fm10k_hw *hw,  in fm10k_iov_assign_default_mac_vlan_pf()  argument
846 	if (!vf_info || vf_info->vf_idx >= hw->iov.num_vfs)  in fm10k_iov_assign_default_mac_vlan_pf()
850 	qmap_stride = (hw->iov.num_vfs > 8) ? 32 : 256;  in fm10k_iov_assign_default_mac_vlan_pf()
851 	queues_per_pool = fm10k_queues_per_pool(hw);  in fm10k_iov_assign_default_mac_vlan_pf()
855 	vf_q_idx = fm10k_vf_queue_index(hw, vf_idx);  in fm10k_iov_assign_default_mac_vlan_pf()
859 	fm10k_write_reg(hw, FM10K_TQMAP(qmap_idx), 0);  in fm10k_iov_assign_default_mac_vlan_pf()
860 	fm10k_write_reg(hw, FM10K_TXDCTL(vf_q_idx), 0);  in fm10k_iov_assign_default_mac_vlan_pf()
875 		vf_info->mbx.ops.enqueue_tx(hw, &vf_info->mbx, msg);  in fm10k_iov_assign_default_mac_vlan_pf()
878 	txdctl = fm10k_read_reg(hw, FM10K_TXDCTL(vf_q_idx));  in fm10k_iov_assign_default_mac_vlan_pf()
887 		txdctl = fm10k_read_reg(hw, FM10K_TXDCTL(vf_q_idx));  in fm10k_iov_assign_default_mac_vlan_pf()
903 	fm10k_write_reg(hw, FM10K_TDBAL(vf_q_idx), tdbal);  in fm10k_iov_assign_default_mac_vlan_pf()
904 	fm10k_write_reg(hw, FM10K_TDBAH(vf_q_idx), tdbah);  in fm10k_iov_assign_default_mac_vlan_pf()
915 		fm10k_write_reg(hw, FM10K_TXQCTL(vf_q_idx + i), txqctl);  in fm10k_iov_assign_default_mac_vlan_pf()
918 	fm10k_write_reg(hw, FM10K_TQMAP(qmap_idx), vf_q_idx);  in fm10k_iov_assign_default_mac_vlan_pf()
929 static s32 fm10k_iov_reset_resources_pf(struct fm10k_hw *hw,  in fm10k_iov_reset_resources_pf()  argument
939 	if (vf_idx >= hw->iov.num_vfs)  in fm10k_iov_reset_resources_pf()
943 	fm10k_write_reg(hw, FM10K_PFVFLREC(vf_idx / 32), 1 << (vf_idx % 32));  in fm10k_iov_reset_resources_pf()
948 		vf_info->mbx.ops.disconnect(hw, &vf_info->mbx);  in fm10k_iov_reset_resources_pf()
951 	vf_v_idx = fm10k_vf_vector_index(hw, vf_idx);  in fm10k_iov_reset_resources_pf()
952 	vf_v_limit = vf_v_idx + fm10k_vectors_per_pool(hw);  in fm10k_iov_reset_resources_pf()
955 	qmap_stride = (hw->iov.num_vfs > 8) ? 32 : 256;  in fm10k_iov_reset_resources_pf()
956 	queues_per_pool = fm10k_queues_per_pool(hw);  in fm10k_iov_reset_resources_pf()
961 		fm10k_write_reg(hw, FM10K_TQMAP(i), 0);  in fm10k_iov_reset_resources_pf()
962 		fm10k_write_reg(hw, FM10K_RQMAP(i), 0);  in fm10k_iov_reset_resources_pf()
966 	vf_q_idx = fm10k_vf_queue_index(hw, vf_idx);  in fm10k_iov_reset_resources_pf()
982 		fm10k_write_reg(hw, FM10K_TXDCTL(i), 0);  in fm10k_iov_reset_resources_pf()
983 		fm10k_write_reg(hw, FM10K_TXQCTL(i), txqctl);  in fm10k_iov_reset_resources_pf()
984 		fm10k_write_reg(hw, FM10K_RXDCTL(i),  in fm10k_iov_reset_resources_pf()
987 		fm10k_write_reg(hw, FM10K_RXQCTL(i), rxqctl);  in fm10k_iov_reset_resources_pf()
991 	fm10k_write_reg(hw, FM10K_TC_MAXCREDIT(vf_idx), 0);  in fm10k_iov_reset_resources_pf()
992 	fm10k_write_reg(hw, FM10K_TC_RATE(vf_idx), 0);  in fm10k_iov_reset_resources_pf()
993 	fm10k_write_reg(hw, FM10K_TC_CREDIT(vf_idx),  in fm10k_iov_reset_resources_pf()
998 		hw->mac.ops.update_int_moderator(hw);  in fm10k_iov_reset_resources_pf()
1000 		hw->iov.ops.assign_int_moderator(hw, vf_idx - 1);  in fm10k_iov_reset_resources_pf()
1003 	if (vf_idx == (hw->iov.num_vfs - 1))  in fm10k_iov_reset_resources_pf()
1004 		fm10k_write_reg(hw, FM10K_ITR2(0), vf_v_idx);  in fm10k_iov_reset_resources_pf()
1006 		fm10k_write_reg(hw, FM10K_ITR2(vf_v_limit), vf_v_idx);  in fm10k_iov_reset_resources_pf()
1010 		fm10k_write_reg(hw, FM10K_ITR2(vf_v_idx), vf_v_idx - 1);  in fm10k_iov_reset_resources_pf()
1014 		fm10k_write_reg(hw, FM10K_MBMEM_VF(vf_idx, i), 0);  in fm10k_iov_reset_resources_pf()
1016 		fm10k_write_reg(hw, FM10K_VLAN_TABLE(vf_info->vsi, i), 0);  in fm10k_iov_reset_resources_pf()
1018 		fm10k_write_reg(hw, FM10K_RETA(vf_info->vsi, i), 0);  in fm10k_iov_reset_resources_pf()
1020 		fm10k_write_reg(hw, FM10K_RSSRK(vf_info->vsi, i), 0);  in fm10k_iov_reset_resources_pf()
1021 	fm10k_write_reg(hw, FM10K_MRQC(vf_info->vsi), 0);  in fm10k_iov_reset_resources_pf()
1036 		fm10k_write_reg(hw, FM10K_TDBAL(vf_q_idx + i), tdbal);  in fm10k_iov_reset_resources_pf()
1037 		fm10k_write_reg(hw, FM10K_TDBAH(vf_q_idx + i), tdbah);  in fm10k_iov_reset_resources_pf()
1038 		fm10k_write_reg(hw, FM10K_TQMAP(qmap_idx + i), vf_q_idx + i);  in fm10k_iov_reset_resources_pf()
1039 		fm10k_write_reg(hw, FM10K_RQMAP(qmap_idx + i), vf_q_idx + i);  in fm10k_iov_reset_resources_pf()
1044 		fm10k_write_reg(hw, FM10K_TQMAP(qmap_idx + i), vf_q_idx);  in fm10k_iov_reset_resources_pf()
1045 		fm10k_write_reg(hw, FM10K_RQMAP(qmap_idx + i), vf_q_idx);  in fm10k_iov_reset_resources_pf()
1061 static s32 fm10k_iov_set_lport_pf(struct fm10k_hw *hw,  in fm10k_iov_set_lport_pf()  argument
1065 	u16 glort = (hw->mac.dglort_map + lport_idx) & FM10K_DGLORTMAP_NONE;  in fm10k_iov_set_lport_pf()
1068 	if (!fm10k_glort_valid_pf(hw, glort))  in fm10k_iov_set_lport_pf()
1085 static void fm10k_iov_reset_lport_pf(struct fm10k_hw *hw,  in fm10k_iov_reset_lport_pf()  argument
1093 		fm10k_update_lport_state_pf(hw, vf_info->glort, 1, false);  in fm10k_iov_reset_lport_pf()
1097 		vf_info->mbx.ops.enqueue_tx(hw, &vf_info->mbx, msg);  in fm10k_iov_reset_lport_pf()
1113 static void fm10k_iov_update_stats_pf(struct fm10k_hw *hw,  in fm10k_iov_update_stats_pf()  argument
1120 	qpp = fm10k_queues_per_pool(hw);  in fm10k_iov_update_stats_pf()
1121 	idx = fm10k_vf_queue_index(hw, vf_idx);  in fm10k_iov_update_stats_pf()
1122 	fm10k_update_hw_stats_q(hw, q, idx, qpp);  in fm10k_iov_update_stats_pf()
1125 static s32 fm10k_iov_report_timestamp_pf(struct fm10k_hw *hw,  in fm10k_iov_report_timestamp_pf()  argument
1135 	return vf_info->mbx.ops.enqueue_tx(hw, &vf_info->mbx, msg);  in fm10k_iov_report_timestamp_pf()
1148 s32 fm10k_iov_msg_msix_pf(struct fm10k_hw *hw, u32 **results,  in fm10k_iov_msg_msix_pf()  argument
1154 	return hw->iov.ops.assign_int_moderator(hw, vf_idx);  in fm10k_iov_msg_msix_pf()
1185 s32 fm10k_iov_msg_mac_vlan_pf(struct fm10k_hw *hw, u32 **results,  in fm10k_iov_msg_mac_vlan_pf()  argument
1222 		err = hw->mac.ops.update_vlan(hw, vid, vf_info->vsi, set);  in fm10k_iov_msg_mac_vlan_pf()
1248 		err = hw->mac.ops.update_uc_addr(hw, vf_info->glort,  in fm10k_iov_msg_mac_vlan_pf()
1274 		err = hw->mac.ops.update_mc_addr(hw, vf_info->glort,  in fm10k_iov_msg_mac_vlan_pf()
1330 s32 fm10k_iov_msg_lport_state_pf(struct fm10k_hw *hw, u32 **results,  in fm10k_iov_msg_lport_state_pf()  argument
1356 			fm10k_update_xcast_mode_pf(hw, vf_info->glort, mode);  in fm10k_iov_msg_lport_state_pf()
1363 			err = fm10k_update_lport_state_pf(hw, vf_info->glort,  in fm10k_iov_msg_lport_state_pf()
1375 		hw->iov.ops.configure_tc(hw, vf_info->vf_idx, vf_info->rate);  in fm10k_iov_msg_lport_state_pf()
1383 		mbx->ops.enqueue_tx(hw, mbx, msg);  in fm10k_iov_msg_lport_state_pf()
1388 		err = fm10k_update_lport_state_pf(hw, vf_info->glort, 1,  in fm10k_iov_msg_lport_state_pf()
1415 static void fm10k_update_hw_stats_pf(struct fm10k_hw *hw,  in fm10k_update_hw_stats_pf()  argument
1422 	id = fm10k_read_reg(hw, FM10K_TXQCTL(0));  in fm10k_update_hw_stats_pf()
1426 		timeout = fm10k_read_hw_stats_32b(hw, FM10K_STATS_TIMEOUT,  in fm10k_update_hw_stats_pf()
1428 		ur = fm10k_read_hw_stats_32b(hw, FM10K_STATS_UR, &stats->ur);  in fm10k_update_hw_stats_pf()
1429 		ca = fm10k_read_hw_stats_32b(hw, FM10K_STATS_CA, &stats->ca);  in fm10k_update_hw_stats_pf()
1430 		um = fm10k_read_hw_stats_32b(hw, FM10K_STATS_UM, &stats->um);  in fm10k_update_hw_stats_pf()
1431 		xec = fm10k_read_hw_stats_32b(hw, FM10K_STATS_XEC, &stats->xec);  in fm10k_update_hw_stats_pf()
1432 		vlan_drop = fm10k_read_hw_stats_32b(hw, FM10K_STATS_VLAN_DROP,  in fm10k_update_hw_stats_pf()
1434 		loopback_drop = fm10k_read_hw_stats_32b(hw,  in fm10k_update_hw_stats_pf()
1437 		nodesc_drop = fm10k_read_hw_stats_32b(hw,  in fm10k_update_hw_stats_pf()
1443 		id = fm10k_read_reg(hw, FM10K_TXQCTL(0));  in fm10k_update_hw_stats_pf()
1474 	fm10k_update_hw_stats_q(hw, stats->q, 0, hw->mac.max_queues);  in fm10k_update_hw_stats_pf()
1485 static void fm10k_rebind_hw_stats_pf(struct fm10k_hw *hw,  in fm10k_rebind_hw_stats_pf()  argument
1499 	fm10k_unbind_hw_stats_q(stats->q, 0, hw->mac.max_queues);  in fm10k_rebind_hw_stats_pf()
1502 	fm10k_update_hw_stats_pf(hw, stats);  in fm10k_rebind_hw_stats_pf()
1513 static void fm10k_set_dma_mask_pf(struct fm10k_hw *hw, u64 dma_mask)  in fm10k_set_dma_mask_pf()  argument
1518 	fm10k_write_reg(hw, FM10K_PHYADDR, phyaddr);  in fm10k_set_dma_mask_pf()
1532 static s32 fm10k_get_fault_pf(struct fm10k_hw *hw, int type,  in fm10k_get_fault_pf()  argument
1548 	func = fm10k_read_reg(hw, type + FM10K_FAULT_FUNC);  in fm10k_get_fault_pf()
1553 	fault->address = fm10k_read_reg(hw, type + FM10K_FAULT_ADDR_HI);  in fm10k_get_fault_pf()
1555 	fault->address = fm10k_read_reg(hw, type + FM10K_FAULT_ADDR_LO);  in fm10k_get_fault_pf()
1556 	fault->specinfo = fm10k_read_reg(hw, type + FM10K_FAULT_SPECINFO);  in fm10k_get_fault_pf()
1559 	fm10k_write_reg(hw, type + FM10K_FAULT_FUNC, FM10K_FAULT_FUNC_VALID);  in fm10k_get_fault_pf()
1579 static s32 fm10k_request_lport_map_pf(struct fm10k_hw *hw)  in fm10k_request_lport_map_pf()  argument
1581 	struct fm10k_mbx_info *mbx = &hw->mbx;  in fm10k_request_lport_map_pf()
1588 	return mbx->ops.enqueue_tx(hw, mbx, msg);  in fm10k_request_lport_map_pf()
1600 static s32 fm10k_get_host_state_pf(struct fm10k_hw *hw, bool *switch_ready)  in fm10k_get_host_state_pf()  argument
1606 	dma_ctrl2 = fm10k_read_reg(hw, FM10K_DMA_CTRL2);  in fm10k_get_host_state_pf()
1611 	ret_val = fm10k_get_host_state_generic(hw, switch_ready);  in fm10k_get_host_state_pf()
1616 	if (hw->mac.dglort_map == FM10K_DGLORTMAP_NONE)  in fm10k_get_host_state_pf()
1617 		ret_val = fm10k_request_lport_map_pf(hw);  in fm10k_get_host_state_pf()
1638 s32 fm10k_msg_lport_map_pf(struct fm10k_hw *hw, u32 **results,  in fm10k_msg_lport_map_pf()  argument
1663 	hw->mac.dglort_map = dglort_map;  in fm10k_msg_lport_map_pf()
1681 s32 fm10k_msg_update_pvid_pf(struct fm10k_hw *hw, u32 **results,  in fm10k_msg_update_pvid_pf()  argument
1698 	if (!fm10k_glort_valid_pf(hw, glort))  in fm10k_msg_update_pvid_pf()
1706 	hw->mac.default_vid = pvid;  in fm10k_msg_update_pvid_pf()
1742 s32 fm10k_msg_err_pf(struct fm10k_hw *hw, u32 **results,  in fm10k_msg_err_pf()  argument
1755 	fm10k_record_global_table_data(&err_msg.mac, &hw->swapi.mac);  in fm10k_msg_err_pf()
1756 	fm10k_record_global_table_data(&err_msg.nexthop, &hw->swapi.nexthop);  in fm10k_msg_err_pf()
1757 	fm10k_record_global_table_data(&err_msg.ffu, &hw->swapi.ffu);  in fm10k_msg_err_pf()
1760 	hw->swapi.status = le32_to_cpu(err_msg.status);  in fm10k_msg_err_pf()
1786 static s32 fm10k_adjust_systime_pf(struct fm10k_hw *hw, s32 ppb)  in fm10k_adjust_systime_pf()  argument
1791 	if (!hw->sw_addr)  in fm10k_adjust_systime_pf()
1818 	fm10k_write_sw_reg(hw, FM10K_SW_SYSTIME_ADJUST, (u32)systime_adjust);  in fm10k_adjust_systime_pf()
1833 static u64 fm10k_read_systime_pf(struct fm10k_hw *hw)  in fm10k_read_systime_pf()  argument
1837 	systime_h = fm10k_read_reg(hw, FM10K_SYSTIME + 1);  in fm10k_read_systime_pf()
1841 		systime_l = fm10k_read_reg(hw, FM10K_SYSTIME);  in fm10k_read_systime_pf()
1842 		systime_h = fm10k_read_reg(hw, FM10K_SYSTIME + 1);  in fm10k_read_systime_pf()
1893 static s32 fm10k_get_invariants_pf(struct fm10k_hw *hw)  in fm10k_get_invariants_pf()  argument
1895 	fm10k_get_invariants_generic(hw);  in fm10k_get_invariants_pf()
1897 	return fm10k_sm_mbx_init(hw, &hw->mbx, fm10k_msg_data_pf);  in fm10k_get_invariants_pf()