Lines Matching refs:hw
30 s32 fm10k_get_bus_info_generic(struct fm10k_hw *hw) in fm10k_get_bus_info_generic() argument
35 link_cap = fm10k_read_pci_cfg_word(hw, FM10K_PCIE_LINK_CAP); in fm10k_get_bus_info_generic()
39 hw->bus_caps.width = fm10k_bus_width_pcie_x1; in fm10k_get_bus_info_generic()
42 hw->bus_caps.width = fm10k_bus_width_pcie_x2; in fm10k_get_bus_info_generic()
45 hw->bus_caps.width = fm10k_bus_width_pcie_x4; in fm10k_get_bus_info_generic()
48 hw->bus_caps.width = fm10k_bus_width_pcie_x8; in fm10k_get_bus_info_generic()
51 hw->bus_caps.width = fm10k_bus_width_unknown; in fm10k_get_bus_info_generic()
57 hw->bus_caps.speed = fm10k_bus_speed_2500; in fm10k_get_bus_info_generic()
60 hw->bus_caps.speed = fm10k_bus_speed_5000; in fm10k_get_bus_info_generic()
63 hw->bus_caps.speed = fm10k_bus_speed_8000; in fm10k_get_bus_info_generic()
66 hw->bus_caps.speed = fm10k_bus_speed_unknown; in fm10k_get_bus_info_generic()
71 device_cap = fm10k_read_pci_cfg_word(hw, FM10K_PCIE_DEV_CAP); in fm10k_get_bus_info_generic()
75 hw->bus_caps.payload = fm10k_bus_payload_128; in fm10k_get_bus_info_generic()
78 hw->bus_caps.payload = fm10k_bus_payload_256; in fm10k_get_bus_info_generic()
81 hw->bus_caps.payload = fm10k_bus_payload_512; in fm10k_get_bus_info_generic()
84 hw->bus_caps.payload = fm10k_bus_payload_unknown; in fm10k_get_bus_info_generic()
89 link_status = fm10k_read_pci_cfg_word(hw, FM10K_PCIE_LINK_STATUS); in fm10k_get_bus_info_generic()
93 hw->bus.width = fm10k_bus_width_pcie_x1; in fm10k_get_bus_info_generic()
96 hw->bus.width = fm10k_bus_width_pcie_x2; in fm10k_get_bus_info_generic()
99 hw->bus.width = fm10k_bus_width_pcie_x4; in fm10k_get_bus_info_generic()
102 hw->bus.width = fm10k_bus_width_pcie_x8; in fm10k_get_bus_info_generic()
105 hw->bus.width = fm10k_bus_width_unknown; in fm10k_get_bus_info_generic()
111 hw->bus.speed = fm10k_bus_speed_2500; in fm10k_get_bus_info_generic()
114 hw->bus.speed = fm10k_bus_speed_5000; in fm10k_get_bus_info_generic()
117 hw->bus.speed = fm10k_bus_speed_8000; in fm10k_get_bus_info_generic()
120 hw->bus.speed = fm10k_bus_speed_unknown; in fm10k_get_bus_info_generic()
125 device_control = fm10k_read_pci_cfg_word(hw, FM10K_PCIE_DEV_CTRL); in fm10k_get_bus_info_generic()
129 hw->bus.payload = fm10k_bus_payload_128; in fm10k_get_bus_info_generic()
132 hw->bus.payload = fm10k_bus_payload_256; in fm10k_get_bus_info_generic()
135 hw->bus.payload = fm10k_bus_payload_512; in fm10k_get_bus_info_generic()
138 hw->bus.payload = fm10k_bus_payload_unknown; in fm10k_get_bus_info_generic()
145 static u16 fm10k_get_pcie_msix_count_generic(struct fm10k_hw *hw) in fm10k_get_pcie_msix_count_generic() argument
150 msix_count = fm10k_read_pci_cfg_word(hw, FM10K_PCI_MSIX_MSG_CTRL); in fm10k_get_pcie_msix_count_generic()
168 s32 fm10k_get_invariants_generic(struct fm10k_hw *hw) in fm10k_get_invariants_generic() argument
170 struct fm10k_mac_info *mac = &hw->mac; in fm10k_get_invariants_generic()
176 mac->max_msix_vectors = fm10k_get_pcie_msix_count_generic(hw); in fm10k_get_invariants_generic()
188 s32 fm10k_start_hw_generic(struct fm10k_hw *hw) in fm10k_start_hw_generic() argument
191 hw->mac.tx_ready = true; in fm10k_start_hw_generic()
202 s32 fm10k_disable_queues_generic(struct fm10k_hw *hw, u16 q_cnt) in fm10k_disable_queues_generic() argument
208 hw->mac.tx_ready = false; in fm10k_disable_queues_generic()
212 reg = fm10k_read_reg(hw, FM10K_TXDCTL(i)); in fm10k_disable_queues_generic()
213 fm10k_write_reg(hw, FM10K_TXDCTL(i), in fm10k_disable_queues_generic()
215 reg = fm10k_read_reg(hw, FM10K_RXQCTL(i)); in fm10k_disable_queues_generic()
216 fm10k_write_reg(hw, FM10K_RXQCTL(i), in fm10k_disable_queues_generic()
220 fm10k_write_flush(hw); in fm10k_disable_queues_generic()
230 reg = fm10k_read_reg(hw, FM10K_TXDCTL(i)); in fm10k_disable_queues_generic()
232 reg = fm10k_read_reg(hw, FM10K_RXQCTL(i)); in fm10k_disable_queues_generic()
253 s32 fm10k_stop_hw_generic(struct fm10k_hw *hw) in fm10k_stop_hw_generic() argument
255 return fm10k_disable_queues_generic(hw, hw->mac.max_queues); in fm10k_stop_hw_generic()
266 u32 fm10k_read_hw_stats_32b(struct fm10k_hw *hw, u32 addr, in fm10k_read_hw_stats_32b() argument
269 u32 delta = fm10k_read_reg(hw, addr) - stat->base_l; in fm10k_read_hw_stats_32b()
271 if (FM10K_REMOVED(hw->hw_addr)) in fm10k_read_hw_stats_32b()
287 static u64 fm10k_read_hw_stats_48b(struct fm10k_hw *hw, u32 addr, in fm10k_read_hw_stats_48b() argument
295 count_h = fm10k_read_reg(hw, addr + 1); in fm10k_read_hw_stats_48b()
300 count_l = fm10k_read_reg(hw, addr); in fm10k_read_hw_stats_48b()
301 count_h = fm10k_read_reg(hw, addr + 1); in fm10k_read_hw_stats_48b()
340 static void fm10k_update_hw_stats_tx_q(struct fm10k_hw *hw, in fm10k_update_hw_stats_tx_q() argument
348 id_tx = fm10k_read_reg(hw, FM10K_TXQCTL(idx)); in fm10k_update_hw_stats_tx_q()
352 tx_packets = fm10k_read_hw_stats_32b(hw, FM10K_QPTC(idx), in fm10k_update_hw_stats_tx_q()
356 tx_bytes = fm10k_read_hw_stats_48b(hw, in fm10k_update_hw_stats_tx_q()
362 id_tx = fm10k_read_reg(hw, FM10K_TXQCTL(idx)); in fm10k_update_hw_stats_tx_q()
391 static void fm10k_update_hw_stats_rx_q(struct fm10k_hw *hw, in fm10k_update_hw_stats_rx_q() argument
399 id_rx = fm10k_read_reg(hw, FM10K_RXQCTL(idx)); in fm10k_update_hw_stats_rx_q()
403 rx_drops = fm10k_read_hw_stats_32b(hw, FM10K_QPRDC(idx), in fm10k_update_hw_stats_rx_q()
406 rx_packets = fm10k_read_hw_stats_32b(hw, FM10K_QPRC(idx), in fm10k_update_hw_stats_rx_q()
410 rx_bytes = fm10k_read_hw_stats_48b(hw, in fm10k_update_hw_stats_rx_q()
416 id_rx = fm10k_read_reg(hw, FM10K_RXQCTL(idx)); in fm10k_update_hw_stats_rx_q()
448 void fm10k_update_hw_stats_q(struct fm10k_hw *hw, struct fm10k_hw_stats_q *q, in fm10k_update_hw_stats_q() argument
454 fm10k_update_hw_stats_tx_q(hw, q, idx); in fm10k_update_hw_stats_q()
455 fm10k_update_hw_stats_rx_q(hw, q, idx); in fm10k_update_hw_stats_q()
487 s32 fm10k_get_host_state_generic(struct fm10k_hw *hw, bool *host_ready) in fm10k_get_host_state_generic() argument
489 struct fm10k_mbx_info *mbx = &hw->mbx; in fm10k_get_host_state_generic()
490 struct fm10k_mac_info *mac = &hw->mac; in fm10k_get_host_state_generic()
492 u32 txdctl = fm10k_read_reg(hw, FM10K_TXDCTL(0)); in fm10k_get_host_state_generic()
495 mbx->ops.process(hw, mbx); in fm10k_get_host_state_generic()
506 if (hw->mac.tx_ready && !(txdctl & FM10K_TXDCTL_ENABLE)) { in fm10k_get_host_state_generic()