634 		ew32(RCTL, rctl & ~E1000_RCTL_EN);  in e1000e_update_rdt_wa()
651 		ew32(TCTL, tctl & ~E1000_TCTL_EN);  in e1000e_update_tdt_wa()
1114 		ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);  in e1000_print_hw_hang()
1120 		ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);  in e1000_print_hw_hang()
1785 			ew32(RCTL, rctl & ~E1000_RCTL_EN);  in e1000_intr_msi()
1866 			ew32(RCTL, rctl & ~E1000_RCTL_EN);  in e1000_intr()
1912 			ew32(IMS, E1000_IMS_OTHER);  in e1000_msix_other()
1917 		ew32(ICS, (icr & adapter->eiac_mask));  in e1000_msix_other()
1930 		ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);  in e1000_msix_other()
1947 		ew32(ICS, tx_ring->ims_val);  in e1000_intr_msix_tx()
1996 		ew32(RFCTL, rfctl);  in e1000_configure_msix()
2032 	ew32(IVAR, ivar);  in e1000_configure_msix()
2039 	ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);  in e1000_configure_msix()
2041 	ew32(CTRL_EXT, ctrl_ext);  in e1000_configure_msix()
2232 	ew32(IMC, ~0);  in e1000_irq_disable()
2234 		ew32(EIAC_82574, 0);  in e1000_irq_disable()
2255 		ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);  in e1000_irq_enable()
2256 		ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);  in e1000_irq_enable()
2259 		ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER);  in e1000_irq_enable()
2261 		ew32(IMS, IMS_ENABLE_MASK);  in e1000_irq_enable()
2284 		ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);  in e1000e_get_hw_control()
2287 		ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);  in e1000e_get_hw_control()
2310 		ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);  in e1000e_release_hw_control()
2313 		ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);  in e1000e_release_hw_control()
2636 		ew32(ITR, new_itr);  in e1000e_write_itr()
2699 				ew32(IMS, adapter->rx_ring->ims_val);  in e1000e_poll()
2776 		ew32(RCTL, rctl);  in e1000e_vlan_filter_disable()
2800 		ew32(RCTL, rctl);  in e1000e_vlan_filter_enable()
2816 	ew32(CTRL, ctrl);  in e1000e_vlan_strip_disable()
2831 	ew32(CTRL, ctrl);  in e1000e_vlan_strip_enable()
2905 				ew32(MDEF(i), (E1000_MDEF_PORT_623 |  in e1000_init_manageability_pt()
2917 	ew32(MANC2H, manc2h);  in e1000_init_manageability_pt()
2918 	ew32(MANC, manc);  in e1000_init_manageability_pt()
2937 	ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32)));  in e1000_configure_tx()
2938 	ew32(TDBAH(0), (tdba >> 32));  in e1000_configure_tx()
2939 	ew32(TDLEN(0), tdlen);  in e1000_configure_tx()
2940 	ew32(TDH(0), 0);  in e1000_configure_tx()
2941 	ew32(TDT(0), 0);  in e1000_configure_tx()
2952 	ew32(TIDV, adapter->tx_int_delay);  in e1000_configure_tx()
2954 	ew32(TADV, adapter->tx_abs_int_delay);  in e1000_configure_tx()
2971 		ew32(TXDCTL(0), txdctl);  in e1000_configure_tx()
2974 	ew32(TXDCTL(1), er32(TXDCTL(0)));  in e1000_configure_tx()
2989 		ew32(TARC(0), tarc);  in e1000_configure_tx()
2996 		ew32(TARC(0), tarc);  in e1000_configure_tx()
2999 		ew32(TARC(1), tarc);  in e1000_configure_tx()
3012 	ew32(TCTL, tctl);  in e1000_configure_tx()
3022 		ew32(IOSFPC, reg_val);  in e1000_configure_tx()
3026 		ew32(TARC(0), reg_val);  in e1000_configure_tx()
3121 	ew32(RFCTL, rfctl);  in e1000_setup_rctl()
3163 		ew32(PSRCTL, psrctl);  in e1000_setup_rctl()
3183 	ew32(RCTL, rctl);  in e1000_setup_rctl()
3220 		ew32(RCTL, rctl & ~E1000_RCTL_EN);  in e1000_configure_rx()
3233 		ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);  in e1000_configure_rx()
3234 		ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);  in e1000_configure_rx()
3246 	ew32(RDTR, adapter->rx_int_delay);  in e1000_configure_rx()
3249 	ew32(RADV, adapter->rx_abs_int_delay);  in e1000_configure_rx()
3256 	ew32(IAM, 0xffffffff);  in e1000_configure_rx()
3257 	ew32(CTRL_EXT, ctrl_ext);  in e1000_configure_rx()
3264 	ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32)));  in e1000_configure_rx()
3265 	ew32(RDBAH(0), (rdba >> 32));  in e1000_configure_rx()
3266 	ew32(RDLEN(0), rdlen);  in e1000_configure_rx()
3267 	ew32(RDH(0), 0);  in e1000_configure_rx()
3268 	ew32(RDT(0), 0);  in e1000_configure_rx()
3284 	ew32(RXCSUM, rxcsum);  in e1000_configure_rx()
3297 			ew32(RXDCTL(0), rxdctl | 0x3);  in e1000_configure_rx()
3307 	ew32(RCTL, rctl);  in e1000_configure_rx()
3397 		ew32(RAH(rar_entries), 0);  in e1000e_write_uc_addr_list()
3398 		ew32(RAL(rar_entries), 0);  in e1000e_write_uc_addr_list()
3457 	ew32(RCTL, rctl);  in e1000e_set_rx_mode()
3474 		ew32(RSSRK(i), rss_key[i]);  in e1000e_setup_rss_hash()
3478 		ew32(RETA(i), 0);  in e1000e_setup_rss_hash()
3486 	ew32(RXCSUM, rxcsum);  in e1000e_setup_rss_hash()
3494 	ew32(MRQC, mrqc);  in e1000e_setup_rss_hash()
3520 			ew32(FEXTNVM7, fextnvm7 | (1 << 0));  in e1000e_get_base_timinca()
3695 	ew32(TSYNCTXCTL, regval);  in e1000e_config_hwtstamp()
3706 	ew32(TSYNCRXCTL, regval);  in e1000e_config_hwtstamp()
3720 	ew32(RXMTRL, rxmtrl);  in e1000e_config_hwtstamp()
3727 	ew32(RXUDP, rxudp);  in e1000e_config_hwtstamp()
3739 	ew32(TIMINCA, regval);  in e1000e_config_hwtstamp()
3815 	ew32(TCTL, tctl | E1000_TCTL_EN);  in e1000_flush_tx_ring()
3828 	ew32(TDT(0), tx_ring->next_to_use);  in e1000_flush_tx_ring()
3844 	ew32(RCTL, rctl & ~E1000_RCTL_EN);  in e1000_flush_rx_ring()
3857 	ew32(RXDCTL(0), rxdctl);  in e1000_flush_rx_ring()
3859 	ew32(RCTL, rctl | E1000_RCTL_EN);  in e1000_flush_rx_ring()
3862 	ew32(RCTL, rctl & ~E1000_RCTL_EN);  in e1000_flush_rx_ring()
3885 	ew32(FEXTNVM11, fext_nvm11);  in e1000_flush_desc_rings()
3918 	ew32(PBA, pba);  in e1000e_reset()
3960 		ew32(PBA, pba);  in e1000e_reset()
3983 			ew32(PBA, pba);  in e1000e_reset()
4022 		ew32(PBA, pba);  in e1000e_reset()
4067 	ew32(WUC, 0);  in e1000e_reset()
4075 	ew32(VET, ETH_P_8021Q);  in e1000e_reset()
4137 		ew32(FEXTNVM7, reg);  in e1000e_reset()
4142 		ew32(FEXTNVM9, reg);  in e1000e_reset()
4164 		ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);  in e1000e_up()
4166 		ew32(ICS, E1000_ICS_LSC);  in e1000e_up()
4179 	ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);  in e1000e_flush_descriptors()
4180 	ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);  in e1000e_flush_descriptors()
4188 	ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);  in e1000e_flush_descriptors()
4189 	ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);  in e1000e_flush_descriptors()
4218 		ew32(RCTL, rctl & ~E1000_RCTL_EN);  in e1000e_down()
4226 	ew32(TCTL, tctl);  in e1000e_down()
4447 	ew32(ICS, E1000_ICS_RXSEQ);  in e1000_test_msi_interrupt()
4595 		ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);  in e1000_open()
4597 		ew32(ICS, E1000_ICS_LSC);  in e1000_open()
5053 		ew32(RCTL, rctl | E1000_RCTL_EN);  in e1000e_enable_receives()
5178 				ew32(TARC(0), tarc0);  in e1000_watchdog_task()
5207 			ew32(TCTL, tctl);  in e1000_watchdog_task()
5293 		ew32(ICS, adapter->rx_ring->ims_val);  in e1000_watchdog_task()
5295 		ew32(ICS, E1000_ICS_RXDMT0);  in e1000_watchdog_task()
6186 	ew32(WUFC, wufc);  in e1000_init_phy_wakeup()
6187 	ew32(WUC, (E1000_WUC_PHY_WAKE | E1000_WUC_APMPME |  in e1000_init_phy_wakeup()
6276 			ew32(RCTL, rctl);  in __e1000_shutdown()
6283 		ew32(CTRL, ctrl);  in __e1000_shutdown()
6291 			ew32(CTRL_EXT, ctrl_ext);  in __e1000_shutdown()
6307 			ew32(WUFC, wufc);  in __e1000_shutdown()
6308 			ew32(WUC, E1000_WUC_PME_EN);  in __e1000_shutdown()
6311 		ew32(WUC, 0);  in __e1000_shutdown()
6312 		ew32(WUFC, 0);  in __e1000_shutdown()
6543 		ew32(WUS, ~0);  in __e1000_resume()
6801 		ew32(WUS, ~0);  in e1000_io_slot_reset()