115 static void e1000_clear_hw_cntrs_ich8lan(struct e1000_hw *hw);
116 static void e1000_initialize_hw_bits_ich8lan(struct e1000_hw *hw);
117 static s32 e1000_erase_flash_bank_ich8lan(struct e1000_hw *hw, u32 bank);
118 static s32 e1000_retry_write_flash_byte_ich8lan(struct e1000_hw *hw,
120 static s32 e1000_read_flash_byte_ich8lan(struct e1000_hw *hw, u32 offset,
122 static s32 e1000_read_flash_word_ich8lan(struct e1000_hw *hw, u32 offset,
124 static s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,
126 static s32 e1000_read_flash_data32_ich8lan(struct e1000_hw *hw, u32 offset,
128 static s32 e1000_read_flash_dword_ich8lan(struct e1000_hw *hw,
130 static s32 e1000_write_flash_data32_ich8lan(struct e1000_hw *hw,
132 static s32 e1000_retry_write_flash_dword_ich8lan(struct e1000_hw *hw,
134 static s32 e1000_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw);
135 static s32 e1000_cleanup_led_ich8lan(struct e1000_hw *hw);
136 static s32 e1000_led_on_ich8lan(struct e1000_hw *hw);
137 static s32 e1000_led_off_ich8lan(struct e1000_hw *hw);
138 static s32 e1000_id_led_init_pchlan(struct e1000_hw *hw);
139 static s32 e1000_setup_led_pchlan(struct e1000_hw *hw);
140 static s32 e1000_cleanup_led_pchlan(struct e1000_hw *hw);
141 static s32 e1000_led_on_pchlan(struct e1000_hw *hw);
142 static s32 e1000_led_off_pchlan(struct e1000_hw *hw);
143 static s32 e1000_set_lplu_state_pchlan(struct e1000_hw *hw, bool active);
144 static void e1000_power_down_phy_copper_ich8lan(struct e1000_hw *hw);
145 static void e1000_lan_init_done_ich8lan(struct e1000_hw *hw);
146 static s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link);
147 static s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw);
148 static bool e1000_check_mng_mode_ich8lan(struct e1000_hw *hw);
149 static bool e1000_check_mng_mode_pchlan(struct e1000_hw *hw);
150 static int e1000_rar_set_pch2lan(struct e1000_hw *hw, u8 *addr, u32 index);
151 static int e1000_rar_set_pch_lpt(struct e1000_hw *hw, u8 *addr, u32 index);
152 static u32 e1000_rar_get_count_pch_lpt(struct e1000_hw *hw);
153 static s32 e1000_k1_workaround_lv(struct e1000_hw *hw);
154 static void e1000_gate_hw_phy_config_ich8lan(struct e1000_hw *hw, bool gate);
155 static s32 e1000_disable_ulp_lpt_lp(struct e1000_hw *hw, bool force);
156 static s32 e1000_setup_copper_link_pch_lpt(struct e1000_hw *hw);
157 static s32 e1000_oem_bits_config_ich8lan(struct e1000_hw *hw, bool d0_state);
159 static inline u16 __er16flash(struct e1000_hw *hw, unsigned long reg)  in __er16flash()  argument
161 	return readw(hw->flash_address + reg);  in __er16flash()
164 static inline u32 __er32flash(struct e1000_hw *hw, unsigned long reg)  in __er32flash()  argument
166 	return readl(hw->flash_address + reg);  in __er32flash()
169 static inline void __ew16flash(struct e1000_hw *hw, unsigned long reg, u16 val)  in __ew16flash()  argument
171 	writew(val, hw->flash_address + reg);  in __ew16flash()
174 static inline void __ew32flash(struct e1000_hw *hw, unsigned long reg, u32 val)  in __ew32flash()  argument
176 	writel(val, hw->flash_address + reg);  in __ew32flash()
179 #define er16flash(reg)		__er16flash(hw, (reg))
180 #define er32flash(reg)		__er32flash(hw, (reg))
181 #define ew16flash(reg, val)	__ew16flash(hw, (reg), (val))
182 #define ew32flash(reg, val)	__ew32flash(hw, (reg), (val))
194 static bool e1000_phy_is_accessible_pchlan(struct e1000_hw *hw)  in e1000_phy_is_accessible_pchlan()  argument
203 		ret_val = e1e_rphy_locked(hw, MII_PHYSID1, &phy_reg);  in e1000_phy_is_accessible_pchlan()
208 		ret_val = e1e_rphy_locked(hw, MII_PHYSID2, &phy_reg);  in e1000_phy_is_accessible_pchlan()
217 	if (hw->phy.id) {  in e1000_phy_is_accessible_pchlan()
218 		if (hw->phy.id == phy_id)  in e1000_phy_is_accessible_pchlan()
221 		hw->phy.id = phy_id;  in e1000_phy_is_accessible_pchlan()
222 		hw->phy.revision = (u32)(phy_reg & ~PHY_REVISION_MASK);  in e1000_phy_is_accessible_pchlan()
229 	if (hw->mac.type < e1000_pch_lpt) {  in e1000_phy_is_accessible_pchlan()
230 		hw->phy.ops.release(hw);  in e1000_phy_is_accessible_pchlan()
231 		ret_val = e1000_set_mdio_slow_mode_hv(hw);  in e1000_phy_is_accessible_pchlan()
233 			ret_val = e1000e_get_phy_id(hw);  in e1000_phy_is_accessible_pchlan()
234 		hw->phy.ops.acquire(hw);  in e1000_phy_is_accessible_pchlan()
240 	if ((hw->mac.type == e1000_pch_lpt) || (hw->mac.type == e1000_pch_spt)) {  in e1000_phy_is_accessible_pchlan()
244 			e1e_rphy_locked(hw, CV_SMB_CTRL, &phy_reg);  in e1000_phy_is_accessible_pchlan()
246 			e1e_wphy_locked(hw, CV_SMB_CTRL, phy_reg);  in e1000_phy_is_accessible_pchlan()
265 static void e1000_toggle_lanphypc_pch_lpt(struct e1000_hw *hw)  in e1000_toggle_lanphypc_pch_lpt()  argument
286 	if (hw->mac.type < e1000_pch_lpt) {  in e1000_toggle_lanphypc_pch_lpt()
306 static s32 e1000_init_phy_workarounds_pchlan(struct e1000_hw *hw)  in e1000_init_phy_workarounds_pchlan()  argument
308 	struct e1000_adapter *adapter = hw->adapter;  in e1000_init_phy_workarounds_pchlan()
315 	e1000_gate_hw_phy_config_ich8lan(hw, true);  in e1000_init_phy_workarounds_pchlan()
320 	hw->dev_spec.ich8lan.ulp_state = e1000_ulp_state_unknown;  in e1000_init_phy_workarounds_pchlan()
321 	e1000_disable_ulp_lpt_lp(hw, true);  in e1000_init_phy_workarounds_pchlan()
323 	ret_val = hw->phy.ops.acquire(hw);  in e1000_init_phy_workarounds_pchlan()
333 	switch (hw->mac.type) {  in e1000_init_phy_workarounds_pchlan()
336 		if (e1000_phy_is_accessible_pchlan(hw))  in e1000_init_phy_workarounds_pchlan()
354 		if (e1000_phy_is_accessible_pchlan(hw))  in e1000_init_phy_workarounds_pchlan()
359 		if ((hw->mac.type == e1000_pchlan) &&  in e1000_init_phy_workarounds_pchlan()
363 		if (hw->phy.ops.check_reset_block(hw)) {  in e1000_init_phy_workarounds_pchlan()
370 		e1000_toggle_lanphypc_pch_lpt(hw);  in e1000_init_phy_workarounds_pchlan()
371 		if (hw->mac.type >= e1000_pch_lpt) {  in e1000_init_phy_workarounds_pchlan()
372 			if (e1000_phy_is_accessible_pchlan(hw))  in e1000_init_phy_workarounds_pchlan()
382 			if (e1000_phy_is_accessible_pchlan(hw))  in e1000_init_phy_workarounds_pchlan()
392 	hw->phy.ops.release(hw);  in e1000_init_phy_workarounds_pchlan()
396 		if (hw->phy.ops.check_reset_block(hw)) {  in e1000_init_phy_workarounds_pchlan()
406 		ret_val = e1000e_phy_hw_reset_generic(hw);  in e1000_init_phy_workarounds_pchlan()
416 		ret_val = hw->phy.ops.check_reset_block(hw);  in e1000_init_phy_workarounds_pchlan()
423 	if ((hw->mac.type == e1000_pch2lan) &&  in e1000_init_phy_workarounds_pchlan()
426 		e1000_gate_hw_phy_config_ich8lan(hw, false);  in e1000_init_phy_workarounds_pchlan()
438 static s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw)  in e1000_init_phy_params_pchlan()  argument
440 	struct e1000_phy_info *phy = &hw->phy;  in e1000_init_phy_params_pchlan()
461 	ret_val = e1000_init_phy_workarounds_pchlan(hw);  in e1000_init_phy_params_pchlan()
466 		switch (hw->mac.type) {  in e1000_init_phy_params_pchlan()
468 			ret_val = e1000e_get_phy_id(hw);  in e1000_init_phy_params_pchlan()
480 			ret_val = e1000_set_mdio_slow_mode_hv(hw);  in e1000_init_phy_params_pchlan()
483 			ret_val = e1000e_get_phy_id(hw);  in e1000_init_phy_params_pchlan()
521 static s32 e1000_init_phy_params_ich8lan(struct e1000_hw *hw)  in e1000_init_phy_params_ich8lan()  argument
523 	struct e1000_phy_info *phy = &hw->phy;  in e1000_init_phy_params_ich8lan()
536 	ret_val = e1000e_determine_phy_address(hw);  in e1000_init_phy_params_ich8lan()
540 		ret_val = e1000e_determine_phy_address(hw);  in e1000_init_phy_params_ich8lan()
551 		ret_val = e1000e_get_phy_id(hw);  in e1000_init_phy_params_ich8lan()
600 static s32 e1000_init_nvm_params_ich8lan(struct e1000_hw *hw)  in e1000_init_nvm_params_ich8lan()  argument
602 	struct e1000_nvm_info *nvm = &hw->nvm;  in e1000_init_nvm_params_ich8lan()
603 	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;  in e1000_init_nvm_params_ich8lan()
610 	if (hw->mac.type == e1000_pch_spt) {  in e1000_init_nvm_params_ich8lan()
624 		hw->flash_address = hw->hw_addr + E1000_FLASH_BASE_ADDR;  in e1000_init_nvm_params_ich8lan()
627 		if (!hw->flash_address) {  in e1000_init_nvm_params_ich8lan()
673 static s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw)  in e1000_init_mac_params_ich8lan()  argument
675 	struct e1000_mac_info *mac = &hw->mac;  in e1000_init_mac_params_ich8lan()
678 	hw->phy.media_type = e1000_media_type_copper;  in e1000_init_mac_params_ich8lan()
745 		e1000e_set_kmrn_lock_loss_workaround_ich8lan(hw, true);  in e1000_init_mac_params_ich8lan()
759 static s32 __e1000_access_emi_reg_locked(struct e1000_hw *hw, u16 address,  in __e1000_access_emi_reg_locked()  argument
764 	ret_val = e1e_wphy_locked(hw, I82579_EMI_ADDR, address);  in __e1000_access_emi_reg_locked()
769 		ret_val = e1e_rphy_locked(hw, I82579_EMI_DATA, data);  in __e1000_access_emi_reg_locked()
771 		ret_val = e1e_wphy_locked(hw, I82579_EMI_DATA, *data);  in __e1000_access_emi_reg_locked()
784 s32 e1000_read_emi_reg_locked(struct e1000_hw *hw, u16 addr, u16 *data)  in e1000_read_emi_reg_locked()  argument
786 	return __e1000_access_emi_reg_locked(hw, addr, data, true);  in e1000_read_emi_reg_locked()
797 s32 e1000_write_emi_reg_locked(struct e1000_hw *hw, u16 addr, u16 data)  in e1000_write_emi_reg_locked()  argument
799 	return __e1000_access_emi_reg_locked(hw, addr, &data, false);  in e1000_write_emi_reg_locked()
816 s32 e1000_set_eee_pchlan(struct e1000_hw *hw)  in e1000_set_eee_pchlan()  argument
818 	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;  in e1000_set_eee_pchlan()
822 	switch (hw->phy.type) {  in e1000_set_eee_pchlan()
837 	ret_val = hw->phy.ops.acquire(hw);  in e1000_set_eee_pchlan()
841 	ret_val = e1e_rphy_locked(hw, I82579_LPI_CTRL, &lpi_ctrl);  in e1000_set_eee_pchlan()
851 		ret_val = e1000_read_emi_reg_locked(hw, lpa,  in e1000_set_eee_pchlan()
857 		ret_val = e1000_read_emi_reg_locked(hw, adv_addr, &adv);  in e1000_set_eee_pchlan()
868 			e1e_rphy_locked(hw, MII_LPA, &data);  in e1000_set_eee_pchlan()
881 	if (hw->phy.type == e1000_phy_82579) {  in e1000_set_eee_pchlan()
882 		ret_val = e1000_read_emi_reg_locked(hw, I82579_LPI_PLL_SHUT,  in e1000_set_eee_pchlan()
888 		ret_val = e1000_write_emi_reg_locked(hw, I82579_LPI_PLL_SHUT,  in e1000_set_eee_pchlan()
893 	ret_val = e1000_read_emi_reg_locked(hw, pcs_status, &data);  in e1000_set_eee_pchlan()
897 	ret_val = e1e_wphy_locked(hw, I82579_LPI_CTRL, lpi_ctrl);  in e1000_set_eee_pchlan()
899 	hw->phy.ops.release(hw);  in e1000_set_eee_pchlan()
915 static s32 e1000_k1_workaround_lpt_lp(struct e1000_hw *hw, bool link)  in e1000_k1_workaround_lpt_lp()  argument
923 		ret_val = hw->phy.ops.acquire(hw);  in e1000_k1_workaround_lpt_lp()
928 		    e1000e_read_kmrn_reg_locked(hw, E1000_KMRNCTRLSTA_K1_CONFIG,  in e1000_k1_workaround_lpt_lp()
934 		    e1000e_write_kmrn_reg_locked(hw,  in e1000_k1_workaround_lpt_lp()
946 		    e1000e_write_kmrn_reg_locked(hw,  in e1000_k1_workaround_lpt_lp()
950 		hw->phy.ops.release(hw);  in e1000_k1_workaround_lpt_lp()
955 		if ((hw->phy.revision > 5) || !link ||  in e1000_k1_workaround_lpt_lp()
960 		ret_val = e1e_rphy(hw, I217_INBAND_CTRL, &reg);  in e1000_k1_workaround_lpt_lp()
982 		ret_val = e1e_wphy(hw, I217_INBAND_CTRL, reg);  in e1000_k1_workaround_lpt_lp()
1009 static s32 e1000_platform_pm_pch_lpt(struct e1000_hw *hw, bool link)  in e1000_platform_pm_pch_lpt()  argument
1022 		if (!hw->adapter->max_frame_size) {  in e1000_platform_pm_pch_lpt()
1027 		hw->mac.ops.get_link_up_info(hw, &speed, &duplex);  in e1000_platform_pm_pch_lpt()
1045 		value = (rxa > hw->adapter->max_frame_size) ?  in e1000_platform_pm_pch_lpt()
1046 			(rxa - hw->adapter->max_frame_size) * (16000 / speed) :  in e1000_platform_pm_pch_lpt()
1060 		pci_read_config_word(hw->adapter->pdev, E1000_PCI_LTR_CAP_LPT,  in e1000_platform_pm_pch_lpt()
1062 		pci_read_config_word(hw->adapter->pdev,  in e1000_platform_pm_pch_lpt()
1087 s32 e1000_enable_ulp_lpt_lp(struct e1000_hw *hw, bool to_sx)  in e1000_enable_ulp_lpt_lp()  argument
1094 	if ((hw->mac.type < e1000_pch_lpt) ||  in e1000_enable_ulp_lpt_lp()
1095 	    (hw->adapter->pdev->device == E1000_DEV_ID_PCH_LPT_I217_LM) ||  in e1000_enable_ulp_lpt_lp()
1096 	    (hw->adapter->pdev->device == E1000_DEV_ID_PCH_LPT_I217_V) ||  in e1000_enable_ulp_lpt_lp()
1097 	    (hw->adapter->pdev->device == E1000_DEV_ID_PCH_I218_LM2) ||  in e1000_enable_ulp_lpt_lp()
1098 	    (hw->adapter->pdev->device == E1000_DEV_ID_PCH_I218_V2) ||  in e1000_enable_ulp_lpt_lp()
1099 	    (hw->dev_spec.ich8lan.ulp_state == e1000_ulp_state_on))  in e1000_enable_ulp_lpt_lp()
1130 	ret_val = hw->phy.ops.acquire(hw);  in e1000_enable_ulp_lpt_lp()
1135 	ret_val = e1000_read_phy_reg_hv_locked(hw, CV_SMB_CTRL, &phy_reg);  in e1000_enable_ulp_lpt_lp()
1139 	e1000_write_phy_reg_hv_locked(hw, CV_SMB_CTRL, phy_reg);  in e1000_enable_ulp_lpt_lp()
1149 	if ((hw->phy.type == e1000_phy_i217) && (hw->phy.revision == 6)) {  in e1000_enable_ulp_lpt_lp()
1150 		ret_val = e1000_read_phy_reg_hv_locked(hw, HV_OEM_BITS,  in e1000_enable_ulp_lpt_lp()
1158 		ret_val = e1000_write_phy_reg_hv_locked(hw, HV_OEM_BITS,  in e1000_enable_ulp_lpt_lp()
1168 	ret_val = e1000_read_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, &phy_reg);  in e1000_enable_ulp_lpt_lp()
1186 	e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg);  in e1000_enable_ulp_lpt_lp()
1195 	e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg);  in e1000_enable_ulp_lpt_lp()
1197 	if ((hw->phy.type == e1000_phy_i217) && (hw->phy.revision == 6) &&  in e1000_enable_ulp_lpt_lp()
1199 		ret_val = e1000_write_phy_reg_hv_locked(hw, HV_OEM_BITS,  in e1000_enable_ulp_lpt_lp()
1206 	hw->phy.ops.release(hw);  in e1000_enable_ulp_lpt_lp()
1211 		hw->dev_spec.ich8lan.ulp_state = e1000_ulp_state_on;  in e1000_enable_ulp_lpt_lp()
1231 static s32 e1000_disable_ulp_lpt_lp(struct e1000_hw *hw, bool force)  in e1000_disable_ulp_lpt_lp()  argument
1238 	if ((hw->mac.type < e1000_pch_lpt) ||  in e1000_disable_ulp_lpt_lp()
1239 	    (hw->adapter->pdev->device == E1000_DEV_ID_PCH_LPT_I217_LM) ||  in e1000_disable_ulp_lpt_lp()
1240 	    (hw->adapter->pdev->device == E1000_DEV_ID_PCH_LPT_I217_V) ||  in e1000_disable_ulp_lpt_lp()
1241 	    (hw->adapter->pdev->device == E1000_DEV_ID_PCH_I218_LM2) ||  in e1000_disable_ulp_lpt_lp()
1242 	    (hw->adapter->pdev->device == E1000_DEV_ID_PCH_I218_V2) ||  in e1000_disable_ulp_lpt_lp()
1243 	    (hw->dev_spec.ich8lan.ulp_state == e1000_ulp_state_off))  in e1000_disable_ulp_lpt_lp()
1280 	ret_val = hw->phy.ops.acquire(hw);  in e1000_disable_ulp_lpt_lp()
1286 		e1000_toggle_lanphypc_pch_lpt(hw);  in e1000_disable_ulp_lpt_lp()
1289 	ret_val = e1000_read_phy_reg_hv_locked(hw, CV_SMB_CTRL, &phy_reg);  in e1000_disable_ulp_lpt_lp()
1300 		ret_val = e1000_read_phy_reg_hv_locked(hw, CV_SMB_CTRL,  in e1000_disable_ulp_lpt_lp()
1306 	e1000_write_phy_reg_hv_locked(hw, CV_SMB_CTRL, phy_reg);  in e1000_disable_ulp_lpt_lp()
1316 	ret_val = e1000_read_phy_reg_hv_locked(hw, HV_PM_CTRL, &phy_reg);  in e1000_disable_ulp_lpt_lp()
1320 	e1000_write_phy_reg_hv_locked(hw, HV_PM_CTRL, phy_reg);  in e1000_disable_ulp_lpt_lp()
1323 	ret_val = e1000_read_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, &phy_reg);  in e1000_disable_ulp_lpt_lp()
1332 	e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg);  in e1000_disable_ulp_lpt_lp()
1336 	e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg);  in e1000_disable_ulp_lpt_lp()
1344 	hw->phy.ops.release(hw);  in e1000_disable_ulp_lpt_lp()
1346 		e1000_phy_hw_reset(hw);  in e1000_disable_ulp_lpt_lp()
1353 		hw->dev_spec.ich8lan.ulp_state = e1000_ulp_state_off;  in e1000_disable_ulp_lpt_lp()
1366 static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)  in e1000_check_for_copper_link_ich8lan()  argument
1368 	struct e1000_mac_info *mac = &hw->mac;  in e1000_check_for_copper_link_ich8lan()
1386 	ret_val = e1000e_phy_has_link_generic(hw, 1, 0, &link);  in e1000_check_for_copper_link_ich8lan()
1390 	if (hw->mac.type == e1000_pchlan) {  in e1000_check_for_copper_link_ich8lan()
1391 		ret_val = e1000_k1_gig_workaround_hv(hw, link);  in e1000_check_for_copper_link_ich8lan()
1400 	if (((hw->mac.type == e1000_pch2lan) ||  in e1000_check_for_copper_link_ich8lan()
1401 	     (hw->mac.type == e1000_pch_lpt) ||  in e1000_check_for_copper_link_ich8lan()
1402 	     (hw->mac.type == e1000_pch_spt)) && link) {  in e1000_check_for_copper_link_ich8lan()
1405 		e1000e_get_speed_and_duplex_copper(hw, &speed, &duplex);  in e1000_check_for_copper_link_ich8lan()
1413 		} else if (hw->mac.type == e1000_pch_spt &&  in e1000_check_for_copper_link_ich8lan()
1426 		ret_val = hw->phy.ops.acquire(hw);  in e1000_check_for_copper_link_ich8lan()
1430 		if (hw->mac.type == e1000_pch2lan)  in e1000_check_for_copper_link_ich8lan()
1434 		ret_val = e1000_write_emi_reg_locked(hw, emi_addr, emi_val);  in e1000_check_for_copper_link_ich8lan()
1436 		hw->phy.ops.release(hw);  in e1000_check_for_copper_link_ich8lan()
1441 		if (hw->mac.type == e1000_pch_spt) {  in e1000_check_for_copper_link_ich8lan()
1446 				ret_val = hw->phy.ops.acquire(hw);  in e1000_check_for_copper_link_ich8lan()
1450 				ret_val = e1e_rphy_locked(hw,  in e1000_check_for_copper_link_ich8lan()
1454 					hw->phy.ops.release(hw);  in e1000_check_for_copper_link_ich8lan()
1463 					    e1e_wphy_locked(hw,  in e1000_check_for_copper_link_ich8lan()
1467 				hw->phy.ops.release(hw);  in e1000_check_for_copper_link_ich8lan()
1479 	if ((hw->mac.type == e1000_pch_lpt) || (hw->mac.type == e1000_pch_spt)) {  in e1000_check_for_copper_link_ich8lan()
1489 	if ((hw->adapter->pdev->device == E1000_DEV_ID_PCH_LPTLP_I218_LM) ||  in e1000_check_for_copper_link_ich8lan()
1490 	    (hw->adapter->pdev->device == E1000_DEV_ID_PCH_LPTLP_I218_V) ||  in e1000_check_for_copper_link_ich8lan()
1491 	    (hw->adapter->pdev->device == E1000_DEV_ID_PCH_I218_LM3) ||  in e1000_check_for_copper_link_ich8lan()
1492 	    (hw->adapter->pdev->device == E1000_DEV_ID_PCH_I218_V3)) {  in e1000_check_for_copper_link_ich8lan()
1493 		ret_val = e1000_k1_workaround_lpt_lp(hw, link);  in e1000_check_for_copper_link_ich8lan()
1497 	if ((hw->mac.type == e1000_pch_lpt) ||  in e1000_check_for_copper_link_ich8lan()
1498 	    (hw->mac.type == e1000_pch_spt)) {  in e1000_check_for_copper_link_ich8lan()
1502 		ret_val = e1000_platform_pm_pch_lpt(hw, link);  in e1000_check_for_copper_link_ich8lan()
1508 	hw->dev_spec.ich8lan.eee_lp_ability = 0;  in e1000_check_for_copper_link_ich8lan()
1511 	if (hw->mac.type == e1000_pch_spt) {  in e1000_check_for_copper_link_ich8lan()
1528 	switch (hw->mac.type) {  in e1000_check_for_copper_link_ich8lan()
1530 		ret_val = e1000_k1_workaround_lv(hw);  in e1000_check_for_copper_link_ich8lan()
1535 		if (hw->phy.type == e1000_phy_82578) {  in e1000_check_for_copper_link_ich8lan()
1536 			ret_val = e1000_link_stall_workaround_hv(hw);  in e1000_check_for_copper_link_ich8lan()
1546 		e1e_rphy(hw, HV_KMRN_FIFO_CTRLSTA, &phy_reg);  in e1000_check_for_copper_link_ich8lan()
1552 		e1e_wphy(hw, HV_KMRN_FIFO_CTRLSTA, phy_reg);  in e1000_check_for_copper_link_ich8lan()
1561 	e1000e_check_downshift(hw);  in e1000_check_for_copper_link_ich8lan()
1564 	if (hw->phy.type > e1000_phy_82579) {  in e1000_check_for_copper_link_ich8lan()
1565 		ret_val = e1000_set_eee_pchlan(hw);  in e1000_check_for_copper_link_ich8lan()
1580 	mac->ops.config_collision_dist(hw);  in e1000_check_for_copper_link_ich8lan()
1587 	ret_val = e1000e_config_fc_after_link_up(hw);  in e1000_check_for_copper_link_ich8lan()
1596 	struct e1000_hw *hw = &adapter->hw;  in e1000_get_variants_ich8lan()  local
1599 	rc = e1000_init_mac_params_ich8lan(hw);  in e1000_get_variants_ich8lan()
1603 	rc = e1000_init_nvm_params_ich8lan(hw);  in e1000_get_variants_ich8lan()
1607 	switch (hw->mac.type) {  in e1000_get_variants_ich8lan()
1611 		rc = e1000_init_phy_params_ich8lan(hw);  in e1000_get_variants_ich8lan()
1617 		rc = e1000_init_phy_params_pchlan(hw);  in e1000_get_variants_ich8lan()
1628 	if ((adapter->hw.phy.type == e1000_phy_ife) ||  in e1000_get_variants_ich8lan()
1629 	    ((adapter->hw.mac.type >= e1000_pch2lan) &&  in e1000_get_variants_ich8lan()
1634 		hw->mac.ops.blink_led = NULL;  in e1000_get_variants_ich8lan()
1637 	if ((adapter->hw.mac.type == e1000_ich8lan) &&  in e1000_get_variants_ich8lan()
1638 	    (adapter->hw.phy.type != e1000_phy_ife))  in e1000_get_variants_ich8lan()
1642 	if ((adapter->hw.mac.type == e1000_pch2lan) &&  in e1000_get_variants_ich8lan()
1657 static s32 e1000_acquire_nvm_ich8lan(struct e1000_hw __always_unused *hw)  in e1000_acquire_nvm_ich8lan()  argument
1670 static void e1000_release_nvm_ich8lan(struct e1000_hw __always_unused *hw)  in e1000_release_nvm_ich8lan()  argument
1682 static s32 e1000_acquire_swflag_ich8lan(struct e1000_hw *hw)  in e1000_acquire_swflag_ich8lan()  argument
1688 			     &hw->adapter->state)) {  in e1000_acquire_swflag_ich8lan()
1733 		clear_bit(__E1000_ACCESS_SHARED_RESOURCE, &hw->adapter->state);  in e1000_acquire_swflag_ich8lan()
1745 static void e1000_release_swflag_ich8lan(struct e1000_hw *hw)  in e1000_release_swflag_ich8lan()  argument
1758 	clear_bit(__E1000_ACCESS_SHARED_RESOURCE, &hw->adapter->state);  in e1000_release_swflag_ich8lan()
1769 static bool e1000_check_mng_mode_ich8lan(struct e1000_hw *hw)  in e1000_check_mng_mode_ich8lan()  argument
1787 static bool e1000_check_mng_mode_pchlan(struct e1000_hw *hw)  in e1000_check_mng_mode_pchlan()  argument
1807 static int e1000_rar_set_pch2lan(struct e1000_hw *hw, u8 *addr, u32 index)  in e1000_rar_set_pch2lan()  argument
1835 	if (index < (u32)(hw->mac.rar_entry_count)) {  in e1000_rar_set_pch2lan()
1838 		ret_val = e1000_acquire_swflag_ich8lan(hw);  in e1000_rar_set_pch2lan()
1847 		e1000_release_swflag_ich8lan(hw);  in e1000_rar_set_pch2lan()
1873 static u32 e1000_rar_get_count_pch_lpt(struct e1000_hw *hw)  in e1000_rar_get_count_pch_lpt()  argument
1884 		num_entries = hw->mac.rar_entry_count;  in e1000_rar_get_count_pch_lpt()
1910 static int e1000_rar_set_pch_lpt(struct e1000_hw *hw, u8 *addr, u32 index)  in e1000_rar_set_pch_lpt()  argument
1938 	if (index < hw->mac.rar_entry_count) {  in e1000_rar_set_pch_lpt()
1949 			ret_val = e1000_acquire_swflag_ich8lan(hw);  in e1000_rar_set_pch_lpt()
1959 			e1000_release_swflag_ich8lan(hw);  in e1000_rar_set_pch_lpt()
1981 static s32 e1000_check_reset_block_ich8lan(struct e1000_hw *hw)  in e1000_check_reset_block_ich8lan()  argument
1999 static s32 e1000_write_smbus_addr(struct e1000_hw *hw)  in e1000_write_smbus_addr()  argument
2009 	ret_val = e1000_read_phy_reg_hv_locked(hw, HV_SMB_ADDR, &phy_data);  in e1000_write_smbus_addr()
2017 	if (hw->phy.type == e1000_phy_i217) {  in e1000_write_smbus_addr()
2030 	return e1000_write_phy_reg_hv_locked(hw, HV_SMB_ADDR, phy_data);  in e1000_write_smbus_addr()
2040 static s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw)  in e1000_sw_lcd_config_ich8lan()  argument
2042 	struct e1000_phy_info *phy = &hw->phy;  in e1000_sw_lcd_config_ich8lan()
2053 	switch (hw->mac.type) {  in e1000_sw_lcd_config_ich8lan()
2058 		if ((hw->adapter->pdev->device == E1000_DEV_ID_ICH8_IGP_AMT) ||  in e1000_sw_lcd_config_ich8lan()
2059 		    (hw->adapter->pdev->device == E1000_DEV_ID_ICH8_IGP_C)) {  in e1000_sw_lcd_config_ich8lan()
2074 	ret_val = hw->phy.ops.acquire(hw);  in e1000_sw_lcd_config_ich8lan()
2086 	if ((hw->mac.type < e1000_pch2lan) &&  in e1000_sw_lcd_config_ich8lan()
2099 	if (((hw->mac.type == e1000_pchlan) &&  in e1000_sw_lcd_config_ich8lan()
2101 	    (hw->mac.type > e1000_pchlan)) {  in e1000_sw_lcd_config_ich8lan()
2107 		ret_val = e1000_write_smbus_addr(hw);  in e1000_sw_lcd_config_ich8lan()
2112 		ret_val = e1000_write_phy_reg_hv_locked(hw, HV_LED_CONFIG,  in e1000_sw_lcd_config_ich8lan()
2124 		ret_val = e1000_read_nvm(hw, (word_addr + i * 2), 1, &reg_data);  in e1000_sw_lcd_config_ich8lan()
2128 		ret_val = e1000_read_nvm(hw, (word_addr + i * 2 + 1),  in e1000_sw_lcd_config_ich8lan()
2142 		ret_val = e1e_wphy_locked(hw, (u32)reg_addr, reg_data);  in e1000_sw_lcd_config_ich8lan()
2148 	hw->phy.ops.release(hw);  in e1000_sw_lcd_config_ich8lan()
2162 static s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link)  in e1000_k1_gig_workaround_hv()  argument
2166 	bool k1_enable = hw->dev_spec.ich8lan.nvm_k1_enabled;  in e1000_k1_gig_workaround_hv()
2168 	if (hw->mac.type != e1000_pchlan)  in e1000_k1_gig_workaround_hv()
2172 	ret_val = hw->phy.ops.acquire(hw);  in e1000_k1_gig_workaround_hv()
2178 		if (hw->phy.type == e1000_phy_82578) {  in e1000_k1_gig_workaround_hv()
2179 			ret_val = e1e_rphy_locked(hw, BM_CS_STATUS,  in e1000_k1_gig_workaround_hv()
2194 		if (hw->phy.type == e1000_phy_82577) {  in e1000_k1_gig_workaround_hv()
2195 			ret_val = e1e_rphy_locked(hw, HV_M_STATUS, &status_reg);  in e1000_k1_gig_workaround_hv()
2210 		ret_val = e1e_wphy_locked(hw, PHY_REG(770, 19), 0x0100);  in e1000_k1_gig_workaround_hv()
2216 		ret_val = e1e_wphy_locked(hw, PHY_REG(770, 19), 0x4100);  in e1000_k1_gig_workaround_hv()
2221 	ret_val = e1000_configure_k1_ich8lan(hw, k1_enable);  in e1000_k1_gig_workaround_hv()
2224 	hw->phy.ops.release(hw);  in e1000_k1_gig_workaround_hv()
2239 s32 e1000_configure_k1_ich8lan(struct e1000_hw *hw, bool k1_enable)  in e1000_configure_k1_ich8lan()  argument
2247 	ret_val = e1000e_read_kmrn_reg_locked(hw, E1000_KMRNCTRLSTA_K1_CONFIG,  in e1000_configure_k1_ich8lan()
2257 	ret_val = e1000e_write_kmrn_reg_locked(hw, E1000_KMRNCTRLSTA_K1_CONFIG,  in e1000_configure_k1_ich8lan()
2290 static s32 e1000_oem_bits_config_ich8lan(struct e1000_hw *hw, bool d0_state)  in e1000_oem_bits_config_ich8lan()  argument
2296 	if (hw->mac.type < e1000_pchlan)  in e1000_oem_bits_config_ich8lan()
2299 	ret_val = hw->phy.ops.acquire(hw);  in e1000_oem_bits_config_ich8lan()
2303 	if (hw->mac.type == e1000_pchlan) {  in e1000_oem_bits_config_ich8lan()
2315 	ret_val = e1e_rphy_locked(hw, HV_OEM_BITS, &oem_reg);  in e1000_oem_bits_config_ich8lan()
2338 	if ((d0_state || (hw->mac.type != e1000_pchlan)) &&  in e1000_oem_bits_config_ich8lan()
2339 	    !hw->phy.ops.check_reset_block(hw))  in e1000_oem_bits_config_ich8lan()
2342 	ret_val = e1e_wphy_locked(hw, HV_OEM_BITS, oem_reg);  in e1000_oem_bits_config_ich8lan()
2345 	hw->phy.ops.release(hw);  in e1000_oem_bits_config_ich8lan()
2354 static s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw)  in e1000_set_mdio_slow_mode_hv()  argument
2359 	ret_val = e1e_rphy(hw, HV_KMRN_MODE_CTRL, &data);  in e1000_set_mdio_slow_mode_hv()
2365 	ret_val = e1e_wphy(hw, HV_KMRN_MODE_CTRL, data);  in e1000_set_mdio_slow_mode_hv()
2374 static s32 e1000_hv_phy_workarounds_ich8lan(struct e1000_hw *hw)  in e1000_hv_phy_workarounds_ich8lan()  argument
2379 	if (hw->mac.type != e1000_pchlan)  in e1000_hv_phy_workarounds_ich8lan()
2383 	if (hw->phy.type == e1000_phy_82577) {  in e1000_hv_phy_workarounds_ich8lan()
2384 		ret_val = e1000_set_mdio_slow_mode_hv(hw);  in e1000_hv_phy_workarounds_ich8lan()
2389 	if (((hw->phy.type == e1000_phy_82577) &&  in e1000_hv_phy_workarounds_ich8lan()
2390 	     ((hw->phy.revision == 1) || (hw->phy.revision == 2))) ||  in e1000_hv_phy_workarounds_ich8lan()
2391 	    ((hw->phy.type == e1000_phy_82578) && (hw->phy.revision == 1))) {  in e1000_hv_phy_workarounds_ich8lan()
2393 		ret_val = e1e_wphy(hw, PHY_REG(769, 25), 0x4431);  in e1000_hv_phy_workarounds_ich8lan()
2398 		ret_val = e1e_wphy(hw, HV_KMRN_FIFO_CTRLSTA, 0xA204);  in e1000_hv_phy_workarounds_ich8lan()
2403 	if (hw->phy.type == e1000_phy_82578) {  in e1000_hv_phy_workarounds_ich8lan()
2407 		if (hw->phy.revision < 2) {  in e1000_hv_phy_workarounds_ich8lan()
2408 			e1000e_phy_sw_reset(hw);  in e1000_hv_phy_workarounds_ich8lan()
2409 			ret_val = e1e_wphy(hw, MII_BMCR, 0x3140);  in e1000_hv_phy_workarounds_ich8lan()
2414 	ret_val = hw->phy.ops.acquire(hw);  in e1000_hv_phy_workarounds_ich8lan()
2418 	hw->phy.addr = 1;  in e1000_hv_phy_workarounds_ich8lan()
2419 	ret_val = e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, 0);  in e1000_hv_phy_workarounds_ich8lan()
2420 	hw->phy.ops.release(hw);  in e1000_hv_phy_workarounds_ich8lan()
2427 	ret_val = e1000_k1_gig_workaround_hv(hw, true);  in e1000_hv_phy_workarounds_ich8lan()
2432 	ret_val = hw->phy.ops.acquire(hw);  in e1000_hv_phy_workarounds_ich8lan()
2435 	ret_val = e1e_rphy_locked(hw, BM_PORT_GEN_CFG, &phy_data);  in e1000_hv_phy_workarounds_ich8lan()
2438 	ret_val = e1e_wphy_locked(hw, BM_PORT_GEN_CFG, phy_data & 0x00FF);  in e1000_hv_phy_workarounds_ich8lan()
2443 	ret_val = e1000_write_emi_reg_locked(hw, I82577_MSE_THRESHOLD, 0x0034);  in e1000_hv_phy_workarounds_ich8lan()
2445 	hw->phy.ops.release(hw);  in e1000_hv_phy_workarounds_ich8lan()
2454 void e1000_copy_rx_addrs_to_phy_ich8lan(struct e1000_hw *hw)  in e1000_copy_rx_addrs_to_phy_ich8lan()  argument
2460 	ret_val = hw->phy.ops.acquire(hw);  in e1000_copy_rx_addrs_to_phy_ich8lan()
2463 	ret_val = e1000_enable_phy_wakeup_reg_access_bm(hw, &phy_reg);  in e1000_copy_rx_addrs_to_phy_ich8lan()
2468 	for (i = 0; i < (hw->mac.rar_entry_count); i++) {  in e1000_copy_rx_addrs_to_phy_ich8lan()
2470 		hw->phy.ops.write_reg_page(hw, BM_RAR_L(i),  in e1000_copy_rx_addrs_to_phy_ich8lan()
2472 		hw->phy.ops.write_reg_page(hw, BM_RAR_M(i),  in e1000_copy_rx_addrs_to_phy_ich8lan()
2476 		hw->phy.ops.write_reg_page(hw, BM_RAR_H(i),  in e1000_copy_rx_addrs_to_phy_ich8lan()
2478 		hw->phy.ops.write_reg_page(hw, BM_RAR_CTRL(i),  in e1000_copy_rx_addrs_to_phy_ich8lan()
2483 	e1000_disable_phy_wakeup_reg_access_bm(hw, &phy_reg);  in e1000_copy_rx_addrs_to_phy_ich8lan()
2486 	hw->phy.ops.release(hw);  in e1000_copy_rx_addrs_to_phy_ich8lan()
2495 s32 e1000_lv_jumbo_workaround_ich8lan(struct e1000_hw *hw, bool enable)  in e1000_lv_jumbo_workaround_ich8lan()  argument
2502 	if (hw->mac.type < e1000_pch2lan)  in e1000_lv_jumbo_workaround_ich8lan()
2506 	e1e_rphy(hw, PHY_REG(769, 20), &phy_reg);  in e1000_lv_jumbo_workaround_ich8lan()
2507 	ret_val = e1e_wphy(hw, PHY_REG(769, 20), phy_reg | (1 << 14));  in e1000_lv_jumbo_workaround_ich8lan()
2515 		for (i = 0; i < hw->mac.rar_entry_count; i++) {  in e1000_lv_jumbo_workaround_ich8lan()
2534 		e1000_copy_rx_addrs_to_phy_ich8lan(hw);  in e1000_lv_jumbo_workaround_ich8lan()
2546 		ret_val = e1000e_read_kmrn_reg(hw,  in e1000_lv_jumbo_workaround_ich8lan()
2551 		ret_val = e1000e_write_kmrn_reg(hw,  in e1000_lv_jumbo_workaround_ich8lan()
2556 		ret_val = e1000e_read_kmrn_reg(hw,  in e1000_lv_jumbo_workaround_ich8lan()
2563 		ret_val = e1000e_write_kmrn_reg(hw,  in e1000_lv_jumbo_workaround_ich8lan()
2570 		e1e_rphy(hw, PHY_REG(769, 23), &data);  in e1000_lv_jumbo_workaround_ich8lan()
2573 		ret_val = e1e_wphy(hw, PHY_REG(769, 23), data);  in e1000_lv_jumbo_workaround_ich8lan()
2576 		e1e_rphy(hw, PHY_REG(769, 16), &data);  in e1000_lv_jumbo_workaround_ich8lan()
2578 		ret_val = e1e_wphy(hw, PHY_REG(769, 16), data);  in e1000_lv_jumbo_workaround_ich8lan()
2581 		e1e_rphy(hw, PHY_REG(776, 20), &data);  in e1000_lv_jumbo_workaround_ich8lan()
2584 		ret_val = e1e_wphy(hw, PHY_REG(776, 20), data);  in e1000_lv_jumbo_workaround_ich8lan()
2587 		ret_val = e1e_wphy(hw, PHY_REG(776, 23), 0xF100);  in e1000_lv_jumbo_workaround_ich8lan()
2590 		e1e_rphy(hw, HV_PM_CTRL, &data);  in e1000_lv_jumbo_workaround_ich8lan()
2591 		ret_val = e1e_wphy(hw, HV_PM_CTRL, data | (1 << 10));  in e1000_lv_jumbo_workaround_ich8lan()
2604 		ret_val = e1000e_read_kmrn_reg(hw,  in e1000_lv_jumbo_workaround_ich8lan()
2609 		ret_val = e1000e_write_kmrn_reg(hw,  in e1000_lv_jumbo_workaround_ich8lan()
2614 		ret_val = e1000e_read_kmrn_reg(hw,  in e1000_lv_jumbo_workaround_ich8lan()
2621 		ret_val = e1000e_write_kmrn_reg(hw,  in e1000_lv_jumbo_workaround_ich8lan()
2628 		e1e_rphy(hw, PHY_REG(769, 23), &data);  in e1000_lv_jumbo_workaround_ich8lan()
2630 		ret_val = e1e_wphy(hw, PHY_REG(769, 23), data);  in e1000_lv_jumbo_workaround_ich8lan()
2633 		e1e_rphy(hw, PHY_REG(769, 16), &data);  in e1000_lv_jumbo_workaround_ich8lan()
2635 		ret_val = e1e_wphy(hw, PHY_REG(769, 16), data);  in e1000_lv_jumbo_workaround_ich8lan()
2638 		e1e_rphy(hw, PHY_REG(776, 20), &data);  in e1000_lv_jumbo_workaround_ich8lan()
2641 		ret_val = e1e_wphy(hw, PHY_REG(776, 20), data);  in e1000_lv_jumbo_workaround_ich8lan()
2644 		ret_val = e1e_wphy(hw, PHY_REG(776, 23), 0x7E00);  in e1000_lv_jumbo_workaround_ich8lan()
2647 		e1e_rphy(hw, HV_PM_CTRL, &data);  in e1000_lv_jumbo_workaround_ich8lan()
2648 		ret_val = e1e_wphy(hw, HV_PM_CTRL, data & ~(1 << 10));  in e1000_lv_jumbo_workaround_ich8lan()
2654 	return e1e_wphy(hw, PHY_REG(769, 20), phy_reg & ~(1 << 14));  in e1000_lv_jumbo_workaround_ich8lan()
2661 static s32 e1000_lv_phy_workarounds_ich8lan(struct e1000_hw *hw)  in e1000_lv_phy_workarounds_ich8lan()  argument
2665 	if (hw->mac.type != e1000_pch2lan)  in e1000_lv_phy_workarounds_ich8lan()
2669 	ret_val = e1000_set_mdio_slow_mode_hv(hw);  in e1000_lv_phy_workarounds_ich8lan()
2673 	ret_val = hw->phy.ops.acquire(hw);  in e1000_lv_phy_workarounds_ich8lan()
2677 	ret_val = e1000_write_emi_reg_locked(hw, I82579_MSE_THRESHOLD, 0x0034);  in e1000_lv_phy_workarounds_ich8lan()
2681 	ret_val = e1000_write_emi_reg_locked(hw, I82579_MSE_LINK_DOWN, 0x0005);  in e1000_lv_phy_workarounds_ich8lan()
2683 	hw->phy.ops.release(hw);  in e1000_lv_phy_workarounds_ich8lan()
2695 static s32 e1000_k1_workaround_lv(struct e1000_hw *hw)  in e1000_k1_workaround_lv()  argument
2700 	if (hw->mac.type != e1000_pch2lan)  in e1000_k1_workaround_lv()
2704 	ret_val = e1e_rphy(hw, HV_M_STATUS, &status_reg);  in e1000_k1_workaround_lv()
2715 			ret_val = e1e_rphy(hw, HV_PM_CTRL, &pm_phy_reg);  in e1000_k1_workaround_lv()
2719 			ret_val = e1e_wphy(hw, HV_PM_CTRL, pm_phy_reg);  in e1000_k1_workaround_lv()
2743 static void e1000_gate_hw_phy_config_ich8lan(struct e1000_hw *hw, bool gate)  in e1000_gate_hw_phy_config_ich8lan()  argument
2747 	if (hw->mac.type < e1000_pch2lan)  in e1000_gate_hw_phy_config_ich8lan()
2767 static void e1000_lan_init_done_ich8lan(struct e1000_hw *hw)  in e1000_lan_init_done_ich8lan()  argument
2795 static s32 e1000_post_phy_reset_ich8lan(struct e1000_hw *hw)  in e1000_post_phy_reset_ich8lan()  argument
2800 	if (hw->phy.ops.check_reset_block(hw))  in e1000_post_phy_reset_ich8lan()
2807 	switch (hw->mac.type) {  in e1000_post_phy_reset_ich8lan()
2809 		ret_val = e1000_hv_phy_workarounds_ich8lan(hw);  in e1000_post_phy_reset_ich8lan()
2814 		ret_val = e1000_lv_phy_workarounds_ich8lan(hw);  in e1000_post_phy_reset_ich8lan()
2823 	if (hw->mac.type >= e1000_pchlan) {  in e1000_post_phy_reset_ich8lan()
2824 		e1e_rphy(hw, BM_PORT_GEN_CFG, &reg);  in e1000_post_phy_reset_ich8lan()
2826 		e1e_wphy(hw, BM_PORT_GEN_CFG, reg);  in e1000_post_phy_reset_ich8lan()
2830 	ret_val = e1000_sw_lcd_config_ich8lan(hw);  in e1000_post_phy_reset_ich8lan()
2835 	ret_val = e1000_oem_bits_config_ich8lan(hw, true);  in e1000_post_phy_reset_ich8lan()
2837 	if (hw->mac.type == e1000_pch2lan) {  in e1000_post_phy_reset_ich8lan()
2841 			e1000_gate_hw_phy_config_ich8lan(hw, false);  in e1000_post_phy_reset_ich8lan()
2845 		ret_val = hw->phy.ops.acquire(hw);  in e1000_post_phy_reset_ich8lan()
2848 		ret_val = e1000_write_emi_reg_locked(hw,  in e1000_post_phy_reset_ich8lan()
2851 		hw->phy.ops.release(hw);  in e1000_post_phy_reset_ich8lan()
2865 static s32 e1000_phy_hw_reset_ich8lan(struct e1000_hw *hw)  in e1000_phy_hw_reset_ich8lan()  argument
2870 	if ((hw->mac.type == e1000_pch2lan) &&  in e1000_phy_hw_reset_ich8lan()
2872 		e1000_gate_hw_phy_config_ich8lan(hw, true);  in e1000_phy_hw_reset_ich8lan()
2874 	ret_val = e1000e_phy_hw_reset_generic(hw);  in e1000_phy_hw_reset_ich8lan()
2878 	return e1000_post_phy_reset_ich8lan(hw);  in e1000_phy_hw_reset_ich8lan()
2892 static s32 e1000_set_lplu_state_pchlan(struct e1000_hw *hw, bool active)  in e1000_set_lplu_state_pchlan()  argument
2897 	ret_val = e1e_rphy(hw, HV_OEM_BITS, &oem_reg);  in e1000_set_lplu_state_pchlan()
2906 	if (!hw->phy.ops.check_reset_block(hw))  in e1000_set_lplu_state_pchlan()
2909 	return e1e_wphy(hw, HV_OEM_BITS, oem_reg);  in e1000_set_lplu_state_pchlan()
2925 static s32 e1000_set_d0_lplu_state_ich8lan(struct e1000_hw *hw, bool active)  in e1000_set_d0_lplu_state_ich8lan()  argument
2927 	struct e1000_phy_info *phy = &hw->phy;  in e1000_set_d0_lplu_state_ich8lan()
2947 		if (hw->mac.type == e1000_ich8lan)  in e1000_set_d0_lplu_state_ich8lan()
2948 			e1000e_gig_downshift_workaround_ich8lan(hw);  in e1000_set_d0_lplu_state_ich8lan()
2951 		ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG, &data);  in e1000_set_d0_lplu_state_ich8lan()
2955 		ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG, data);  in e1000_set_d0_lplu_state_ich8lan()
2971 			ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG,  in e1000_set_d0_lplu_state_ich8lan()
2977 			ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG,  in e1000_set_d0_lplu_state_ich8lan()
2982 			ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG,  in e1000_set_d0_lplu_state_ich8lan()
2988 			ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG,  in e1000_set_d0_lplu_state_ich8lan()
3011 static s32 e1000_set_d3_lplu_state_ich8lan(struct e1000_hw *hw, bool active)  in e1000_set_d3_lplu_state_ich8lan()  argument
3013 	struct e1000_phy_info *phy = &hw->phy;  in e1000_set_d3_lplu_state_ich8lan()
3033 			ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG,  in e1000_set_d3_lplu_state_ich8lan()
3039 			ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG,  in e1000_set_d3_lplu_state_ich8lan()
3044 			ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG,  in e1000_set_d3_lplu_state_ich8lan()
3050 			ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG,  in e1000_set_d3_lplu_state_ich8lan()
3067 		if (hw->mac.type == e1000_ich8lan)  in e1000_set_d3_lplu_state_ich8lan()
3068 			e1000e_gig_downshift_workaround_ich8lan(hw);  in e1000_set_d3_lplu_state_ich8lan()
3071 		ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG, &data);  in e1000_set_d3_lplu_state_ich8lan()
3076 		ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG, data);  in e1000_set_d3_lplu_state_ich8lan()
3090 static s32 e1000_valid_nvm_bank_detect_ich8lan(struct e1000_hw *hw, u32 *bank)  in e1000_valid_nvm_bank_detect_ich8lan()  argument
3093 	struct e1000_nvm_info *nvm = &hw->nvm;  in e1000_valid_nvm_bank_detect_ich8lan()
3099 	switch (hw->mac.type) {  in e1000_valid_nvm_bank_detect_ich8lan()
3133 		ret_val = e1000_read_flash_byte_ich8lan(hw, act_offset,  in e1000_valid_nvm_bank_detect_ich8lan()
3144 		ret_val = e1000_read_flash_byte_ich8lan(hw, act_offset +  in e1000_valid_nvm_bank_detect_ich8lan()
3169 static s32 e1000_read_nvm_spt(struct e1000_hw *hw, u16 offset, u16 words,  in e1000_read_nvm_spt()  argument
3172 	struct e1000_nvm_info *nvm = &hw->nvm;  in e1000_read_nvm_spt()
3173 	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;  in e1000_read_nvm_spt()
3188 	nvm->ops.acquire(hw);  in e1000_read_nvm_spt()
3190 	ret_val = e1000_valid_nvm_bank_detect_ich8lan(hw, &bank);  in e1000_read_nvm_spt()
3210 				  e1000_read_flash_dword_ich8lan(hw,  in e1000_read_nvm_spt()
3225 				  e1000_read_flash_dword_ich8lan(hw,  in e1000_read_nvm_spt()
3244 	nvm->ops.release(hw);  in e1000_read_nvm_spt()
3262 static s32 e1000_read_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words,  in e1000_read_nvm_ich8lan()  argument
3265 	struct e1000_nvm_info *nvm = &hw->nvm;  in e1000_read_nvm_ich8lan()
3266 	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;  in e1000_read_nvm_ich8lan()
3279 	nvm->ops.acquire(hw);  in e1000_read_nvm_ich8lan()
3281 	ret_val = e1000_valid_nvm_bank_detect_ich8lan(hw, &bank);  in e1000_read_nvm_ich8lan()
3295 			ret_val = e1000_read_flash_word_ich8lan(hw,  in e1000_read_nvm_ich8lan()
3304 	nvm->ops.release(hw);  in e1000_read_nvm_ich8lan()
3320 static s32 e1000_flash_cycle_init_ich8lan(struct e1000_hw *hw)  in e1000_flash_cycle_init_ich8lan()  argument
3336 	if (hw->mac.type == e1000_pch_spt)  in e1000_flash_cycle_init_ich8lan()
3355 		if (hw->mac.type == e1000_pch_spt)  in e1000_flash_cycle_init_ich8lan()
3379 			if (hw->mac.type == e1000_pch_spt)  in e1000_flash_cycle_init_ich8lan()
3399 static s32 e1000_flash_cycle_ich8lan(struct e1000_hw *hw, u32 timeout)  in e1000_flash_cycle_ich8lan()  argument
3406 	if (hw->mac.type == e1000_pch_spt)  in e1000_flash_cycle_ich8lan()
3412 	if (hw->mac.type == e1000_pch_spt)  in e1000_flash_cycle_ich8lan()
3440 static s32 e1000_read_flash_dword_ich8lan(struct e1000_hw *hw, u32 offset,  in e1000_read_flash_dword_ich8lan()  argument
3445 	return e1000_read_flash_data32_ich8lan(hw, offset, data);  in e1000_read_flash_dword_ich8lan()
3457 static s32 e1000_read_flash_word_ich8lan(struct e1000_hw *hw, u32 offset,  in e1000_read_flash_word_ich8lan()  argument
3463 	return e1000_read_flash_data_ich8lan(hw, offset, 2, data);  in e1000_read_flash_word_ich8lan()
3474 static s32 e1000_read_flash_byte_ich8lan(struct e1000_hw *hw, u32 offset,  in e1000_read_flash_byte_ich8lan()  argument
3483 	if (hw->mac.type == e1000_pch_spt)  in e1000_read_flash_byte_ich8lan()
3486 		ret_val = e1000_read_flash_data_ich8lan(hw, offset, 1, &word);  in e1000_read_flash_byte_ich8lan()
3505 static s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,  in e1000_read_flash_data_ich8lan()  argument
3519 			     hw->nvm.flash_base_addr);  in e1000_read_flash_data_ich8lan()
3524 		ret_val = e1000_flash_cycle_init_ich8lan(hw);  in e1000_read_flash_data_ich8lan()
3537 		    e1000_flash_cycle_ich8lan(hw,  in e1000_read_flash_data_ich8lan()
3581 static s32 e1000_read_flash_data32_ich8lan(struct e1000_hw *hw, u32 offset,  in e1000_read_flash_data32_ich8lan()  argument
3591 	    hw->mac.type != e1000_pch_spt)  in e1000_read_flash_data32_ich8lan()
3594 			     hw->nvm.flash_base_addr);  in e1000_read_flash_data32_ich8lan()
3599 		ret_val = e1000_flash_cycle_init_ich8lan(hw);  in e1000_read_flash_data32_ich8lan()
3617 		   e1000_flash_cycle_ich8lan(hw,  in e1000_read_flash_data32_ich8lan()
3657 static s32 e1000_write_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words,  in e1000_write_nvm_ich8lan()  argument
3660 	struct e1000_nvm_info *nvm = &hw->nvm;  in e1000_write_nvm_ich8lan()
3661 	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;  in e1000_write_nvm_ich8lan()
3670 	nvm->ops.acquire(hw);  in e1000_write_nvm_ich8lan()
3677 	nvm->ops.release(hw);  in e1000_write_nvm_ich8lan()
3693 static s32 e1000_update_nvm_checksum_spt(struct e1000_hw *hw)  in e1000_update_nvm_checksum_spt()  argument
3695 	struct e1000_nvm_info *nvm = &hw->nvm;  in e1000_update_nvm_checksum_spt()
3696 	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;  in e1000_update_nvm_checksum_spt()
3701 	ret_val = e1000e_update_nvm_checksum_generic(hw);  in e1000_update_nvm_checksum_spt()
3708 	nvm->ops.acquire(hw);  in e1000_update_nvm_checksum_spt()
3714 	ret_val = e1000_valid_nvm_bank_detect_ich8lan(hw, &bank);  in e1000_update_nvm_checksum_spt()
3723 		ret_val = e1000_erase_flash_bank_ich8lan(hw, 1);  in e1000_update_nvm_checksum_spt()
3729 		ret_val = e1000_erase_flash_bank_ich8lan(hw, 0);  in e1000_update_nvm_checksum_spt()
3738 		ret_val = e1000_read_flash_dword_ich8lan(hw,  in e1000_update_nvm_checksum_spt()
3771 		ret_val = e1000_retry_write_flash_dword_ich8lan(hw, act_offset,  in e1000_update_nvm_checksum_spt()
3795 	ret_val = e1000_read_flash_dword_ich8lan(hw, act_offset, &dword);  in e1000_update_nvm_checksum_spt()
3801 	ret_val = e1000_retry_write_flash_dword_ich8lan(hw, act_offset, dword);  in e1000_update_nvm_checksum_spt()
3815 	ret_val = e1000_read_flash_dword_ich8lan(hw, act_offset, &dword);  in e1000_update_nvm_checksum_spt()
3821 	ret_val = e1000_retry_write_flash_dword_ich8lan(hw, act_offset, dword);  in e1000_update_nvm_checksum_spt()
3833 	nvm->ops.release(hw);  in e1000_update_nvm_checksum_spt()
3839 		nvm->ops.reload(hw);  in e1000_update_nvm_checksum_spt()
3861 static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw)  in e1000_update_nvm_checksum_ich8lan()  argument
3863 	struct e1000_nvm_info *nvm = &hw->nvm;  in e1000_update_nvm_checksum_ich8lan()
3864 	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;  in e1000_update_nvm_checksum_ich8lan()
3869 	ret_val = e1000e_update_nvm_checksum_generic(hw);  in e1000_update_nvm_checksum_ich8lan()
3876 	nvm->ops.acquire(hw);  in e1000_update_nvm_checksum_ich8lan()
3882 	ret_val = e1000_valid_nvm_bank_detect_ich8lan(hw, &bank);  in e1000_update_nvm_checksum_ich8lan()
3891 		ret_val = e1000_erase_flash_bank_ich8lan(hw, 1);  in e1000_update_nvm_checksum_ich8lan()
3897 		ret_val = e1000_erase_flash_bank_ich8lan(hw, 0);  in e1000_update_nvm_checksum_ich8lan()
3905 			ret_val = e1000_read_flash_word_ich8lan(hw, i +  in e1000_update_nvm_checksum_ich8lan()
3927 		ret_val = e1000_retry_write_flash_byte_ich8lan(hw,  in e1000_update_nvm_checksum_ich8lan()
3934 		ret_val = e1000_retry_write_flash_byte_ich8lan(hw,  in e1000_update_nvm_checksum_ich8lan()
3956 	ret_val = e1000_read_flash_word_ich8lan(hw, act_offset, &data);  in e1000_update_nvm_checksum_ich8lan()
3961 	ret_val = e1000_retry_write_flash_byte_ich8lan(hw,  in e1000_update_nvm_checksum_ich8lan()
3973 	ret_val = e1000_retry_write_flash_byte_ich8lan(hw, act_offset, 0);  in e1000_update_nvm_checksum_ich8lan()
3984 	nvm->ops.release(hw);  in e1000_update_nvm_checksum_ich8lan()
3990 		nvm->ops.reload(hw);  in e1000_update_nvm_checksum_ich8lan()
4009 static s32 e1000_validate_nvm_checksum_ich8lan(struct e1000_hw *hw)  in e1000_validate_nvm_checksum_ich8lan()  argument
4021 	switch (hw->mac.type) {  in e1000_validate_nvm_checksum_ich8lan()
4033 	ret_val = e1000_read_nvm(hw, word, 1, &data);  in e1000_validate_nvm_checksum_ich8lan()
4039 		ret_val = e1000_write_nvm(hw, word, 1, &data);  in e1000_validate_nvm_checksum_ich8lan()
4042 		ret_val = e1000e_update_nvm_checksum(hw);  in e1000_validate_nvm_checksum_ich8lan()
4047 	return e1000e_validate_nvm_checksum_generic(hw);  in e1000_validate_nvm_checksum_ich8lan()
4060 void e1000e_write_protect_nvm_ich8lan(struct e1000_hw *hw)  in e1000e_write_protect_nvm_ich8lan()  argument
4062 	struct e1000_nvm_info *nvm = &hw->nvm;  in e1000e_write_protect_nvm_ich8lan()
4067 	nvm->ops.acquire(hw);  in e1000e_write_protect_nvm_ich8lan()
4087 	nvm->ops.release(hw);  in e1000e_write_protect_nvm_ich8lan()
4099 static s32 e1000_write_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,  in e1000_write_flash_data_ich8lan()  argument
4109 	if (hw->mac.type == e1000_pch_spt) {  in e1000_write_flash_data_ich8lan()
4118 			     hw->nvm.flash_base_addr);  in e1000_write_flash_data_ich8lan()
4123 		ret_val = e1000_flash_cycle_init_ich8lan(hw);  in e1000_write_flash_data_ich8lan()
4129 		if (hw->mac.type == e1000_pch_spt)  in e1000_write_flash_data_ich8lan()
4141 		if (hw->mac.type == e1000_pch_spt)  in e1000_write_flash_data_ich8lan()
4159 		    e1000_flash_cycle_ich8lan(hw,  in e1000_write_flash_data_ich8lan()
4190 static s32 e1000_write_flash_data32_ich8lan(struct e1000_hw *hw, u32 offset,  in e1000_write_flash_data32_ich8lan()  argument
4199 	if (hw->mac.type == e1000_pch_spt) {  in e1000_write_flash_data32_ich8lan()
4204 			     hw->nvm.flash_base_addr);  in e1000_write_flash_data32_ich8lan()
4208 		ret_val = e1000_flash_cycle_init_ich8lan(hw);  in e1000_write_flash_data32_ich8lan()
4215 		if (hw->mac.type == e1000_pch_spt)  in e1000_write_flash_data32_ich8lan()
4228 		if (hw->mac.type == e1000_pch_spt)  in e1000_write_flash_data32_ich8lan()
4241 		   e1000_flash_cycle_ich8lan(hw,  in e1000_write_flash_data32_ich8lan()
4274 static s32 e1000_write_flash_byte_ich8lan(struct e1000_hw *hw, u32 offset,  in e1000_write_flash_byte_ich8lan()  argument
4279 	return e1000_write_flash_data_ich8lan(hw, offset, 1, word);  in e1000_write_flash_byte_ich8lan()
4291 static s32 e1000_retry_write_flash_dword_ich8lan(struct e1000_hw *hw,  in e1000_retry_write_flash_dword_ich8lan()  argument
4299 	ret_val = e1000_write_flash_data32_ich8lan(hw, offset, dword);  in e1000_retry_write_flash_dword_ich8lan()
4306 		ret_val = e1000_write_flash_data32_ich8lan(hw, offset, dword);  in e1000_retry_write_flash_dword_ich8lan()
4325 static s32 e1000_retry_write_flash_byte_ich8lan(struct e1000_hw *hw,  in e1000_retry_write_flash_byte_ich8lan()  argument
4331 	ret_val = e1000_write_flash_byte_ich8lan(hw, offset, byte);  in e1000_retry_write_flash_byte_ich8lan()
4338 		ret_val = e1000_write_flash_byte_ich8lan(hw, offset, byte);  in e1000_retry_write_flash_byte_ich8lan()
4356 static s32 e1000_erase_flash_bank_ich8lan(struct e1000_hw *hw, u32 bank)  in e1000_erase_flash_bank_ich8lan()  argument
4358 	struct e1000_nvm_info *nvm = &hw->nvm;  in e1000_erase_flash_bank_ich8lan()
4405 	flash_linear_addr = hw->nvm.flash_base_addr;  in e1000_erase_flash_bank_ich8lan()
4413 			ret_val = e1000_flash_cycle_init_ich8lan(hw);  in e1000_erase_flash_bank_ich8lan()
4420 			if (hw->mac.type == e1000_pch_spt)  in e1000_erase_flash_bank_ich8lan()
4427 			if (hw->mac.type == e1000_pch_spt)  in e1000_erase_flash_bank_ich8lan()
4440 			ret_val = e1000_flash_cycle_ich8lan(hw, timeout);  in e1000_erase_flash_bank_ich8lan()
4469 static s32 e1000_valid_led_default_ich8lan(struct e1000_hw *hw, u16 *data)  in e1000_valid_led_default_ich8lan()  argument
4473 	ret_val = e1000_read_nvm(hw, NVM_ID_LED_SETTINGS, 1, data);  in e1000_valid_led_default_ich8lan()
4498 static s32 e1000_id_led_init_pchlan(struct e1000_hw *hw)  in e1000_id_led_init_pchlan()  argument
4500 	struct e1000_mac_info *mac = &hw->mac;  in e1000_id_led_init_pchlan()
4507 	ret_val = hw->nvm.ops.valid_led_default(hw, &data);  in e1000_id_led_init_pchlan()
4564 static s32 e1000_get_bus_info_ich8lan(struct e1000_hw *hw)  in e1000_get_bus_info_ich8lan()  argument
4566 	struct e1000_bus_info *bus = &hw->bus;  in e1000_get_bus_info_ich8lan()
4569 	ret_val = e1000e_get_bus_info_pcie(hw);  in e1000_get_bus_info_ich8lan()
4589 static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw)  in e1000_reset_hw_ich8lan()  argument
4591 	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;  in e1000_reset_hw_ich8lan()
4599 	ret_val = e1000e_disable_pcie_master(hw);  in e1000_reset_hw_ich8lan()
4617 	if (hw->mac.type == e1000_ich8lan) {  in e1000_reset_hw_ich8lan()
4624 	if (hw->mac.type == e1000_pchlan) {  in e1000_reset_hw_ich8lan()
4626 		ret_val = e1000_read_nvm(hw, E1000_NVM_K1_CONFIG, 1, &kum_cfg);  in e1000_reset_hw_ich8lan()
4638 	if (!hw->phy.ops.check_reset_block(hw)) {  in e1000_reset_hw_ich8lan()
4648 		if ((hw->mac.type == e1000_pch2lan) &&  in e1000_reset_hw_ich8lan()
4650 			e1000_gate_hw_phy_config_ich8lan(hw, true);  in e1000_reset_hw_ich8lan()
4652 	ret_val = e1000_acquire_swflag_ich8lan(hw);  in e1000_reset_hw_ich8lan()
4659 	if (hw->mac.type == e1000_pch2lan) {  in e1000_reset_hw_ich8lan()
4667 		clear_bit(__E1000_ACCESS_SHARED_RESOURCE, &hw->adapter->state);  in e1000_reset_hw_ich8lan()
4670 		ret_val = hw->phy.ops.get_cfg_done(hw);  in e1000_reset_hw_ich8lan()
4674 		ret_val = e1000_post_phy_reset_ich8lan(hw);  in e1000_reset_hw_ich8lan()
4683 	if (hw->mac.type == e1000_pchlan)  in e1000_reset_hw_ich8lan()
4708 static s32 e1000_init_hw_ich8lan(struct e1000_hw *hw)  in e1000_init_hw_ich8lan()  argument
4710 	struct e1000_mac_info *mac = &hw->mac;  in e1000_init_hw_ich8lan()
4715 	e1000_initialize_hw_bits_ich8lan(hw);  in e1000_init_hw_ich8lan()
4718 	ret_val = mac->ops.id_led_init(hw);  in e1000_init_hw_ich8lan()
4724 	e1000e_init_rx_addrs(hw, mac->rar_entry_count);  in e1000_init_hw_ich8lan()
4729 		E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);  in e1000_init_hw_ich8lan()
4735 	if (hw->phy.type == e1000_phy_82578) {  in e1000_init_hw_ich8lan()
4736 		e1e_rphy(hw, BM_PORT_GEN_CFG, &i);  in e1000_init_hw_ich8lan()
4738 		e1e_wphy(hw, BM_PORT_GEN_CFG, i);  in e1000_init_hw_ich8lan()
4739 		ret_val = e1000_phy_hw_reset_ich8lan(hw);  in e1000_init_hw_ich8lan()
4745 	ret_val = mac->ops.setup_link(hw);  in e1000_init_hw_ich8lan()
4768 	e1000e_set_pcie_no_snoop(hw, snoop);  in e1000_init_hw_ich8lan()
4779 	e1000_clear_hw_cntrs_ich8lan(hw);  in e1000_init_hw_ich8lan()
4791 static void e1000_initialize_hw_bits_ich8lan(struct e1000_hw *hw)  in e1000_initialize_hw_bits_ich8lan()  argument
4799 	if (hw->mac.type >= e1000_pchlan)  in e1000_initialize_hw_bits_ich8lan()
4815 	if (hw->mac.type == e1000_ich8lan)  in e1000_initialize_hw_bits_ich8lan()
4830 	if (hw->mac.type == e1000_ich8lan) {  in e1000_initialize_hw_bits_ich8lan()
4845 	if (hw->mac.type == e1000_ich8lan)  in e1000_initialize_hw_bits_ich8lan()
4850 	if ((hw->mac.type == e1000_pch_lpt) ||  in e1000_initialize_hw_bits_ich8lan()
4851 	    (hw->mac.type == e1000_pch_spt)) {  in e1000_initialize_hw_bits_ich8lan()
4872 static s32 e1000_setup_link_ich8lan(struct e1000_hw *hw)  in e1000_setup_link_ich8lan()  argument
4876 	if (hw->phy.ops.check_reset_block(hw))  in e1000_setup_link_ich8lan()
4883 	if (hw->fc.requested_mode == e1000_fc_default) {  in e1000_setup_link_ich8lan()
4885 		if (hw->mac.type == e1000_pchlan)  in e1000_setup_link_ich8lan()
4886 			hw->fc.requested_mode = e1000_fc_rx_pause;  in e1000_setup_link_ich8lan()
4888 			hw->fc.requested_mode = e1000_fc_full;  in e1000_setup_link_ich8lan()
4894 	hw->fc.current_mode = hw->fc.requested_mode;  in e1000_setup_link_ich8lan()
4896 	e_dbg("After fix-ups FlowControl is now = %x\n", hw->fc.current_mode);  in e1000_setup_link_ich8lan()
4899 	ret_val = hw->mac.ops.setup_physical_interface(hw);  in e1000_setup_link_ich8lan()
4903 	ew32(FCTTV, hw->fc.pause_time);  in e1000_setup_link_ich8lan()
4904 	if ((hw->phy.type == e1000_phy_82578) ||  in e1000_setup_link_ich8lan()
4905 	    (hw->phy.type == e1000_phy_82579) ||  in e1000_setup_link_ich8lan()
4906 	    (hw->phy.type == e1000_phy_i217) ||  in e1000_setup_link_ich8lan()
4907 	    (hw->phy.type == e1000_phy_82577)) {  in e1000_setup_link_ich8lan()
4908 		ew32(FCRTV_PCH, hw->fc.refresh_time);  in e1000_setup_link_ich8lan()
4910 		ret_val = e1e_wphy(hw, PHY_REG(BM_PORT_CTRL_PAGE, 27),  in e1000_setup_link_ich8lan()
4911 				   hw->fc.pause_time);  in e1000_setup_link_ich8lan()
4916 	return e1000e_set_fc_watermarks(hw);  in e1000_setup_link_ich8lan()
4927 static s32 e1000_setup_copper_link_ich8lan(struct e1000_hw *hw)  in e1000_setup_copper_link_ich8lan()  argument
4942 	ret_val = e1000e_write_kmrn_reg(hw, E1000_KMRNCTRLSTA_TIMEOUTS, 0xFFFF);  in e1000_setup_copper_link_ich8lan()
4945 	ret_val = e1000e_read_kmrn_reg(hw, E1000_KMRNCTRLSTA_INBAND_PARAM,  in e1000_setup_copper_link_ich8lan()
4950 	ret_val = e1000e_write_kmrn_reg(hw, E1000_KMRNCTRLSTA_INBAND_PARAM,  in e1000_setup_copper_link_ich8lan()
4955 	switch (hw->phy.type) {  in e1000_setup_copper_link_ich8lan()
4957 		ret_val = e1000e_copper_link_setup_igp(hw);  in e1000_setup_copper_link_ich8lan()
4963 		ret_val = e1000e_copper_link_setup_m88(hw);  in e1000_setup_copper_link_ich8lan()
4969 		ret_val = e1000_copper_link_setup_82577(hw);  in e1000_setup_copper_link_ich8lan()
4974 		ret_val = e1e_rphy(hw, IFE_PHY_MDIX_CONTROL, &reg_data);  in e1000_setup_copper_link_ich8lan()
4980 		switch (hw->phy.mdix) {  in e1000_setup_copper_link_ich8lan()
4992 		ret_val = e1e_wphy(hw, IFE_PHY_MDIX_CONTROL, reg_data);  in e1000_setup_copper_link_ich8lan()
5000 	return e1000e_setup_copper_link(hw);  in e1000_setup_copper_link_ich8lan()
5011 static s32 e1000_setup_copper_link_pch_lpt(struct e1000_hw *hw)  in e1000_setup_copper_link_pch_lpt()  argument
5021 	ret_val = e1000_copper_link_setup_82577(hw);  in e1000_setup_copper_link_pch_lpt()
5025 	return e1000e_setup_copper_link(hw);  in e1000_setup_copper_link_pch_lpt()
5038 static s32 e1000_get_link_up_info_ich8lan(struct e1000_hw *hw, u16 *speed,  in e1000_get_link_up_info_ich8lan()  argument
5043 	ret_val = e1000e_get_speed_and_duplex_copper(hw, speed, duplex);  in e1000_get_link_up_info_ich8lan()
5047 	if ((hw->mac.type == e1000_ich8lan) &&  in e1000_get_link_up_info_ich8lan()
5048 	    (hw->phy.type == e1000_phy_igp_3) && (*speed == SPEED_1000)) {  in e1000_get_link_up_info_ich8lan()
5049 		ret_val = e1000_kmrn_lock_loss_workaround_ich8lan(hw);  in e1000_get_link_up_info_ich8lan()
5070 static s32 e1000_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw)  in e1000_kmrn_lock_loss_workaround_ich8lan()  argument
5072 	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;  in e1000_kmrn_lock_loss_workaround_ich8lan()
5085 	ret_val = e1000e_phy_has_link_generic(hw, 1, 0, &link);  in e1000_kmrn_lock_loss_workaround_ich8lan()
5091 		ret_val = e1e_rphy(hw, IGP3_KMRN_DIAG, &data);  in e1000_kmrn_lock_loss_workaround_ich8lan()
5095 		ret_val = e1e_rphy(hw, IGP3_KMRN_DIAG, &data);  in e1000_kmrn_lock_loss_workaround_ich8lan()
5104 		e1000_phy_hw_reset(hw);  in e1000_kmrn_lock_loss_workaround_ich8lan()
5116 	e1000e_gig_downshift_workaround_ich8lan(hw);  in e1000_kmrn_lock_loss_workaround_ich8lan()
5130 void e1000e_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw,  in e1000e_set_kmrn_lock_loss_workaround_ich8lan()  argument
5133 	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;  in e1000e_set_kmrn_lock_loss_workaround_ich8lan()
5135 	if (hw->mac.type != e1000_ich8lan) {  in e1000e_set_kmrn_lock_loss_workaround_ich8lan()
5153 void e1000e_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw)  in e1000e_igp3_phy_powerdown_workaround_ich8lan()  argument
5159 	if (hw->phy.type != e1000_phy_igp_3)  in e1000e_igp3_phy_powerdown_workaround_ich8lan()
5173 		if (hw->mac.type == e1000_ich8lan)  in e1000e_igp3_phy_powerdown_workaround_ich8lan()
5174 			e1000e_gig_downshift_workaround_ich8lan(hw);  in e1000e_igp3_phy_powerdown_workaround_ich8lan()
5177 		e1e_rphy(hw, IGP3_VR_CTRL, &data);  in e1000e_igp3_phy_powerdown_workaround_ich8lan()
5179 		e1e_wphy(hw, IGP3_VR_CTRL, data | IGP3_VR_CTRL_MODE_SHUTDOWN);  in e1000e_igp3_phy_powerdown_workaround_ich8lan()
5182 		e1e_rphy(hw, IGP3_VR_CTRL, &data);  in e1000e_igp3_phy_powerdown_workaround_ich8lan()
5204 void e1000e_gig_downshift_workaround_ich8lan(struct e1000_hw *hw)  in e1000e_gig_downshift_workaround_ich8lan()  argument
5209 	if ((hw->mac.type != e1000_ich8lan) || (hw->phy.type == e1000_phy_ife))  in e1000e_gig_downshift_workaround_ich8lan()
5212 	ret_val = e1000e_read_kmrn_reg(hw, E1000_KMRNCTRLSTA_DIAG_OFFSET,  in e1000e_gig_downshift_workaround_ich8lan()
5217 	ret_val = e1000e_write_kmrn_reg(hw, E1000_KMRNCTRLSTA_DIAG_OFFSET,  in e1000e_gig_downshift_workaround_ich8lan()
5222 	e1000e_write_kmrn_reg(hw, E1000_KMRNCTRLSTA_DIAG_OFFSET, reg_data);  in e1000e_gig_downshift_workaround_ich8lan()
5239 void e1000_suspend_workarounds_ich8lan(struct e1000_hw *hw)  in e1000_suspend_workarounds_ich8lan()  argument
5241 	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;  in e1000_suspend_workarounds_ich8lan()
5248 	if (hw->phy.type == e1000_phy_i217) {  in e1000_suspend_workarounds_ich8lan()
5249 		u16 phy_reg, device_id = hw->adapter->pdev->device;  in e1000_suspend_workarounds_ich8lan()
5255 		    (hw->mac.type == e1000_pch_spt)) {  in e1000_suspend_workarounds_ich8lan()
5261 		ret_val = hw->phy.ops.acquire(hw);  in e1000_suspend_workarounds_ich8lan()
5269 			    e1000_read_emi_reg_locked(hw,  in e1000_suspend_workarounds_ich8lan()
5283 			    (hw->phy.autoneg_advertised & ADVERTISE_100_FULL)) {  in e1000_suspend_workarounds_ich8lan()
5288 				e1e_rphy_locked(hw,  in e1000_suspend_workarounds_ich8lan()
5291 				e1e_wphy_locked(hw,  in e1000_suspend_workarounds_ich8lan()
5305 			e1e_rphy_locked(hw, I217_PROXY_CTRL, &phy_reg);  in e1000_suspend_workarounds_ich8lan()
5307 			e1e_wphy_locked(hw, I217_PROXY_CTRL, phy_reg);  in e1000_suspend_workarounds_ich8lan()
5312 			e1e_rphy_locked(hw, I217_SxCTRL, &phy_reg);  in e1000_suspend_workarounds_ich8lan()
5314 			e1e_wphy_locked(hw, I217_SxCTRL, phy_reg);  in e1000_suspend_workarounds_ich8lan()
5317 			e1e_rphy_locked(hw, I217_MEMPWR, &phy_reg);  in e1000_suspend_workarounds_ich8lan()
5319 			e1e_wphy_locked(hw, I217_MEMPWR, phy_reg);  in e1000_suspend_workarounds_ich8lan()
5325 		e1e_rphy_locked(hw, I217_CGFREG, &phy_reg);  in e1000_suspend_workarounds_ich8lan()
5327 		e1e_wphy_locked(hw, I217_CGFREG, phy_reg);  in e1000_suspend_workarounds_ich8lan()
5330 		hw->phy.ops.release(hw);  in e1000_suspend_workarounds_ich8lan()
5335 	if (hw->mac.type == e1000_ich8lan)  in e1000_suspend_workarounds_ich8lan()
5336 		e1000e_gig_downshift_workaround_ich8lan(hw);  in e1000_suspend_workarounds_ich8lan()
5338 	if (hw->mac.type >= e1000_pchlan) {  in e1000_suspend_workarounds_ich8lan()
5339 		e1000_oem_bits_config_ich8lan(hw, false);  in e1000_suspend_workarounds_ich8lan()
5342 		if (hw->mac.type == e1000_pchlan)  in e1000_suspend_workarounds_ich8lan()
5343 			e1000e_phy_hw_reset_generic(hw);  in e1000_suspend_workarounds_ich8lan()
5345 		ret_val = hw->phy.ops.acquire(hw);  in e1000_suspend_workarounds_ich8lan()
5348 		e1000_write_smbus_addr(hw);  in e1000_suspend_workarounds_ich8lan()
5349 		hw->phy.ops.release(hw);  in e1000_suspend_workarounds_ich8lan()
5363 void e1000_resume_workarounds_pchlan(struct e1000_hw *hw)  in e1000_resume_workarounds_pchlan()  argument
5367 	if (hw->mac.type < e1000_pch2lan)  in e1000_resume_workarounds_pchlan()
5370 	ret_val = e1000_init_phy_workarounds_pchlan(hw);  in e1000_resume_workarounds_pchlan()
5381 	if (hw->phy.type == e1000_phy_i217) {  in e1000_resume_workarounds_pchlan()
5384 		ret_val = hw->phy.ops.acquire(hw);  in e1000_resume_workarounds_pchlan()
5391 		e1e_rphy_locked(hw, I217_LPI_GPIO_CTRL, &phy_reg);  in e1000_resume_workarounds_pchlan()
5393 		e1e_wphy_locked(hw, I217_LPI_GPIO_CTRL, phy_reg);  in e1000_resume_workarounds_pchlan()
5399 			ret_val = e1e_rphy_locked(hw, I217_MEMPWR, &phy_reg);  in e1000_resume_workarounds_pchlan()
5403 			e1e_wphy_locked(hw, I217_MEMPWR, phy_reg);  in e1000_resume_workarounds_pchlan()
5406 			e1e_wphy_locked(hw, I217_PROXY_CTRL, 0);  in e1000_resume_workarounds_pchlan()
5409 		ret_val = e1e_rphy_locked(hw, I217_CGFREG, &phy_reg);  in e1000_resume_workarounds_pchlan()
5413 		e1e_wphy_locked(hw, I217_CGFREG, phy_reg);  in e1000_resume_workarounds_pchlan()
5417 		hw->phy.ops.release(hw);  in e1000_resume_workarounds_pchlan()
5427 static s32 e1000_cleanup_led_ich8lan(struct e1000_hw *hw)  in e1000_cleanup_led_ich8lan()  argument
5429 	if (hw->phy.type == e1000_phy_ife)  in e1000_cleanup_led_ich8lan()
5430 		return e1e_wphy(hw, IFE_PHY_SPECIAL_CONTROL_LED, 0);  in e1000_cleanup_led_ich8lan()
5432 	ew32(LEDCTL, hw->mac.ledctl_default);  in e1000_cleanup_led_ich8lan()
5442 static s32 e1000_led_on_ich8lan(struct e1000_hw *hw)  in e1000_led_on_ich8lan()  argument
5444 	if (hw->phy.type == e1000_phy_ife)  in e1000_led_on_ich8lan()
5445 		return e1e_wphy(hw, IFE_PHY_SPECIAL_CONTROL_LED,  in e1000_led_on_ich8lan()
5448 	ew32(LEDCTL, hw->mac.ledctl_mode2);  in e1000_led_on_ich8lan()
5458 static s32 e1000_led_off_ich8lan(struct e1000_hw *hw)  in e1000_led_off_ich8lan()  argument
5460 	if (hw->phy.type == e1000_phy_ife)  in e1000_led_off_ich8lan()
5461 		return e1e_wphy(hw, IFE_PHY_SPECIAL_CONTROL_LED,  in e1000_led_off_ich8lan()
5465 	ew32(LEDCTL, hw->mac.ledctl_mode1);  in e1000_led_off_ich8lan()
5475 static s32 e1000_setup_led_pchlan(struct e1000_hw *hw)  in e1000_setup_led_pchlan()  argument
5477 	return e1e_wphy(hw, HV_LED_CONFIG, (u16)hw->mac.ledctl_mode1);  in e1000_setup_led_pchlan()
5486 static s32 e1000_cleanup_led_pchlan(struct e1000_hw *hw)  in e1000_cleanup_led_pchlan()  argument
5488 	return e1e_wphy(hw, HV_LED_CONFIG, (u16)hw->mac.ledctl_default);  in e1000_cleanup_led_pchlan()
5497 static s32 e1000_led_on_pchlan(struct e1000_hw *hw)  in e1000_led_on_pchlan()  argument
5499 	u16 data = (u16)hw->mac.ledctl_mode2;  in e1000_led_on_pchlan()
5518 	return e1e_wphy(hw, HV_LED_CONFIG, data);  in e1000_led_on_pchlan()
5527 static s32 e1000_led_off_pchlan(struct e1000_hw *hw)  in e1000_led_off_pchlan()  argument
5529 	u16 data = (u16)hw->mac.ledctl_mode1;  in e1000_led_off_pchlan()
5548 	return e1e_wphy(hw, HV_LED_CONFIG, data);  in e1000_led_off_pchlan()
5563 static s32 e1000_get_cfg_done_ich8lan(struct e1000_hw *hw)  in e1000_get_cfg_done_ich8lan()  argument
5569 	e1000e_get_cfg_done_generic(hw);  in e1000_get_cfg_done_ich8lan()
5572 	if (hw->mac.type >= e1000_ich10lan) {  in e1000_get_cfg_done_ich8lan()
5573 		e1000_lan_init_done_ich8lan(hw);  in e1000_get_cfg_done_ich8lan()
5575 		ret_val = e1000e_get_auto_rd_done(hw);  in e1000_get_cfg_done_ich8lan()
5594 	if (hw->mac.type <= e1000_ich9lan) {  in e1000_get_cfg_done_ich8lan()
5596 		    (hw->phy.type == e1000_phy_igp_3)) {  in e1000_get_cfg_done_ich8lan()
5597 			e1000e_phy_init_script_igp3(hw);  in e1000_get_cfg_done_ich8lan()
5600 		if (e1000_valid_nvm_bank_detect_ich8lan(hw, &bank)) {  in e1000_get_cfg_done_ich8lan()
5617 static void e1000_power_down_phy_copper_ich8lan(struct e1000_hw *hw)  in e1000_power_down_phy_copper_ich8lan()  argument
5620 	if (!(hw->mac.ops.check_mng_mode(hw) ||  in e1000_power_down_phy_copper_ich8lan()
5621 	      hw->phy.ops.check_reset_block(hw)))  in e1000_power_down_phy_copper_ich8lan()
5622 		e1000_power_down_phy_copper(hw);  in e1000_power_down_phy_copper_ich8lan()
5632 static void e1000_clear_hw_cntrs_ich8lan(struct e1000_hw *hw)  in e1000_clear_hw_cntrs_ich8lan()  argument
5637 	e1000e_clear_hw_cntrs_base(hw);  in e1000_clear_hw_cntrs_ich8lan()
5654 	if ((hw->phy.type == e1000_phy_82578) ||  in e1000_clear_hw_cntrs_ich8lan()
5655 	    (hw->phy.type == e1000_phy_82579) ||  in e1000_clear_hw_cntrs_ich8lan()
5656 	    (hw->phy.type == e1000_phy_i217) ||  in e1000_clear_hw_cntrs_ich8lan()
5657 	    (hw->phy.type == e1000_phy_82577)) {  in e1000_clear_hw_cntrs_ich8lan()
5658 		ret_val = hw->phy.ops.acquire(hw);  in e1000_clear_hw_cntrs_ich8lan()
5661 		ret_val = hw->phy.ops.set_page(hw,  in e1000_clear_hw_cntrs_ich8lan()
5665 		hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data);  in e1000_clear_hw_cntrs_ich8lan()
5666 		hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data);  in e1000_clear_hw_cntrs_ich8lan()
5667 		hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data);  in e1000_clear_hw_cntrs_ich8lan()
5668 		hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data);  in e1000_clear_hw_cntrs_ich8lan()
5669 		hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data);  in e1000_clear_hw_cntrs_ich8lan()
5670 		hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data);  in e1000_clear_hw_cntrs_ich8lan()
5671 		hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data);  in e1000_clear_hw_cntrs_ich8lan()
5672 		hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data);  in e1000_clear_hw_cntrs_ich8lan()
5673 		hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data);  in e1000_clear_hw_cntrs_ich8lan()
5674 		hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data);  in e1000_clear_hw_cntrs_ich8lan()
5675 		hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data);  in e1000_clear_hw_cntrs_ich8lan()
5676 		hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data);  in e1000_clear_hw_cntrs_ich8lan()
5677 		hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data);  in e1000_clear_hw_cntrs_ich8lan()
5678 		hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data);  in e1000_clear_hw_cntrs_ich8lan()
5680 		hw->phy.ops.release(hw);  in e1000_clear_hw_cntrs_ich8lan()