Lines Matching refs:phy_write
32 #define phy_write _phy_write macro
62 phy_write(phy, MII_BMCR, val); in emac_mii_reset_phy()
73 phy_write(phy, MII_BMCR, val & ~BMCR_ISOLATE); in emac_mii_reset_phy()
125 phy_write(phy, MII_BMCR, ctl); in genmii_setup_aneg()
145 phy_write(phy, MII_ADVERTISE, adv); in genmii_setup_aneg()
157 phy_write(phy, MII_CTRL1000, adv); in genmii_setup_aneg()
163 phy_write(phy, MII_BMCR, ctl); in genmii_setup_aneg()
183 phy_write(phy, MII_BMCR, ctl | BMCR_RESET); in genmii_setup_forced()
200 phy_write(phy, MII_BMCR, ctl); in genmii_setup_forced()
330 phy_write(phy, MII_CIS8201_EPCR, epcr); in cis8201_init()
333 phy_write(phy, MII_CIS8201_ACSR, in cis8201_init()
337 phy_write(phy, MII_CIS8201_10BTCSR, in cis8201_init()
369 phy_write(phy, 0x14, 0x0ce3); in m88e1111_init()
370 phy_write(phy, 0x18, 0x4101); in m88e1111_init()
371 phy_write(phy, 0x09, 0x0e00); in m88e1111_init()
372 phy_write(phy, 0x04, 0x01e1); in m88e1111_init()
373 phy_write(phy, 0x00, 0x9140); in m88e1111_init()
374 phy_write(phy, 0x00, 0x1140); in m88e1111_init()
392 phy_write(phy, 0x16, 0x0002); in m88e1112_init()
394 phy_write(phy, 0x00, 0x0040); /* 1Gbps */ in m88e1112_init()
397 phy_write(phy, 0x1a, reg_short); in m88e1112_init()
401 phy_write(phy, 0x16, 0x0000); in m88e1112_init()
413 phy_write(phy, 0x16, reg_short); in et1011c_init()
417 phy_write(phy, 0x17, reg_short); in et1011c_init()
419 phy_write(phy, 0x1c, 0x74f0); in et1011c_init()