Lines Matching defs:be_adapter
485 struct be_adapter { struct
486 struct pci_dev *pdev;
487 struct net_device *netdev;
489 u8 __iomem *csr; /* CSR BAR used only for BE2/3 */
490 u8 __iomem *db; /* Door Bell */
491 u8 __iomem *pcicfg; /* On SH,BEx only. Shadow of PCI config space */
493 struct mutex mbox_lock; /* For serializing mbox cmds to BE card */
494 struct be_dma_mem mbox_mem;
497 struct be_dma_mem mbox_mem_alloced;
499 struct be_mcc_obj mcc_obj;
500 spinlock_t mcc_lock; /* For serializing mcc cmds to BE card */
501 spinlock_t mcc_cq_lock;
503 u16 cfg_num_qs; /* configured via set-channels */
504 u16 num_evt_qs;
505 u16 num_msix_vec;
506 struct be_eq_obj eq_obj[MAX_EVT_QS];
507 struct msix_entry msix_entries[MAX_MSIX_VECTORS];
508 bool isr_registered;
511 u16 num_tx_qs;
512 struct be_tx_obj tx_obj[MAX_TX_QS];
515 u16 num_rx_qs;
516 u16 num_rss_qs;
517 u16 need_def_rxq;
518 struct be_rx_obj rx_obj[MAX_RX_QS];
519 u32 big_page_size; /* Compounded page size shared by rx wrbs */
521 struct be_drv_stats drv_stats;
522 struct be_aic_obj aic_obj[MAX_EVT_QS];
523 u8 vlan_prio_bmap; /* Available Priority BitMap */
524 u16 recommended_prio; /* Recommended Priority */
525 struct be_dma_mem rx_filter; /* Cmd DMA mem for rx-filter */
527 struct be_dma_mem stats_cmd;
529 struct delayed_work work;
530 u16 work_counter;
532 struct delayed_work be_err_detection_work;
533 u8 err_flags;
534 u32 flags;
535 u32 cmd_privileges;
537 char fw_ver[FW_VER_LEN];
538 char fw_on_flash[FW_VER_LEN];
541 int if_handle; /* Used to configure filtering */
542 u32 if_flags; /* Interface filtering flags */
543 u32 *pmac_id; /* MAC addr handle used by BE card */
544 u32 uc_macs; /* Count of secondary UC MAC programmed */
545 unsigned long vids[BITS_TO_LONGS(VLAN_N_VID)];
546 u16 vlans_added;
548 u32 beacon_state; /* for set_phys_id */
550 bool eeh_error;
551 bool fw_timeout;
552 bool hw_error;
554 u32 port_num;
555 char port_name;
556 u8 mc_type;
557 u32 function_mode;
558 u32 function_caps;
559 u32 rx_fc; /* Rx flow control */
560 u32 tx_fc; /* Tx flow control */
561 bool stats_cmd_sent;
562 struct {
566 } roce_db;
567 u32 num_msix_roce_vec;
568 struct ocrdma_dev *ocrdma_dev;
569 struct list_head entry;
571 u32 flash_status;
572 struct completion et_cmd_compl;
574 struct be_resources pool_res; /* resources available for the port */
575 struct be_resources res; /* resources available for the func */
576 u16 num_vfs; /* Number of VFs provisioned by PF */
577 u8 virtfn;
578 struct be_vf_cfg *vf_cfg;
579 bool be3_native;
580 u32 sli_family;
581 u8 hba_port_num;
582 u16 pvid;
583 __be16 vxlan_port;
584 int vxlan_port_count;
585 int vxlan_port_aliases;
586 struct phy_info phy;
587 u8 wol_cap;
588 bool wol_en;
589 u16 asic_rev;
590 u16 qnq_vid;
591 u32 msg_enable;
592 int be_get_temp_freq;
593 struct be_hwmon hwmon_info;
594 u8 pf_number;
595 u8 pci_func_num;
596 struct rss_info rss_info;
598 u32 bmc_filt_mask;
599 u16 serial_num[CNTL_SERIAL_NUM_WORDS];