Lines Matching refs:ioaddr
428 static int eeprom_read(void __iomem *ioaddr, int location);
456 void __iomem *ioaddr = np->base + ASICCtrl; in sundance_reset() local
460 iowrite32 (reset_cmd | ioread32 (ioaddr), ioaddr); in sundance_reset()
463 while (ioread32 (ioaddr) & (ResetBusy << 16)) { in sundance_reset()
508 void __iomem *ioaddr; in sundance_probe1() local
540 ioaddr = pci_iomap(pdev, bar, netdev_io_size); in sundance_probe1()
541 if (!ioaddr) in sundance_probe1()
546 cpu_to_le16(eeprom_read(ioaddr, i + EEPROM_SA_OFFSET)); in sundance_probe1()
549 np->base = ioaddr; in sundance_probe1()
590 dev->name, pci_id_tbl[chip_idx].name, ioaddr, in sundance_probe1()
624 dev->name, ioread32(ioaddr + ASICCtrl)); in sundance_probe1()
660 if (ioread32 (ioaddr + ASICCtrl) & 0x80) { in sundance_probe1()
689 printk("ASIC Control is %x.\n", ioread32(ioaddr + ASICCtrl)); in sundance_probe1()
692 printk("ASIC Control is now %x.\n", ioread32(ioaddr + ASICCtrl)); in sundance_probe1()
706 pci_iounmap(pdev, ioaddr); in sundance_probe1()
726 static int eeprom_read(void __iomem *ioaddr, int location) in eeprom_read() argument
729 iowrite16(0x0200 | (location & 0xff), ioaddr + EECtrl); in eeprom_read()
731 eeprom_delay(ioaddr + EECtrl); in eeprom_read()
732 if (! (ioread16(ioaddr + EECtrl) & 0x8000)) { in eeprom_read()
733 return ioread16(ioaddr + EEData); in eeprom_read()
849 void __iomem *ioaddr = np->base; in netdev_open() local
865 iowrite32(np->rx_ring_dma, ioaddr + RxListPtr); in netdev_open()
871 iowrite16(dev->mtu + 18, ioaddr + MaxFrameSize); in netdev_open()
873 iowrite16(dev->mtu + 14, ioaddr + MaxFrameSize); in netdev_open()
876 iowrite32(ioread32(ioaddr + ASICCtrl) | 0x0C, ioaddr + ASICCtrl); in netdev_open()
886 iowrite16(0, ioaddr + IntrEnable); in netdev_open()
887 iowrite16(0, ioaddr + DownCounter); in netdev_open()
889 iowrite8(100, ioaddr + RxDMAPollPeriod); in netdev_open()
890 iowrite8(127, ioaddr + TxDMAPollPeriod); in netdev_open()
893 iowrite8(0x01, ioaddr + DebugCtrl1); in netdev_open()
900 iowrite16 (StatsEnable | RxEnable | TxEnable, ioaddr + MACCtrl1); in netdev_open()
903 iowrite8(ioread8(ioaddr + WakeEvent) | 0x00, ioaddr + WakeEvent); in netdev_open()
909 dev->name, ioread32(ioaddr + RxStatus), ioread8(ioaddr + TxStatus), in netdev_open()
910 ioread32(ioaddr + MACCtrl0), in netdev_open()
911 ioread16(ioaddr + MACCtrl1), ioread16(ioaddr + MACCtrl0)); in netdev_open()
921 iowrite16(DEFAULT_INTR, ioaddr + IntrEnable); in netdev_open()
929 void __iomem *ioaddr = np->base; in check_duplex() local
937 iowrite16 (ioread16 (ioaddr + MACCtrl0) | EnbFullDuplex, in check_duplex()
938 ioaddr + MACCtrl0); in check_duplex()
950 iowrite16(ioread16(ioaddr + MACCtrl0) | (duplex ? 0x20 : 0), ioaddr + MACCtrl0); in check_duplex()
958 void __iomem *ioaddr = np->base; in netdev_timer() local
964 dev->name, ioread16(ioaddr + IntrEnable), in netdev_timer()
965 ioread8(ioaddr + TxStatus), ioread32(ioaddr + RxStatus)); in netdev_timer()
975 void __iomem *ioaddr = np->base; in tx_timeout() local
980 iowrite16(0, ioaddr + IntrEnable); in tx_timeout()
983 " resetting...\n", dev->name, ioread8(ioaddr + TxStatus), in tx_timeout()
984 ioread8(ioaddr + TxFrameId)); in tx_timeout()
1019 iowrite16(DEFAULT_INTR, ioaddr + IntrEnable); in tx_timeout()
1151 void __iomem *ioaddr = np->base; in reset_tx() local
1156 iowrite16 (TxDisable, ioaddr + MACCtrl1); in reset_tx()
1177 iowrite8(127, ioaddr + TxDMAPollPeriod); in reset_tx()
1179 iowrite16 (StatsEnable | RxEnable | TxEnable, ioaddr + MACCtrl1); in reset_tx()
1189 void __iomem *ioaddr = np->base; in intr_handler() local
1198 int intr_status = ioread16(ioaddr + IntrStatus); in intr_handler()
1199 iowrite16(intr_status, ioaddr + IntrStatus); in intr_handler()
1212 ioaddr + IntrEnable); in intr_handler()
1218 tx_status = ioread16 (ioaddr + TxStatus); in intr_handler()
1250 iowrite16(ioread16(ioaddr + MACCtrl1) | TxEnable, ioaddr + MACCtrl1); in intr_handler()
1251 if (ioread16(ioaddr + MACCtrl1) & TxEnabled) in intr_handler()
1257 iowrite16 (0, ioaddr + TxStatus); in intr_handler()
1259 iowrite32(5000, ioaddr + DownCounter); in intr_handler()
1262 tx_status = ioread16 (ioaddr + TxStatus); in intr_handler()
1266 hw_frame_id = ioread8(ioaddr + TxFrameId); in intr_handler()
1327 dev->name, ioread16(ioaddr + IntrStatus)); in intr_handler()
1337 void __iomem *ioaddr = np->base; in rx_poll() local
1412 iowrite16(DEFAULT_INTR, ioaddr + IntrEnable); in rx_poll()
1463 void __iomem *ioaddr = np->base; in netdev_error() local
1504 iowrite16(ioread16(ioaddr + MulticastFilter1+2) | 0x0200, in netdev_error()
1505 ioaddr + MulticastFilter1+2); in netdev_error()
1506 iowrite16(ioread16(ioaddr + MACCtrl0) | EnbFlowCtrl, in netdev_error()
1507 ioaddr + MACCtrl0); in netdev_error()
1528 void __iomem *ioaddr = np->base; in get_stats() local
1534 dev->stats.rx_missed_errors += ioread8(ioaddr + RxMissed); in get_stats()
1535 dev->stats.tx_packets += ioread16(ioaddr + TxFramesOK); in get_stats()
1536 dev->stats.rx_packets += ioread16(ioaddr + RxFramesOK); in get_stats()
1537 dev->stats.tx_carrier_errors += ioread8(ioaddr + StatsCarrierError); in get_stats()
1539 mult_coll = ioread8(ioaddr + StatsMultiColl); in get_stats()
1541 single_coll = ioread8(ioaddr + StatsOneColl); in get_stats()
1543 late_coll = ioread8(ioaddr + StatsLateColl); in get_stats()
1549 np->xstats.tx_deferred += ioread8(ioaddr + StatsTxDefer); in get_stats()
1550 np->xstats.tx_deferred_excessive += ioread8(ioaddr + StatsTxXSDefer); in get_stats()
1551 np->xstats.tx_aborted += ioread8(ioaddr + StatsTxAbort); in get_stats()
1552 np->xstats.tx_bcasts += ioread8(ioaddr + StatsBcastTx); in get_stats()
1553 np->xstats.rx_bcasts += ioread8(ioaddr + StatsBcastRx); in get_stats()
1554 np->xstats.tx_mcasts += ioread8(ioaddr + StatsMcastTx); in get_stats()
1555 np->xstats.rx_mcasts += ioread8(ioaddr + StatsMcastRx); in get_stats()
1557 dev->stats.tx_bytes += ioread16(ioaddr + TxOctetsLow); in get_stats()
1558 dev->stats.tx_bytes += ioread16(ioaddr + TxOctetsHigh) << 16; in get_stats()
1559 dev->stats.rx_bytes += ioread16(ioaddr + RxOctetsLow); in get_stats()
1560 dev->stats.rx_bytes += ioread16(ioaddr + RxOctetsHigh) << 16; in get_stats()
1570 void __iomem *ioaddr = np->base; in set_rx_mode() local
1597 iowrite8(AcceptBroadcast | AcceptMyPhys, ioaddr + RxMode); in set_rx_mode()
1604 iowrite16(mc_filter[i], ioaddr + MulticastFilter0 + i*2); in set_rx_mode()
1605 iowrite8(rx_mode, ioaddr + RxMode); in set_rx_mode()
1750 void __iomem *ioaddr = np->base; in sundance_get_wol() local
1759 wol_bits = ioread8(ioaddr + WakeEvent); in sundance_get_wol()
1770 void __iomem *ioaddr = np->base; in sundance_set_wol() local
1777 wol_bits = ioread8(ioaddr + WakeEvent); in sundance_set_wol()
1787 iowrite8(wol_bits, ioaddr + WakeEvent); in sundance_set_wol()
1832 void __iomem *ioaddr = np->base; in netdev_close() local
1849 dev->name, ioread8(ioaddr + TxStatus), in netdev_close()
1850 ioread32(ioaddr + RxStatus), ioread16(ioaddr + IntrStatus)); in netdev_close()
1856 iowrite16(0x0000, ioaddr + IntrEnable); in netdev_close()
1859 iowrite32(0x500, ioaddr + DMACtrl); in netdev_close()
1862 iowrite16(TxDisable | RxDisable | StatsDisable, ioaddr + MACCtrl1); in netdev_close()
1865 if ((ioread32(ioaddr + DMACtrl) & 0xc000) == 0) in netdev_close()
1871 ioaddr + ASIC_HI_WORD(ASICCtrl)); in netdev_close()
1874 if ((ioread16(ioaddr + ASIC_HI_WORD(ASICCtrl)) & ResetBusy) == 0) in netdev_close()
1952 void __iomem *ioaddr = np->base; in sundance_suspend() local
1962 iowrite8(AcceptBroadcast | AcceptMyPhys, ioaddr + RxMode); in sundance_suspend()
1963 iowrite16(RxEnable, ioaddr + MACCtrl1); in sundance_suspend()