519 	void __iomem *ioaddr = tp->base_addr;  in tulip_interrupt()  local
537 	csr5 = ioread32(ioaddr + CSR5);  in tulip_interrupt()
554 			iowrite32(tulip_tbl[tp->chip_id].valid_intrs&~RxPollInt, ioaddr + CSR7);  in tulip_interrupt()
564 		iowrite32(csr5 & 0x0001ff3f, ioaddr + CSR5);  in tulip_interrupt()
568 		iowrite32(csr5 & 0x0001ffff, ioaddr + CSR5);  in tulip_interrupt()
580 				   csr5, ioread32(ioaddr + CSR5));  in tulip_interrupt()
660 						 csr5, ioread32(ioaddr + CSR6),  in tulip_interrupt()
680 				iowrite32(0, ioaddr + CSR1);  in tulip_interrupt()
684 					iowrite32(tp->mc_filter[0], ioaddr + 0xAC);  in tulip_interrupt()
685 					iowrite32(tp->mc_filter[1], ioaddr + 0xB0);  in tulip_interrupt()
689 				dev->stats.rx_missed_errors += ioread32(ioaddr + CSR8) & 0xffff;  in tulip_interrupt()
718 			iowrite32(0x0800f7ba, ioaddr + CSR5);  in tulip_interrupt()
727 			iowrite32(tulip_tbl[tp->chip_id].valid_intrs, ioaddr + CSR7);  in tulip_interrupt()
737                         iowrite32(0x8001ffff, ioaddr + CSR5);  in tulip_interrupt()
741                                 iowrite32(0x8b240000, ioaddr + CSR11);  in tulip_interrupt()
744 				iowrite32(0x00, ioaddr + CSR7);  in tulip_interrupt()
749 …                        iowrite32(((~csr5) & 0x0001ebef) | AbnormalIntr | TimerInt, ioaddr + CSR7);  in tulip_interrupt()
750                                 iowrite32(0x0012, ioaddr + CSR11);  in tulip_interrupt()
759 		csr5 = ioread32(ioaddr + CSR5);  in tulip_interrupt()
787 			iowrite32(0x00, ioaddr + CSR7);
790 			if (tp->ttimer == 0 || (ioread32(ioaddr + CSR11) & 0xffff) == 0) {
796 					ioaddr + CSR7);
797 				iowrite32(TimerInt, ioaddr + CSR5);
798 				iowrite32(12, ioaddr + CSR11);
805 	if ((missed = ioread32(ioaddr + CSR8) & 0x1ffff)) {
811 			   ioread32(ioaddr + CSR5));