Lines Matching refs:db
372 struct dmfe_board_info *db; /* board information structure */ in dmfe_init_one() local
399 dev = alloc_etherdev(sizeof(*db)); in dmfe_init_one()
443 db = netdev_priv(dev); in dmfe_init_one()
446 db->desc_pool_ptr = pci_alloc_consistent(pdev, sizeof(struct tx_desc) * in dmfe_init_one()
447 DESC_ALL_CNT + 0x20, &db->desc_pool_dma_ptr); in dmfe_init_one()
448 if (!db->desc_pool_ptr) { in dmfe_init_one()
453 db->buf_pool_ptr = pci_alloc_consistent(pdev, TX_BUF_ALLOC * in dmfe_init_one()
454 TX_DESC_CNT + 4, &db->buf_pool_dma_ptr); in dmfe_init_one()
455 if (!db->buf_pool_ptr) { in dmfe_init_one()
460 db->first_tx_desc = (struct tx_desc *) db->desc_pool_ptr; in dmfe_init_one()
461 db->first_tx_desc_dma = db->desc_pool_dma_ptr; in dmfe_init_one()
462 db->buf_pool_start = db->buf_pool_ptr; in dmfe_init_one()
463 db->buf_pool_dma_start = db->buf_pool_dma_ptr; in dmfe_init_one()
465 db->chip_id = ent->driver_data; in dmfe_init_one()
467 db->ioaddr = pci_iomap(pdev, 0, 0); in dmfe_init_one()
468 if (!db->ioaddr) { in dmfe_init_one()
473 db->chip_revision = pdev->revision; in dmfe_init_one()
474 db->wol_mode = 0; in dmfe_init_one()
476 db->pdev = pdev; in dmfe_init_one()
482 spin_lock_init(&db->lock); in dmfe_init_one()
486 if ( (pci_pmr == 0x10000) && (db->chip_revision == 0x31) ) in dmfe_init_one()
487 db->chip_type = 1; /* DM9102A E3 */ in dmfe_init_one()
489 db->chip_type = 0; in dmfe_init_one()
493 ((__le16 *) db->srom)[i] = in dmfe_init_one()
494 cpu_to_le16(read_srom_word(db->ioaddr, i)); in dmfe_init_one()
499 dev->dev_addr[i] = db->srom[20 + i]; in dmfe_init_one()
514 pci_iounmap(pdev, db->ioaddr); in dmfe_init_one()
517 db->buf_pool_ptr, db->buf_pool_dma_ptr); in dmfe_init_one()
520 db->desc_pool_ptr, db->desc_pool_dma_ptr); in dmfe_init_one()
535 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_remove_one() local
542 pci_iounmap(db->pdev, db->ioaddr); in dmfe_remove_one()
543 pci_free_consistent(db->pdev, sizeof(struct tx_desc) * in dmfe_remove_one()
544 DESC_ALL_CNT + 0x20, db->desc_pool_ptr, in dmfe_remove_one()
545 db->desc_pool_dma_ptr); in dmfe_remove_one()
546 pci_free_consistent(db->pdev, TX_BUF_ALLOC * TX_DESC_CNT + 4, in dmfe_remove_one()
547 db->buf_pool_ptr, db->buf_pool_dma_ptr); in dmfe_remove_one()
563 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_open() local
564 const int irq = db->pdev->irq; in dmfe_open()
574 db->cr6_data = CR6_DEFAULT | dmfe_cr6_user_set; in dmfe_open()
575 db->tx_packet_cnt = 0; in dmfe_open()
576 db->tx_queue_cnt = 0; in dmfe_open()
577 db->rx_avail_cnt = 0; in dmfe_open()
578 db->wait_reset = 0; in dmfe_open()
580 db->first_in_callback = 0; in dmfe_open()
581 db->NIC_capability = 0xf; /* All capability*/ in dmfe_open()
582 db->PHY_reg4 = 0x1e0; in dmfe_open()
585 if ( !chkmode || (db->chip_id == PCI_DM9132_ID) || in dmfe_open()
586 (db->chip_revision >= 0x30) ) { in dmfe_open()
587 db->cr6_data |= DMFE_TXTH_256; in dmfe_open()
588 db->cr0_data = CR0_DEFAULT; in dmfe_open()
589 db->dm910x_chk_mode=4; /* Enter the normal mode */ in dmfe_open()
591 db->cr6_data |= CR6_SFT; /* Store & Forward mode */ in dmfe_open()
592 db->cr0_data = 0; in dmfe_open()
593 db->dm910x_chk_mode = 1; /* Enter the check mode */ in dmfe_open()
603 init_timer(&db->timer); in dmfe_open()
604 db->timer.expires = DMFE_TIMER_WUT + HZ * 2; in dmfe_open()
605 db->timer.data = (unsigned long)dev; in dmfe_open()
606 db->timer.function = dmfe_timer; in dmfe_open()
607 add_timer(&db->timer); in dmfe_open()
622 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_init_dm910x() local
623 void __iomem *ioaddr = db->ioaddr; in dmfe_init_dm910x()
630 dw32(DCR0, db->cr0_data); in dmfe_init_dm910x()
634 db->phy_addr = 1; in dmfe_init_dm910x()
637 dmfe_parse_srom(db); in dmfe_init_dm910x()
638 db->media_mode = dmfe_media_mode; in dmfe_init_dm910x()
642 if (db->chip_id == PCI_DM9009_ID) { in dmfe_init_dm910x()
649 if ( !(db->media_mode & 0x10) ) /* Force 1M mode */ in dmfe_init_dm910x()
650 dmfe_set_phyxcer(db); in dmfe_init_dm910x()
653 if ( !(db->media_mode & DMFE_AUTO) ) in dmfe_init_dm910x()
654 db->op_mode = db->media_mode; /* Force Mode */ in dmfe_init_dm910x()
660 update_cr6(db->cr6_data, ioaddr); in dmfe_init_dm910x()
663 if (db->chip_id == PCI_DM9132_ID) in dmfe_init_dm910x()
669 db->cr7_data = CR7_DEFAULT; in dmfe_init_dm910x()
670 dw32(DCR7, db->cr7_data); in dmfe_init_dm910x()
673 dw32(DCR15, db->cr15_data); in dmfe_init_dm910x()
676 db->cr6_data |= CR6_RXSC | CR6_TXSC | 0x40000; in dmfe_init_dm910x()
677 update_cr6(db->cr6_data, ioaddr); in dmfe_init_dm910x()
689 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_start_xmit() local
690 void __iomem *ioaddr = db->ioaddr; in dmfe_start_xmit()
706 spin_lock_irqsave(&db->lock, flags); in dmfe_start_xmit()
709 if (db->tx_queue_cnt >= TX_FREE_DESC_CNT) { in dmfe_start_xmit()
710 spin_unlock_irqrestore(&db->lock, flags); in dmfe_start_xmit()
711 pr_err("No Tx resource %ld\n", db->tx_queue_cnt); in dmfe_start_xmit()
719 txptr = db->tx_insert_ptr; in dmfe_start_xmit()
724 db->tx_insert_ptr = txptr->next_tx_desc; in dmfe_start_xmit()
727 if ( (!db->tx_queue_cnt) && (db->tx_packet_cnt < TX_MAX_SEND_CNT) ) { in dmfe_start_xmit()
729 db->tx_packet_cnt++; /* Ready to send */ in dmfe_start_xmit()
733 db->tx_queue_cnt++; /* queue TX packet */ in dmfe_start_xmit()
738 if ( db->tx_queue_cnt < TX_FREE_DESC_CNT ) in dmfe_start_xmit()
742 spin_unlock_irqrestore(&db->lock, flags); in dmfe_start_xmit()
743 dw32(DCR7, db->cr7_data); in dmfe_start_xmit()
759 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_stop() local
760 void __iomem *ioaddr = db->ioaddr; in dmfe_stop()
768 del_timer_sync(&db->timer); in dmfe_stop()
773 dmfe_phy_write(ioaddr, db->phy_addr, 0, 0x8000, db->chip_id); in dmfe_stop()
776 free_irq(db->pdev->irq, dev); in dmfe_stop()
779 dmfe_free_rxbuffer(db); in dmfe_stop()
784 db->tx_fifo_underrun, db->tx_excessive_collision, in dmfe_stop()
785 db->tx_late_collision, db->tx_no_carrier, db->tx_loss_carrier, in dmfe_stop()
786 db->tx_jabber_timeout, db->reset_count, db->reset_cr8, in dmfe_stop()
787 db->reset_fatal, db->reset_TXtimeout); in dmfe_stop()
802 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_interrupt() local
803 void __iomem *ioaddr = db->ioaddr; in dmfe_interrupt()
808 spin_lock_irqsave(&db->lock, flags); in dmfe_interrupt()
811 db->cr5_data = dr32(DCR5); in dmfe_interrupt()
812 dw32(DCR5, db->cr5_data); in dmfe_interrupt()
813 if ( !(db->cr5_data & 0xc1) ) { in dmfe_interrupt()
814 spin_unlock_irqrestore(&db->lock, flags); in dmfe_interrupt()
822 if (db->cr5_data & 0x2000) { in dmfe_interrupt()
824 DMFE_DBUG(1, "System bus error happen. CR5=", db->cr5_data); in dmfe_interrupt()
825 db->reset_fatal++; in dmfe_interrupt()
826 db->wait_reset = 1; /* Need to RESET */ in dmfe_interrupt()
827 spin_unlock_irqrestore(&db->lock, flags); in dmfe_interrupt()
832 if ( (db->cr5_data & 0x40) && db->rx_avail_cnt ) in dmfe_interrupt()
833 dmfe_rx_packet(dev, db); in dmfe_interrupt()
836 if (db->rx_avail_cnt<RX_DESC_CNT) in dmfe_interrupt()
840 if ( db->cr5_data & 0x01) in dmfe_interrupt()
841 dmfe_free_tx_pkt(dev, db); in dmfe_interrupt()
844 if (db->dm910x_chk_mode & 0x2) { in dmfe_interrupt()
845 db->dm910x_chk_mode = 0x4; in dmfe_interrupt()
846 db->cr6_data |= 0x100; in dmfe_interrupt()
847 update_cr6(db->cr6_data, ioaddr); in dmfe_interrupt()
851 dw32(DCR7, db->cr7_data); in dmfe_interrupt()
853 spin_unlock_irqrestore(&db->lock, flags); in dmfe_interrupt()
867 struct dmfe_board_info *db = netdev_priv(dev); in poll_dmfe() local
868 const int irq = db->pdev->irq; in poll_dmfe()
882 static void dmfe_free_tx_pkt(struct DEVICE *dev, struct dmfe_board_info * db) in dmfe_free_tx_pkt() argument
885 void __iomem *ioaddr = db->ioaddr; in dmfe_free_tx_pkt()
888 txptr = db->tx_remove_ptr; in dmfe_free_tx_pkt()
889 while(db->tx_packet_cnt) { in dmfe_free_tx_pkt()
895 db->tx_packet_cnt--; in dmfe_free_tx_pkt()
906 db->tx_fifo_underrun++; in dmfe_free_tx_pkt()
907 if ( !(db->cr6_data & CR6_SFT) ) { in dmfe_free_tx_pkt()
908 db->cr6_data = db->cr6_data | CR6_SFT; in dmfe_free_tx_pkt()
909 update_cr6(db->cr6_data, ioaddr); in dmfe_free_tx_pkt()
913 db->tx_excessive_collision++; in dmfe_free_tx_pkt()
915 db->tx_late_collision++; in dmfe_free_tx_pkt()
917 db->tx_no_carrier++; in dmfe_free_tx_pkt()
919 db->tx_loss_carrier++; in dmfe_free_tx_pkt()
921 db->tx_jabber_timeout++; in dmfe_free_tx_pkt()
929 db->tx_remove_ptr = txptr; in dmfe_free_tx_pkt()
932 if ( (db->tx_packet_cnt < TX_MAX_SEND_CNT) && db->tx_queue_cnt ) { in dmfe_free_tx_pkt()
934 db->tx_packet_cnt++; /* Ready to send */ in dmfe_free_tx_pkt()
935 db->tx_queue_cnt--; in dmfe_free_tx_pkt()
941 if ( db->tx_queue_cnt < TX_WAKE_DESC_CNT ) in dmfe_free_tx_pkt()
964 static void dmfe_rx_packet(struct DEVICE *dev, struct dmfe_board_info * db) in dmfe_rx_packet() argument
971 rxptr = db->rx_ready_ptr; in dmfe_rx_packet()
973 while(db->rx_avail_cnt) { in dmfe_rx_packet()
978 db->rx_avail_cnt--; in dmfe_rx_packet()
979 db->interval_rx_cnt++; in dmfe_rx_packet()
981 pci_unmap_single(db->pdev, le32_to_cpu(rxptr->rdes2), in dmfe_rx_packet()
988 dmfe_reuse_skb(db, rxptr->rx_skb_ptr); in dmfe_rx_packet()
1006 ((db->cr6_data & CR6_PM) && (rxlen>6)) ) { in dmfe_rx_packet()
1010 if ( (db->dm910x_chk_mode & 1) && in dmfe_rx_packet()
1014 dmfe_reuse_skb(db, rxptr->rx_skb_ptr); in dmfe_rx_packet()
1015 db->dm910x_chk_mode = 3; in dmfe_rx_packet()
1029 dmfe_reuse_skb(db, rxptr->rx_skb_ptr); in dmfe_rx_packet()
1041 dmfe_reuse_skb(db, rxptr->rx_skb_ptr); in dmfe_rx_packet()
1048 db->rx_ready_ptr = rxptr; in dmfe_rx_packet()
1057 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_set_filter_mode() local
1062 spin_lock_irqsave(&db->lock, flags); in dmfe_set_filter_mode()
1066 db->cr6_data |= CR6_PM | CR6_PBF; in dmfe_set_filter_mode()
1067 update_cr6(db->cr6_data, db->ioaddr); in dmfe_set_filter_mode()
1068 spin_unlock_irqrestore(&db->lock, flags); in dmfe_set_filter_mode()
1074 db->cr6_data &= ~(CR6_PM | CR6_PBF); in dmfe_set_filter_mode()
1075 db->cr6_data |= CR6_PAM; in dmfe_set_filter_mode()
1076 spin_unlock_irqrestore(&db->lock, flags); in dmfe_set_filter_mode()
1081 if (db->chip_id == PCI_DM9132_ID) in dmfe_set_filter_mode()
1085 spin_unlock_irqrestore(&db->lock, flags); in dmfe_set_filter_mode()
1105 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_ethtool_set_wol() local
1111 db->wol_mode = wolinfo->wolopts; in dmfe_ethtool_set_wol()
1118 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_ethtool_get_wol() local
1121 wolinfo->wolopts = db->wol_mode; in dmfe_ethtool_get_wol()
1140 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_timer() local
1141 void __iomem *ioaddr = db->ioaddr; in dmfe_timer()
1149 spin_lock_irqsave(&db->lock, flags); in dmfe_timer()
1152 if (db->first_in_callback == 0) { in dmfe_timer()
1153 db->first_in_callback = 1; in dmfe_timer()
1154 if (db->chip_type && (db->chip_id==PCI_DM9102_ID)) { in dmfe_timer()
1155 db->cr6_data &= ~0x40000; in dmfe_timer()
1156 update_cr6(db->cr6_data, ioaddr); in dmfe_timer()
1157 dmfe_phy_write(ioaddr, db->phy_addr, 0, 0x1000, db->chip_id); in dmfe_timer()
1158 db->cr6_data |= 0x40000; in dmfe_timer()
1159 update_cr6(db->cr6_data, ioaddr); in dmfe_timer()
1160 db->timer.expires = DMFE_TIMER_WUT + HZ * 2; in dmfe_timer()
1161 add_timer(&db->timer); in dmfe_timer()
1162 spin_unlock_irqrestore(&db->lock, flags); in dmfe_timer()
1169 if ( (db->dm910x_chk_mode & 0x1) && in dmfe_timer()
1171 db->dm910x_chk_mode = 0x4; in dmfe_timer()
1175 if ( (db->interval_rx_cnt==0) && (tmp_cr8) ) { in dmfe_timer()
1176 db->reset_cr8++; in dmfe_timer()
1177 db->wait_reset = 1; in dmfe_timer()
1179 db->interval_rx_cnt = 0; in dmfe_timer()
1182 if ( db->tx_packet_cnt && in dmfe_timer()
1188 db->reset_TXtimeout++; in dmfe_timer()
1189 db->wait_reset = 1; in dmfe_timer()
1194 if (db->wait_reset) { in dmfe_timer()
1195 DMFE_DBUG(0, "Dynamic Reset device", db->tx_packet_cnt); in dmfe_timer()
1196 db->reset_count++; in dmfe_timer()
1198 db->first_in_callback = 0; in dmfe_timer()
1199 db->timer.expires = DMFE_TIMER_WUT; in dmfe_timer()
1200 add_timer(&db->timer); in dmfe_timer()
1201 spin_unlock_irqrestore(&db->lock, flags); in dmfe_timer()
1206 if (db->chip_id == PCI_DM9132_ID) in dmfe_timer()
1211 if ( ((db->chip_id == PCI_DM9102_ID) && in dmfe_timer()
1212 (db->chip_revision == 0x30)) || in dmfe_timer()
1213 ((db->chip_id == PCI_DM9132_ID) && in dmfe_timer()
1214 (db->chip_revision == 0x10)) ) { in dmfe_timer()
1233 dmfe_phy_read (db->ioaddr, db->phy_addr, 1, db->chip_id); in dmfe_timer()
1234 link_ok_phy = (dmfe_phy_read (db->ioaddr, in dmfe_timer()
1235 db->phy_addr, 1, db->chip_id) & 0x4) ? 1 : 0; in dmfe_timer()
1249 if ( !(db->media_mode & 0x38) ) in dmfe_timer()
1250 dmfe_phy_write(db->ioaddr, db->phy_addr, in dmfe_timer()
1251 0, 0x1000, db->chip_id); in dmfe_timer()
1254 if (db->media_mode & DMFE_AUTO) { in dmfe_timer()
1256 db->cr6_data|=0x00040000; /* bit18=1, MII */ in dmfe_timer()
1257 db->cr6_data&=~0x00000200; /* bit9=0, HD mode */ in dmfe_timer()
1258 update_cr6(db->cr6_data, ioaddr); in dmfe_timer()
1265 if ( !(db->media_mode & DMFE_AUTO) || !dmfe_sense_speed(db)) { in dmfe_timer()
1267 SHOW_MEDIA_TYPE(db->op_mode); in dmfe_timer()
1270 dmfe_process_mode(db); in dmfe_timer()
1274 if (db->HPNA_command & 0xf00) { in dmfe_timer()
1275 db->HPNA_timer--; in dmfe_timer()
1276 if (!db->HPNA_timer) in dmfe_timer()
1277 dmfe_HPNA_remote_cmd_chk(db); in dmfe_timer()
1281 db->timer.expires = DMFE_TIMER_WUT; in dmfe_timer()
1282 add_timer(&db->timer); in dmfe_timer()
1283 spin_unlock_irqrestore(&db->lock, flags); in dmfe_timer()
1297 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_dynamic_reset() local
1298 void __iomem *ioaddr = db->ioaddr; in dmfe_dynamic_reset()
1303 db->cr6_data &= ~(CR6_RXSC | CR6_TXSC); /* Disable Tx/Rx */ in dmfe_dynamic_reset()
1304 update_cr6(db->cr6_data, ioaddr); in dmfe_dynamic_reset()
1312 dmfe_free_rxbuffer(db); in dmfe_dynamic_reset()
1315 db->tx_packet_cnt = 0; in dmfe_dynamic_reset()
1316 db->tx_queue_cnt = 0; in dmfe_dynamic_reset()
1317 db->rx_avail_cnt = 0; in dmfe_dynamic_reset()
1319 db->wait_reset = 0; in dmfe_dynamic_reset()
1333 static void dmfe_free_rxbuffer(struct dmfe_board_info * db) in dmfe_free_rxbuffer() argument
1338 while (db->rx_avail_cnt) { in dmfe_free_rxbuffer()
1339 dev_kfree_skb(db->rx_ready_ptr->rx_skb_ptr); in dmfe_free_rxbuffer()
1340 db->rx_ready_ptr = db->rx_ready_ptr->next_rx_desc; in dmfe_free_rxbuffer()
1341 db->rx_avail_cnt--; in dmfe_free_rxbuffer()
1350 static void dmfe_reuse_skb(struct dmfe_board_info *db, struct sk_buff * skb) in dmfe_reuse_skb() argument
1352 struct rx_desc *rxptr = db->rx_insert_ptr; in dmfe_reuse_skb()
1356 rxptr->rdes2 = cpu_to_le32( pci_map_single(db->pdev, in dmfe_reuse_skb()
1360 db->rx_avail_cnt++; in dmfe_reuse_skb()
1361 db->rx_insert_ptr = rxptr->next_rx_desc; in dmfe_reuse_skb()
1363 DMFE_DBUG(0, "SK Buffer reuse method error", db->rx_avail_cnt); in dmfe_reuse_skb()
1374 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_descriptor_init() local
1375 void __iomem *ioaddr = db->ioaddr; in dmfe_descriptor_init()
1386 db->tx_insert_ptr = db->first_tx_desc; in dmfe_descriptor_init()
1387 db->tx_remove_ptr = db->first_tx_desc; in dmfe_descriptor_init()
1388 dw32(DCR4, db->first_tx_desc_dma); /* TX DESC address */ in dmfe_descriptor_init()
1391 db->first_rx_desc = (void *)db->first_tx_desc + in dmfe_descriptor_init()
1394 db->first_rx_desc_dma = db->first_tx_desc_dma + in dmfe_descriptor_init()
1396 db->rx_insert_ptr = db->first_rx_desc; in dmfe_descriptor_init()
1397 db->rx_ready_ptr = db->first_rx_desc; in dmfe_descriptor_init()
1398 dw32(DCR3, db->first_rx_desc_dma); /* RX DESC address */ in dmfe_descriptor_init()
1401 tmp_buf = db->buf_pool_start; in dmfe_descriptor_init()
1402 tmp_buf_dma = db->buf_pool_dma_start; in dmfe_descriptor_init()
1403 tmp_tx_dma = db->first_tx_desc_dma; in dmfe_descriptor_init()
1404 for (tmp_tx = db->first_tx_desc, i = 0; i < TX_DESC_CNT; i++, tmp_tx++) { in dmfe_descriptor_init()
1415 (--tmp_tx)->tdes3 = cpu_to_le32(db->first_tx_desc_dma); in dmfe_descriptor_init()
1416 tmp_tx->next_tx_desc = db->first_tx_desc; in dmfe_descriptor_init()
1419 tmp_rx_dma=db->first_rx_desc_dma; in dmfe_descriptor_init()
1420 for (tmp_rx = db->first_rx_desc, i = 0; i < RX_DESC_CNT; i++, tmp_rx++) { in dmfe_descriptor_init()
1427 (--tmp_rx)->rdes3 = cpu_to_le32(db->first_rx_desc_dma); in dmfe_descriptor_init()
1428 tmp_rx->next_rx_desc = db->first_rx_desc; in dmfe_descriptor_init()
1459 struct dmfe_board_info *db = netdev_priv(dev); in dm9132_id_table() local
1460 void __iomem *ioaddr = db->ioaddr + 0xc0; in dm9132_id_table()
1497 struct dmfe_board_info *db = netdev_priv(dev); in send_filter_frame() local
1506 txptr = db->tx_insert_ptr; in send_filter_frame()
1535 db->tx_insert_ptr = txptr->next_tx_desc; in send_filter_frame()
1539 if (!db->tx_packet_cnt) { in send_filter_frame()
1540 void __iomem *ioaddr = db->ioaddr; in send_filter_frame()
1543 db->tx_packet_cnt++; in send_filter_frame()
1545 update_cr6(db->cr6_data | 0x2000, ioaddr); in send_filter_frame()
1547 update_cr6(db->cr6_data, ioaddr); in send_filter_frame()
1550 db->tx_queue_cnt++; /* Put in TX queue */ in send_filter_frame()
1561 struct dmfe_board_info *db = netdev_priv(dev); in allocate_rx_buffer() local
1565 rxptr = db->rx_insert_ptr; in allocate_rx_buffer()
1567 while(db->rx_avail_cnt < RX_DESC_CNT) { in allocate_rx_buffer()
1571 rxptr->rdes2 = cpu_to_le32( pci_map_single(db->pdev, skb->data, in allocate_rx_buffer()
1576 db->rx_avail_cnt++; in allocate_rx_buffer()
1579 db->rx_insert_ptr = rxptr; in allocate_rx_buffer()
1643 static u8 dmfe_sense_speed(struct dmfe_board_info *db) in dmfe_sense_speed() argument
1645 void __iomem *ioaddr = db->ioaddr; in dmfe_sense_speed()
1650 update_cr6(db->cr6_data & ~0x40000, ioaddr); in dmfe_sense_speed()
1652 phy_mode = dmfe_phy_read(db->ioaddr, db->phy_addr, 1, db->chip_id); in dmfe_sense_speed()
1653 phy_mode = dmfe_phy_read(db->ioaddr, db->phy_addr, 1, db->chip_id); in dmfe_sense_speed()
1656 if (db->chip_id == PCI_DM9132_ID) /* DM9132 */ in dmfe_sense_speed()
1657 phy_mode = dmfe_phy_read(db->ioaddr, in dmfe_sense_speed()
1658 db->phy_addr, 7, db->chip_id) & 0xf000; in dmfe_sense_speed()
1660 phy_mode = dmfe_phy_read(db->ioaddr, in dmfe_sense_speed()
1661 db->phy_addr, 17, db->chip_id) & 0xf000; in dmfe_sense_speed()
1663 case 0x1000: db->op_mode = DMFE_10MHF; break; in dmfe_sense_speed()
1664 case 0x2000: db->op_mode = DMFE_10MFD; break; in dmfe_sense_speed()
1665 case 0x4000: db->op_mode = DMFE_100MHF; break; in dmfe_sense_speed()
1666 case 0x8000: db->op_mode = DMFE_100MFD; break; in dmfe_sense_speed()
1667 default: db->op_mode = DMFE_10MHF; in dmfe_sense_speed()
1672 db->op_mode = DMFE_10MHF; in dmfe_sense_speed()
1687 static void dmfe_set_phyxcer(struct dmfe_board_info *db) in dmfe_set_phyxcer() argument
1689 void __iomem *ioaddr = db->ioaddr; in dmfe_set_phyxcer()
1693 db->cr6_data &= ~0x40000; in dmfe_set_phyxcer()
1694 update_cr6(db->cr6_data, ioaddr); in dmfe_set_phyxcer()
1697 if (db->chip_id == PCI_DM9009_ID) { in dmfe_set_phyxcer()
1698 phy_reg = dmfe_phy_read(db->ioaddr, in dmfe_set_phyxcer()
1699 db->phy_addr, 18, db->chip_id) & ~0x1000; in dmfe_set_phyxcer()
1701 dmfe_phy_write(db->ioaddr, in dmfe_set_phyxcer()
1702 db->phy_addr, 18, phy_reg, db->chip_id); in dmfe_set_phyxcer()
1706 phy_reg = dmfe_phy_read(db->ioaddr, db->phy_addr, 4, db->chip_id) & ~0x01e0; in dmfe_set_phyxcer()
1708 if (db->media_mode & DMFE_AUTO) { in dmfe_set_phyxcer()
1710 phy_reg |= db->PHY_reg4; in dmfe_set_phyxcer()
1713 switch(db->media_mode) { in dmfe_set_phyxcer()
1719 if (db->chip_id == PCI_DM9009_ID) phy_reg &= 0x61; in dmfe_set_phyxcer()
1724 phy_reg|=db->PHY_reg4; in dmfe_set_phyxcer()
1725 db->media_mode|=DMFE_AUTO; in dmfe_set_phyxcer()
1727 dmfe_phy_write(db->ioaddr, db->phy_addr, 4, phy_reg, db->chip_id); in dmfe_set_phyxcer()
1730 if ( db->chip_type && (db->chip_id == PCI_DM9102_ID) ) in dmfe_set_phyxcer()
1731 dmfe_phy_write(db->ioaddr, db->phy_addr, 0, 0x1800, db->chip_id); in dmfe_set_phyxcer()
1732 if ( !db->chip_type ) in dmfe_set_phyxcer()
1733 dmfe_phy_write(db->ioaddr, db->phy_addr, 0, 0x1200, db->chip_id); in dmfe_set_phyxcer()
1744 static void dmfe_process_mode(struct dmfe_board_info *db) in dmfe_process_mode() argument
1749 if (db->op_mode & 0x4) in dmfe_process_mode()
1750 db->cr6_data |= CR6_FDM; /* Set Full Duplex Bit */ in dmfe_process_mode()
1752 db->cr6_data &= ~CR6_FDM; /* Clear Full Duplex Bit */ in dmfe_process_mode()
1755 if (db->op_mode & 0x10) /* 1M HomePNA */ in dmfe_process_mode()
1756 db->cr6_data |= 0x40000;/* External MII select */ in dmfe_process_mode()
1758 db->cr6_data &= ~0x40000;/* Internal 10/100 transciver */ in dmfe_process_mode()
1760 update_cr6(db->cr6_data, db->ioaddr); in dmfe_process_mode()
1763 if ( !(db->media_mode & 0x18)) { in dmfe_process_mode()
1765 phy_reg = dmfe_phy_read(db->ioaddr, db->phy_addr, 6, db->chip_id); in dmfe_process_mode()
1769 switch(db->op_mode) { in dmfe_process_mode()
1775 dmfe_phy_write(db->ioaddr, in dmfe_process_mode()
1776 db->phy_addr, 0, phy_reg, db->chip_id); in dmfe_process_mode()
1777 if ( db->chip_type && (db->chip_id == PCI_DM9102_ID) ) in dmfe_process_mode()
1779 dmfe_phy_write(db->ioaddr, in dmfe_process_mode()
1780 db->phy_addr, 0, phy_reg, db->chip_id); in dmfe_process_mode()
1922 static void dmfe_parse_srom(struct dmfe_board_info * db) in dmfe_parse_srom() argument
1924 char * srom = db->srom; in dmfe_parse_srom()
1930 db->cr15_data = CR15_DEFAULT; in dmfe_parse_srom()
1936 db->NIC_capability = le16_to_cpup((__le16 *) (srom + 34)); in dmfe_parse_srom()
1937 db->PHY_reg4 = 0; in dmfe_parse_srom()
1939 switch( db->NIC_capability & tmp_reg ) { in dmfe_parse_srom()
1940 case 0x1: db->PHY_reg4 |= 0x0020; break; in dmfe_parse_srom()
1941 case 0x2: db->PHY_reg4 |= 0x0040; break; in dmfe_parse_srom()
1942 case 0x4: db->PHY_reg4 |= 0x0080; break; in dmfe_parse_srom()
1943 case 0x8: db->PHY_reg4 |= 0x0100; break; in dmfe_parse_srom()
1961 db->cr15_data |= 0x40; in dmfe_parse_srom()
1965 db->cr15_data |= 0x400; in dmfe_parse_srom()
1969 db->cr15_data |= 0x9800; in dmfe_parse_srom()
1973 db->HPNA_command = 1; in dmfe_parse_srom()
1977 db->HPNA_command |= 0x8000; in dmfe_parse_srom()
1982 case 0: db->HPNA_command |= 0x0904; break; in dmfe_parse_srom()
1983 case 1: db->HPNA_command |= 0x0a00; break; in dmfe_parse_srom()
1984 case 2: db->HPNA_command |= 0x0506; break; in dmfe_parse_srom()
1985 case 3: db->HPNA_command |= 0x0602; break; in dmfe_parse_srom()
1989 case 0: db->HPNA_command |= 0x0004; break; in dmfe_parse_srom()
1990 case 1: db->HPNA_command |= 0x0000; break; in dmfe_parse_srom()
1991 case 2: db->HPNA_command |= 0x0006; break; in dmfe_parse_srom()
1992 case 3: db->HPNA_command |= 0x0002; break; in dmfe_parse_srom()
1996 db->HPNA_present = 0; in dmfe_parse_srom()
1997 update_cr6(db->cr6_data | 0x40000, db->ioaddr); in dmfe_parse_srom()
1998 tmp_reg = dmfe_phy_read(db->ioaddr, db->phy_addr, 3, db->chip_id); in dmfe_parse_srom()
2001 db->HPNA_timer = 8; in dmfe_parse_srom()
2002 if ( dmfe_phy_read(db->ioaddr, db->phy_addr, 31, db->chip_id) == 0x4404) { in dmfe_parse_srom()
2004 db->HPNA_present = 1; in dmfe_parse_srom()
2005 dmfe_program_DM9801(db, tmp_reg); in dmfe_parse_srom()
2008 db->HPNA_present = 2; in dmfe_parse_srom()
2009 dmfe_program_DM9802(db); in dmfe_parse_srom()
2020 static void dmfe_program_DM9801(struct dmfe_board_info * db, int HPNA_rev) in dmfe_program_DM9801() argument
2027 db->HPNA_command |= 0x1000; in dmfe_program_DM9801()
2028 reg25 = dmfe_phy_read(db->ioaddr, db->phy_addr, 24, db->chip_id); in dmfe_program_DM9801()
2030 reg17 = dmfe_phy_read(db->ioaddr, db->phy_addr, 17, db->chip_id); in dmfe_program_DM9801()
2033 reg25 = dmfe_phy_read(db->ioaddr, db->phy_addr, 25, db->chip_id); in dmfe_program_DM9801()
2035 reg17 = dmfe_phy_read(db->ioaddr, db->phy_addr, 17, db->chip_id); in dmfe_program_DM9801()
2041 db->HPNA_command |= 0x1000; in dmfe_program_DM9801()
2042 reg25 = dmfe_phy_read(db->ioaddr, db->phy_addr, 25, db->chip_id); in dmfe_program_DM9801()
2044 reg17 = dmfe_phy_read(db->ioaddr, db->phy_addr, 17, db->chip_id); in dmfe_program_DM9801()
2048 dmfe_phy_write(db->ioaddr, db->phy_addr, 16, db->HPNA_command, db->chip_id); in dmfe_program_DM9801()
2049 dmfe_phy_write(db->ioaddr, db->phy_addr, 17, reg17, db->chip_id); in dmfe_program_DM9801()
2050 dmfe_phy_write(db->ioaddr, db->phy_addr, 25, reg25, db->chip_id); in dmfe_program_DM9801()
2058 static void dmfe_program_DM9802(struct dmfe_board_info * db) in dmfe_program_DM9802() argument
2063 dmfe_phy_write(db->ioaddr, db->phy_addr, 16, db->HPNA_command, db->chip_id); in dmfe_program_DM9802()
2064 phy_reg = dmfe_phy_read(db->ioaddr, db->phy_addr, 25, db->chip_id); in dmfe_program_DM9802()
2066 dmfe_phy_write(db->ioaddr, db->phy_addr, 25, phy_reg, db->chip_id); in dmfe_program_DM9802()
2075 static void dmfe_HPNA_remote_cmd_chk(struct dmfe_board_info * db) in dmfe_HPNA_remote_cmd_chk() argument
2080 phy_reg = dmfe_phy_read(db->ioaddr, db->phy_addr, 17, db->chip_id) & 0x60; in dmfe_HPNA_remote_cmd_chk()
2089 if ( phy_reg != (db->HPNA_command & 0x0f00) ) { in dmfe_HPNA_remote_cmd_chk()
2090 dmfe_phy_write(db->ioaddr, db->phy_addr, 16, db->HPNA_command, in dmfe_HPNA_remote_cmd_chk()
2091 db->chip_id); in dmfe_HPNA_remote_cmd_chk()
2092 db->HPNA_timer=8; in dmfe_HPNA_remote_cmd_chk()
2094 db->HPNA_timer=600; /* Match, every 10 minutes, check */ in dmfe_HPNA_remote_cmd_chk()
2113 struct dmfe_board_info *db = netdev_priv(dev); in dmfe_suspend() local
2114 void __iomem *ioaddr = db->ioaddr; in dmfe_suspend()
2121 db->cr6_data &= ~(CR6_RXSC | CR6_TXSC); in dmfe_suspend()
2122 update_cr6(db->cr6_data, ioaddr); in dmfe_suspend()
2129 dmfe_free_rxbuffer(db); in dmfe_suspend()
2135 if (db->wol_mode & WAKE_PHY) in dmfe_suspend()
2137 if (db->wol_mode & WAKE_MAGIC) in dmfe_suspend()