970 static int     mii_rd(u_char phyreg, u_char phyaddr, u_long ioaddr);
971 static void    mii_wr(int data, u_char phyreg, u_char phyaddr, u_long ioaddr);
972 static int     mii_rdata(u_long ioaddr);
973 static void    mii_wdata(int data, int len, u_long ioaddr);
974 static void    mii_ta(u_long rw, u_long ioaddr);
976 static void    mii_address(u_char addr, u_long ioaddr);
977 static void    sendto_mii(u32 command, int data, u_long ioaddr);
978 static int     getfrom_mii(u32 command, u_long ioaddr);
979 static int     mii_get_oui(u_char phyaddr, u_long ioaddr);
4802 mii_rd(u_char phyreg, u_char phyaddr, u_long ioaddr)  in mii_rd()  argument
4804     mii_wdata(MII_PREAMBLE,  2, ioaddr);   /* Start of 34 bit preamble...    */  in mii_rd()
4805     mii_wdata(MII_PREAMBLE, 32, ioaddr);   /* ...continued                   */  in mii_rd()
4806     mii_wdata(MII_STRD, 4, ioaddr);        /* SFD and Read operation         */  in mii_rd()
4807     mii_address(phyaddr, ioaddr);          /* PHY address to be accessed     */  in mii_rd()
4808     mii_address(phyreg, ioaddr);           /* PHY Register to read           */  in mii_rd()
4809     mii_ta(MII_STRD, ioaddr);              /* Turn around time - 2 MDC       */  in mii_rd()
4811     return mii_rdata(ioaddr);              /* Read data                      */  in mii_rd()
4815 mii_wr(int data, u_char phyreg, u_char phyaddr, u_long ioaddr)  in mii_wr()  argument
4817     mii_wdata(MII_PREAMBLE,  2, ioaddr);   /* Start of 34 bit preamble...    */  in mii_wr()
4818     mii_wdata(MII_PREAMBLE, 32, ioaddr);   /* ...continued                   */  in mii_wr()
4819     mii_wdata(MII_STWR, 4, ioaddr);        /* SFD and Write operation        */  in mii_wr()
4820     mii_address(phyaddr, ioaddr);          /* PHY address to be accessed     */  in mii_wr()
4821     mii_address(phyreg, ioaddr);           /* PHY Register to write          */  in mii_wr()
4822     mii_ta(MII_STWR, ioaddr);              /* Turn around time - 2 MDC       */  in mii_wr()
4824     mii_wdata(data, 16, ioaddr);           /* Write data                     */  in mii_wr()
4828 mii_rdata(u_long ioaddr)  in mii_rdata()  argument
4835 	tmp |= getfrom_mii(MII_MRD | MII_RD, ioaddr);  in mii_rdata()
4842 mii_wdata(int data, int len, u_long ioaddr)  in mii_wdata()  argument
4847 	sendto_mii(MII_MWR | MII_WR, data, ioaddr);  in mii_wdata()
4853 mii_address(u_char addr, u_long ioaddr)  in mii_address()  argument
4859 	sendto_mii(MII_MWR | MII_WR, addr, ioaddr);  in mii_address()
4865 mii_ta(u_long rw, u_long ioaddr)  in mii_ta()  argument
4868 	sendto_mii(MII_MWR | MII_WR, 1, ioaddr);  in mii_ta()
4869 	sendto_mii(MII_MWR | MII_WR, 0, ioaddr);  in mii_ta()
4871 	getfrom_mii(MII_MRD | MII_RD, ioaddr);        /* Tri-state MDIO */  in mii_ta()
4890 sendto_mii(u32 command, int data, u_long ioaddr)  in sendto_mii()  argument
4895     outl(command | j, ioaddr);  in sendto_mii()
4897     outl(command | MII_MDC | j, ioaddr);  in sendto_mii()
4902 getfrom_mii(u32 command, u_long ioaddr)  in getfrom_mii()  argument
4904     outl(command, ioaddr);  in getfrom_mii()
4906     outl(command | MII_MDC, ioaddr);  in getfrom_mii()
4909     return (inl(ioaddr) >> 19) & 1;  in getfrom_mii()
4916 mii_get_oui(u_char phyaddr, u_long ioaddr)  in mii_get_oui()  argument
4927     r2 = mii_rd(MII_ID0, phyaddr, ioaddr);  in mii_get_oui()
4928     r3 = mii_rd(MII_ID1, phyaddr, ioaddr);  in mii_get_oui()