Lines Matching refs:u64
176 u64 cqe_type:4; /* W0 */
177 u64 stdn_fault:1;
178 u64 rsvd0:1;
179 u64 rq_qs:7;
180 u64 rq_idx:3;
181 u64 rsvd1:12;
182 u64 rss_alg:4;
183 u64 rsvd2:4;
184 u64 rb_cnt:4;
185 u64 vlan_found:1;
186 u64 vlan_stripped:1;
187 u64 vlan2_found:1;
188 u64 vlan2_stripped:1;
189 u64 l4_type:4;
190 u64 l3_type:4;
191 u64 l2_present:1;
192 u64 err_level:3;
193 u64 err_opcode:8;
195 u64 pkt_len:16; /* W1 */
196 u64 l2_ptr:8;
197 u64 l3_ptr:8;
198 u64 l4_ptr:8;
199 u64 cq_pkt_len:8;
200 u64 align_pad:3;
201 u64 rsvd3:1;
202 u64 chan:12;
204 u64 rss_tag:32; /* W2 */
205 u64 vlan_tci:16;
206 u64 vlan_ptr:8;
207 u64 vlan2_ptr:8;
209 u64 rb3_sz:16; /* W3 */
210 u64 rb2_sz:16;
211 u64 rb1_sz:16;
212 u64 rb0_sz:16;
214 u64 rb7_sz:16; /* W4 */
215 u64 rb6_sz:16;
216 u64 rb5_sz:16;
217 u64 rb4_sz:16;
219 u64 rb11_sz:16; /* W5 */
220 u64 rb10_sz:16;
221 u64 rb9_sz:16;
222 u64 rb8_sz:16;
224 u64 err_opcode:8;
225 u64 err_level:3;
226 u64 l2_present:1;
227 u64 l3_type:4;
228 u64 l4_type:4;
229 u64 vlan2_stripped:1;
230 u64 vlan2_found:1;
231 u64 vlan_stripped:1;
232 u64 vlan_found:1;
233 u64 rb_cnt:4;
234 u64 rsvd2:4;
235 u64 rss_alg:4;
236 u64 rsvd1:12;
237 u64 rq_idx:3;
238 u64 rq_qs:7;
239 u64 rsvd0:1;
240 u64 stdn_fault:1;
241 u64 cqe_type:4; /* W0 */
242 u64 chan:12;
243 u64 rsvd3:1;
244 u64 align_pad:3;
245 u64 cq_pkt_len:8;
246 u64 l4_ptr:8;
247 u64 l3_ptr:8;
248 u64 l2_ptr:8;
249 u64 pkt_len:16; /* W1 */
250 u64 vlan2_ptr:8;
251 u64 vlan_ptr:8;
252 u64 vlan_tci:16;
253 u64 rss_tag:32; /* W2 */
254 u64 rb0_sz:16;
255 u64 rb1_sz:16;
256 u64 rb2_sz:16;
257 u64 rb3_sz:16; /* W3 */
258 u64 rb4_sz:16;
259 u64 rb5_sz:16;
260 u64 rb6_sz:16;
261 u64 rb7_sz:16; /* W4 */
262 u64 rb8_sz:16;
263 u64 rb9_sz:16;
264 u64 rb10_sz:16;
265 u64 rb11_sz:16; /* W5 */
267 u64 rb0_ptr:64;
268 u64 rb1_ptr:64;
269 u64 rb2_ptr:64;
270 u64 rb3_ptr:64;
271 u64 rb4_ptr:64;
272 u64 rb5_ptr:64;
273 u64 rb6_ptr:64;
274 u64 rb7_ptr:64;
275 u64 rb8_ptr:64;
276 u64 rb9_ptr:64;
277 u64 rb10_ptr:64;
278 u64 rb11_ptr:64;
283 u64 cqe_type:4; /* W0 */
284 u64 rsvd0:60;
286 u64 rsvd1:4; /* W1 */
287 u64 partial_first:1;
288 u64 rsvd2:27;
289 u64 rbdr_bytes:8;
290 u64 rsvd3:24;
292 u64 rsvd0:60;
293 u64 cqe_type:4;
295 u64 rsvd3:24;
296 u64 rbdr_bytes:8;
297 u64 rsvd2:27;
298 u64 partial_first:1;
299 u64 rsvd1:4;
305 u64 cqe_type:4; /* W0 */
306 u64 rsvd0:52;
307 u64 cq_tcp_status:8;
309 u64 rsvd1:32; /* W1 */
310 u64 tcp_cntx_bytes:8;
311 u64 rsvd2:8;
312 u64 tcp_err_bytes:16;
314 u64 cq_tcp_status:8;
315 u64 rsvd0:52;
316 u64 cqe_type:4; /* W0 */
318 u64 tcp_err_bytes:16;
319 u64 rsvd2:8;
320 u64 tcp_cntx_bytes:8;
321 u64 rsvd1:32; /* W1 */
327 u64 cqe_type:4; /* W0 */
328 u64 rsvd0:4;
329 u64 sqe_ptr:16;
330 u64 rsvd1:4;
331 u64 rsvd2:10;
332 u64 sq_qs:7;
333 u64 sq_idx:3;
334 u64 rsvd3:8;
335 u64 send_status:8;
337 u64 ptp_timestamp:64; /* W1 */
339 u64 send_status:8;
340 u64 rsvd3:8;
341 u64 sq_idx:3;
342 u64 sq_qs:7;
343 u64 rsvd2:10;
344 u64 rsvd1:4;
345 u64 sqe_ptr:16;
346 u64 rsvd0:4;
347 u64 cqe_type:4; /* W0 */
349 u64 ptp_timestamp:64; /* W1 */
354 u64 u[64];
363 u64 rsvd0:15;
364 u64 buf_addr:42;
365 u64 cache_align:7;
367 u64 cache_align:7;
368 u64 buf_addr:42;
369 u64 rsvd0:15;
376 u64 tcp_pkt_cnt:12;
377 u64 rsvd1:4;
378 u64 align_hdr_bytes:4;
379 u64 align_ptr_bytes:4;
380 u64 ptr_bytes:16;
381 u64 rsvd2:24;
382 u64 cqe_type:4;
383 u64 rsvd0:54;
384 u64 tcp_end_reason:2;
385 u64 tcp_status:4;
387 u64 tcp_status:4;
388 u64 tcp_end_reason:2;
389 u64 rsvd0:54;
390 u64 cqe_type:4;
391 u64 rsvd2:24;
392 u64 ptr_bytes:16;
393 u64 align_ptr_bytes:4;
394 u64 align_hdr_bytes:4;
395 u64 rsvd1:4;
396 u64 tcp_pkt_cnt:12;
402 u64 opaque:32;
403 u64 rss_flow:8;
404 u64 skip_length:6;
405 u64 disable_rss:1;
406 u64 disable_tcp_reassembly:1;
407 u64 nodrop:1;
408 u64 dest_alg:2;
409 u64 rsvd0:2;
410 u64 dest_rq:11;
457 u64 rsvd1:32;
458 u64 crc_ival:32;
459 u64 subdesc_type:4;
460 u64 crc_alg:2;
461 u64 rsvd0:10;
462 u64 crc_insert_pos:16;
463 u64 hdr_start:16;
464 u64 crc_len:16;
466 u64 crc_len:16;
467 u64 hdr_start:16;
468 u64 crc_insert_pos:16;
469 u64 rsvd0:10;
470 u64 crc_alg:2;
471 u64 subdesc_type:4;
472 u64 crc_ival:32;
473 u64 rsvd1:32;
479 u64 subdesc_type:4; /* W0 */
480 u64 ld_type:2;
481 u64 rsvd0:42;
482 u64 size:16;
484 u64 rsvd1:15; /* W1 */
485 u64 addr:49;
487 u64 size:16;
488 u64 rsvd0:42;
489 u64 ld_type:2;
490 u64 subdesc_type:4; /* W0 */
492 u64 addr:49;
493 u64 rsvd1:15; /* W1 */
500 u64 subdesc_type:4; /* W0 */
501 u64 rsvd0:46;
502 u64 len:14;
504 u64 data:64; /* W1 */
506 u64 len:14;
507 u64 rsvd0:46;
508 u64 subdesc_type:4; /* W0 */
510 u64 data:64; /* W1 */
516 u64 subdesc_type:4; /* W0 */
517 u64 mem_alg:4;
518 u64 mem_dsz:2;
519 u64 wmem:1;
520 u64 rsvd0:21;
521 u64 offset:32;
523 u64 rsvd1:15; /* W1 */
524 u64 addr:49;
526 u64 offset:32;
527 u64 rsvd0:21;
528 u64 wmem:1;
529 u64 mem_dsz:2;
530 u64 mem_alg:4;
531 u64 subdesc_type:4; /* W0 */
533 u64 addr:49;
534 u64 rsvd1:15; /* W1 */
540 u64 subdesc_type:4;
541 u64 tso:1;
542 u64 post_cqe:1; /* Post CQE on no error also */
543 u64 dont_send:1;
544 u64 tstmp:1;
545 u64 subdesc_cnt:8;
546 u64 csum_l4:2;
547 u64 csum_l3:1;
548 u64 rsvd0:5;
549 u64 l4_offset:8;
550 u64 l3_offset:8;
551 u64 rsvd1:4;
552 u64 tot_len:20; /* W0 */
554 u64 tso_sdc_cont:8;
555 u64 tso_sdc_first:8;
556 u64 tso_l4_offset:8;
557 u64 tso_flags_last:12;
558 u64 tso_flags_first:12;
559 u64 rsvd2:2;
560 u64 tso_max_paysize:14; /* W1 */
562 u64 tot_len:20;
563 u64 rsvd1:4;
564 u64 l3_offset:8;
565 u64 l4_offset:8;
566 u64 rsvd0:5;
567 u64 csum_l3:1;
568 u64 csum_l4:2;
569 u64 subdesc_cnt:8;
570 u64 tstmp:1;
571 u64 dont_send:1;
572 u64 post_cqe:1; /* Post CQE on no error also */
573 u64 tso:1;
574 u64 subdesc_type:4; /* W0 */
576 u64 tso_max_paysize:14;
577 u64 rsvd2:2;
578 u64 tso_flags_first:12;
579 u64 tso_flags_last:12;
580 u64 tso_l4_offset:8;
581 u64 tso_sdc_first:8;
582 u64 tso_sdc_cont:8; /* W1 */
589 u64 reserved_2_63:62;
590 u64 ena:1;
591 u64 tcp_ena:1;
593 u64 tcp_ena:1;
594 u64 ena:1;
595 u64 reserved_2_63:62;
601 u64 reserved_43_63:21;
602 u64 ena:1;
603 u64 reset:1;
604 u64 caching:1;
605 u64 reserved_35_39:5;
606 u64 qsize:3;
607 u64 reserved_25_31:7;
608 u64 avg_con:9;
609 u64 reserved_0_15:16;
611 u64 reserved_0_15:16;
612 u64 avg_con:9;
613 u64 reserved_25_31:7;
614 u64 qsize:3;
615 u64 reserved_35_39:5;
616 u64 caching:1;
617 u64 reset:1;
618 u64 ena:1;
619 u64 reserved_43_63:21;
625 u64 reserved_20_63:44;
626 u64 ena:1;
627 u64 reserved_18_18:1;
628 u64 reset:1;
629 u64 ldwb:1;
630 u64 reserved_11_15:5;
631 u64 qsize:3;
632 u64 reserved_3_7:5;
633 u64 tstmp_bgx_intf:3;
635 u64 tstmp_bgx_intf:3;
636 u64 reserved_3_7:5;
637 u64 qsize:3;
638 u64 reserved_11_15:5;
639 u64 ldwb:1;
640 u64 reset:1;
641 u64 reserved_18_18:1;
642 u64 ena:1;
643 u64 reserved_20_63:44;
649 u64 reserved_45_63:19;
650 u64 ena:1;
651 u64 reset:1;
652 u64 ldwb:1;
653 u64 reserved_36_41:6;
654 u64 qsize:4;
655 u64 reserved_25_31:7;
656 u64 avg_con:9;
657 u64 reserved_12_15:4;
658 u64 lines:12;
660 u64 lines:12;
661 u64 reserved_12_15:4;
662 u64 avg_con:9;
663 u64 reserved_25_31:7;
664 u64 qsize:4;
665 u64 reserved_36_41:6;
666 u64 ldwb:1;
667 u64 reset:1;
668 u64 ena: 1;
669 u64 reserved_45_63:19;
675 u64 reserved_32_63:32;
676 u64 ena:1;
677 u64 reserved_27_30:4;
678 u64 sq_ins_ena:1;
679 u64 sq_ins_pos:6;
680 u64 lock_ena:1;
681 u64 lock_viol_cqe_ena:1;
682 u64 send_tstmp_ena:1;
683 u64 be:1;
684 u64 reserved_7_15:9;
685 u64 vnic:7;
687 u64 vnic:7;
688 u64 reserved_7_15:9;
689 u64 be:1;
690 u64 send_tstmp_ena:1;
691 u64 lock_viol_cqe_ena:1;
692 u64 lock_ena:1;
693 u64 sq_ins_pos:6;
694 u64 sq_ins_ena:1;
695 u64 reserved_27_30:4;
696 u64 ena:1;
697 u64 reserved_32_63:32;