Lines Matching refs:u32

121 	u32 count;
140 u32 len;
143 u32 mapped_len;
149 u32 done;
155 u32 iq;
156 u32 oq;
157 u32 iq64B;
161 u32 __iomem *pci_win_wr_addr_hi;
162 u32 __iomem *pci_win_wr_addr_lo;
165 u32 __iomem *pci_win_rd_addr_hi;
166 u32 __iomem *pci_win_rd_addr_lo;
169 u32 __iomem *pci_win_wr_data_hi;
170 u32 __iomem *pci_win_wr_data_lo;
173 u32 __iomem *pci_win_rd_data_hi;
174 u32 __iomem *pci_win_rd_data_lo;
180 u32 active;
181 u32 waiting;
183 u32 buffer_size;
197 void (*setup_iq_regs)(struct octeon_device *, u32);
198 void (*setup_oq_regs)(struct octeon_device *, u32);
204 void (*bar1_idx_setup)(struct octeon_device *, u64, u32, int);
205 void (*bar1_idx_write)(struct octeon_device *, u32, u32);
206 u32 (*bar1_idx_read)(struct octeon_device *, u32);
207 u32 (*update_iq_read_idx)(struct octeon_device *,
210 void (*enable_oq_pkt_time_intr)(struct octeon_device *, u32);
211 void (*disable_oq_pkt_time_intr)(struct octeon_device *, u32);
243 u32 max_nic_ports; /** max nic ports for the device */
244 u32 num_gmx_ports; /** num gmx ports */
250 u32 app_mode;
291 u32 ifcount;
300 u32 octeon_id;
306 #define LIO_FLAG_MSI_ENABLED (u32)(1 << 1)
307 #define LIO_FLAG_MSIX_ENABLED (u32)(1 << 2)
321 u32 num_iqs;
332 u32 num_oqs;
345 u32 int_status;
361 u32 num_consoles;
372 u32 app_mode;
416 struct octeon_device *octeon_allocate_device(u32 pci_id,
417 u32 priv_size);
461 struct octeon_device *lio_get_device(u32 octeon_id);
538 u32 *timeout_in_ms);
549 u32 wait_time_hundredths);
566 int octeon_add_console(struct octeon_device *oct, u32 console_num);
569 int octeon_console_write(struct octeon_device *oct, u32 console_num,
570 char *buffer, u32 write_request_size, u32 flags);
571 int octeon_console_write_avail(struct octeon_device *oct, u32 console_num);
572 int octeon_console_read(struct octeon_device *oct, u32 console_num,
573 char *buffer, u32 buf_size, u32 flags);
574 int octeon_console_read_avail(struct octeon_device *oct, u32 console_num);
589 u32 wait_hundredths);
620 int octeon_get_tx_qsize(struct octeon_device *oct, u32 q_no);
622 int octeon_get_rx_qsize(struct octeon_device *oct, u32 q_no);
634 void octeon_set_droq_pkt_op(struct octeon_device *oct, u32 q_no, u32 enable);