Lines Matching refs:oct
110 struct octeon_device *oct = lio->oct_dev; in lio_get_settings() local
127 dev_err(&oct->pci_dev->dev, "Unknown link interface reported\n"); in lio_get_settings()
145 struct octeon_device *oct; in lio_get_drvinfo() local
148 oct = lio->oct_dev; in lio_get_drvinfo()
153 strncpy(drvinfo->fw_version, oct->fw_info.liquidio_firmware_version, in lio_get_drvinfo()
155 strncpy(drvinfo->bus_info, pci_name(oct->pci_dev), 32); in lio_get_drvinfo()
163 struct octeon_device *oct = lio->oct_dev; in lio_ethtool_get_channels() local
166 if (OCTEON_CN6XXX(oct)) { in lio_ethtool_get_channels()
167 struct octeon_config *conf6x = CHIP_FIELD(oct, cn6xxx, conf); in lio_ethtool_get_channels()
223 struct octeon_device *oct = lio->oct_dev; in octnet_gpio_access() local
243 dev_err(&oct->pci_dev->dev, "Failed to configure gpio value\n"); in octnet_gpio_access()
252 static void octnet_mdio_resp_callback(struct octeon_device *oct, in octnet_mdio_resp_callback() argument
263 oct = lio_get_device(mdio_cmd_ctx->octeon_id); in octnet_mdio_resp_callback()
265 dev_err(&oct->pci_dev->dev, "MIDO instruction failed. Status: %llx\n", in octnet_mdio_resp_callback()
356 struct octeon_device *oct = lio->oct_dev; in lio_set_phys_id() local
361 if (oct->chip_id == OCTEON_CN66XX) { in lio_set_phys_id()
366 } else if (oct->chip_id == OCTEON_CN68XX) { in lio_set_phys_id()
402 if (oct->chip_id == OCTEON_CN66XX) { in lio_set_phys_id()
406 } else if (oct->chip_id == OCTEON_CN68XX) { in lio_set_phys_id()
414 if (oct->chip_id == OCTEON_CN66XX) in lio_set_phys_id()
417 else if (oct->chip_id == OCTEON_CN68XX) in lio_set_phys_id()
425 if (oct->chip_id == OCTEON_CN66XX) { in lio_set_phys_id()
428 } else if (oct->chip_id == OCTEON_CN68XX) { in lio_set_phys_id()
459 struct octeon_device *oct = lio->oct_dev; in lio_ethtool_get_ringparam() local
463 if (OCTEON_CN6XXX(oct)) { in lio_ethtool_get_ringparam()
464 struct octeon_config *conf6x = CHIP_FIELD(oct, cn6xxx, conf); in lio_ethtool_get_ringparam()
620 struct octeon_device *oct = lio->oct_dev; in lio_get_intr_coalesce() local
621 struct octeon_cn6xxx *cn6xxx = (struct octeon_cn6xxx *)oct->chip; in lio_get_intr_coalesce()
625 intrmod_cfg = &oct->intrmod; in lio_get_intr_coalesce()
627 switch (oct->chip_id) { in lio_get_intr_coalesce()
656 iq = oct->instr_queue[lio->linfo.txpciq[0]]; in lio_get_intr_coalesce()
690 static int octnet_set_intrmod_cfg(void *oct, struct oct_intrmod_cfg *intr_cfg) in octnet_set_intrmod_cfg() argument
696 struct octeon_device *oct_dev = (struct octeon_device *)oct; in octnet_set_intrmod_cfg()
738 struct octeon_device *oct = lio->oct_dev; in oct_cfg_adaptive_intr() local
741 intrmod_cfg = &oct->intrmod; in oct_cfg_adaptive_intr()
795 ret = octnet_set_intrmod_cfg(oct, intrmod_cfg); in oct_cfg_adaptive_intr()
804 struct octeon_device *oct = lio->oct_dev; in oct_cfg_rx_intrcnt() local
805 struct octeon_cn6xxx *cn6xxx = (struct octeon_cn6xxx *)oct->chip; in oct_cfg_rx_intrcnt()
819 octeon_write_csr(oct, CN6XXX_SLI_OQ_INT_LEVEL_PKTS, in oct_cfg_rx_intrcnt()
829 struct octeon_device *oct = lio->oct_dev; in oct_cfg_rx_intrtime() local
830 struct octeon_cn6xxx *cn6xxx = (struct octeon_cn6xxx *)oct->chip; in oct_cfg_rx_intrtime()
844 time_threshold = lio_cn6xxx_get_oq_ticks(oct, rx_coalesce_usecs); in oct_cfg_rx_intrtime()
845 octeon_write_csr(oct, CN6XXX_SLI_OQ_INT_LEVEL_TIME, time_threshold); in oct_cfg_rx_intrtime()
856 struct octeon_device *oct = lio->oct_dev; in lio_set_intr_coalesce() local
863 oct->instr_queue[q_no]->fill_threshold = in lio_set_intr_coalesce()
867 dev_err(&oct->pci_dev->dev, in lio_set_intr_coalesce()
901 dev_info(&oct->pci_dev->dev, in lio_set_intr_coalesce()
903 dev_info(&oct->pci_dev->dev, in lio_set_intr_coalesce()
950 struct octeon_device *oct = lio->oct_dev; in lio_set_settings() local
973 dev_info(&oct->pci_dev->dev, "XAUI IFs settings cannot be modified.\n"); in lio_set_settings()
1007 dev_err(&oct->pci_dev->dev, "Failed to set settings\n"); in lio_set_settings()
1034 static int cn6xxx_read_csr_reg(char *s, struct octeon_device *oct) in cn6xxx_read_csr_reg() argument
1044 CN6XXX_WIN_WR_ADDR_LO, octeon_read_csr(oct, reg)); in cn6xxx_read_csr_reg()
1047 CN6XXX_WIN_WR_ADDR_HI, octeon_read_csr(oct, reg)); in cn6xxx_read_csr_reg()
1050 CN6XXX_WIN_RD_ADDR_LO, octeon_read_csr(oct, reg)); in cn6xxx_read_csr_reg()
1053 CN6XXX_WIN_RD_ADDR_HI, octeon_read_csr(oct, reg)); in cn6xxx_read_csr_reg()
1056 CN6XXX_WIN_WR_DATA_LO, octeon_read_csr(oct, reg)); in cn6xxx_read_csr_reg()
1059 CN6XXX_WIN_WR_DATA_HI, octeon_read_csr(oct, reg)); in cn6xxx_read_csr_reg()
1062 octeon_read_csr(oct, CN6XXX_WIN_WR_MASK_REG)); in cn6xxx_read_csr_reg()
1066 CN6XXX_SLI_INT_ENB64_PORT0, octeon_read_csr(oct, in cn6xxx_read_csr_reg()
1070 octeon_read_csr(oct, CN6XXX_SLI_INT_ENB64_PORT1)); in cn6xxx_read_csr_reg()
1072 octeon_read_csr(oct, CN6XXX_SLI_INT_SUM64)); in cn6xxx_read_csr_reg()
1075 for (i = 0; i < oct->num_oqs; i++) { in cn6xxx_read_csr_reg()
1078 reg, i, octeon_read_csr(oct, reg)); in cn6xxx_read_csr_reg()
1081 reg, i, octeon_read_csr(oct, reg)); in cn6xxx_read_csr_reg()
1085 reg, octeon_read_csr(oct, reg)); in cn6xxx_read_csr_reg()
1088 reg, octeon_read_csr(oct, reg)); in cn6xxx_read_csr_reg()
1096 reg, i, octeon_read_csr(oct, reg)); in cn6xxx_read_csr_reg()
1099 reg, i, octeon_read_csr(oct, reg)); in cn6xxx_read_csr_reg()
1106 octeon_read_csr(oct, CN6XXX_DMA_CNT(0))); in cn6xxx_read_csr_reg()
1109 CN6XXX_DMA_PKT_INT_LEVEL(0), octeon_read_csr(oct, reg)); in cn6xxx_read_csr_reg()
1113 octeon_read_csr(oct, reg)); in cn6xxx_read_csr_reg()
1117 octeon_read_csr(oct, CN6XXX_DMA_CNT(1))); in cn6xxx_read_csr_reg()
1121 octeon_read_csr(oct, reg)); in cn6xxx_read_csr_reg()
1125 octeon_read_csr(oct, reg)); in cn6xxx_read_csr_reg()
1132 reg = lio_pci_readq(oct, CN6XXX_BAR1_REG(i, oct->pcie_port)); in cn6xxx_read_csr_reg()
1134 CN6XXX_BAR1_REG(i, oct->pcie_port), i, reg); in cn6xxx_read_csr_reg()
1140 static int cn6xxx_read_config_reg(char *s, struct octeon_device *oct) in cn6xxx_read_config_reg() argument
1151 pci_read_config_dword(oct->pci_dev, (i * 4), &val); in cn6xxx_read_config_reg()
1157 pci_read_config_dword(oct->pci_dev, (i * 4), &val); in cn6xxx_read_config_reg()
1171 struct octeon_device *oct = lio->oct_dev; in lio_get_regs() local
1176 switch (oct->chip_id) { in lio_get_regs()
1180 len += cn6xxx_read_csr_reg(regbuf + len, oct); in lio_get_regs()
1181 len += cn6xxx_read_config_reg(regbuf + len, oct); in lio_get_regs()
1184 dev_err(&oct->pci_dev->dev, "%s Unknown chipid: %d\n", in lio_get_regs()
1185 __func__, oct->chip_id); in lio_get_regs()