Lines Matching refs:octeon_device
73 int lio_cn6xxx_soft_reset(struct octeon_device *oct);
74 void lio_cn6xxx_enable_error_reporting(struct octeon_device *oct);
75 void lio_cn6xxx_setup_pcie_mps(struct octeon_device *oct,
77 void lio_cn6xxx_setup_pcie_mrrs(struct octeon_device *oct,
79 void lio_cn6xxx_setup_global_input_regs(struct octeon_device *oct);
80 void lio_cn6xxx_setup_global_output_regs(struct octeon_device *oct);
81 void lio_cn6xxx_setup_iq_regs(struct octeon_device *oct, u32 iq_no);
82 void lio_cn6xxx_setup_oq_regs(struct octeon_device *oct, u32 oq_no);
83 void lio_cn6xxx_enable_io_queues(struct octeon_device *oct);
84 void lio_cn6xxx_disable_io_queues(struct octeon_device *oct);
85 void lio_cn6xxx_process_pcie_error_intr(struct octeon_device *oct, u64 intr64);
86 int lio_cn6xxx_process_droq_intr_regs(struct octeon_device *oct);
88 void lio_cn6xxx_reinit_regs(struct octeon_device *oct);
89 void lio_cn6xxx_bar1_idx_setup(struct octeon_device *oct, u64 core_addr,
91 void lio_cn6xxx_bar1_idx_write(struct octeon_device *oct, u32 idx, u32 mask);
92 u32 lio_cn6xxx_bar1_idx_read(struct octeon_device *oct, u32 idx);
94 lio_cn6xxx_update_read_index(struct octeon_device *oct __attribute__((unused)),
98 void cn6xxx_get_pcie_qlmport(struct octeon_device *oct);
99 void lio_cn6xxx_setup_reg_address(struct octeon_device *oct, void *chip,
101 u32 lio_cn6xxx_coprocessor_clock(struct octeon_device *oct);
102 u32 lio_cn6xxx_get_oq_ticks(struct octeon_device *oct, u32 time_intr_in_us);
103 int lio_setup_cn66xx_octeon_device(struct octeon_device *);
104 int lio_validate_cn6xxx_config_info(struct octeon_device *oct,