515 static void xgmac_dma_flush_tx_fifo(void __iomem *ioaddr)  in xgmac_dma_flush_tx_fifo()  argument
518 	u32 reg = readl(ioaddr + XGMAC_OMR);  in xgmac_dma_flush_tx_fifo()
519 	writel(reg | XGMAC_OMR_FTF, ioaddr + XGMAC_OMR);  in xgmac_dma_flush_tx_fifo()
521 	while ((timeout-- > 0) && readl(ioaddr + XGMAC_OMR) & XGMAC_OMR_FTF)  in xgmac_dma_flush_tx_fifo()
598 static inline void xgmac_mac_enable(void __iomem *ioaddr)  in xgmac_mac_enable()  argument
600 	u32 value = readl(ioaddr + XGMAC_CONTROL);  in xgmac_mac_enable()
602 	writel(value, ioaddr + XGMAC_CONTROL);  in xgmac_mac_enable()
604 	value = readl(ioaddr + XGMAC_DMA_CONTROL);  in xgmac_mac_enable()
606 	writel(value, ioaddr + XGMAC_DMA_CONTROL);  in xgmac_mac_enable()
609 static inline void xgmac_mac_disable(void __iomem *ioaddr)  in xgmac_mac_disable()  argument
611 	u32 value = readl(ioaddr + XGMAC_DMA_CONTROL);  in xgmac_mac_disable()
613 	writel(value, ioaddr + XGMAC_DMA_CONTROL);  in xgmac_mac_disable()
615 	value = readl(ioaddr + XGMAC_CONTROL);  in xgmac_mac_disable()
617 	writel(value, ioaddr + XGMAC_CONTROL);  in xgmac_mac_disable()
620 static void xgmac_set_mac_addr(void __iomem *ioaddr, unsigned char *addr,  in xgmac_set_mac_addr()  argument
627 		writel(data, ioaddr + XGMAC_ADDR_HIGH(num));  in xgmac_set_mac_addr()
629 		writel(data, ioaddr + XGMAC_ADDR_LOW(num));  in xgmac_set_mac_addr()
631 		writel(0, ioaddr + XGMAC_ADDR_HIGH(num));  in xgmac_set_mac_addr()
632 		writel(0, ioaddr + XGMAC_ADDR_LOW(num));  in xgmac_set_mac_addr()
636 static void xgmac_get_mac_addr(void __iomem *ioaddr, unsigned char *addr,  in xgmac_get_mac_addr()  argument
642 	hi_addr = readl(ioaddr + XGMAC_ADDR_HIGH(num));  in xgmac_get_mac_addr()
643 	lo_addr = readl(ioaddr + XGMAC_ADDR_LOW(num));  in xgmac_get_mac_addr()
957 	void __iomem *ioaddr = priv->base;  in xgmac_hw_init()  local
960 	ctrl = readl(ioaddr + XGMAC_CONTROL) & XGMAC_CONTROL_SPD_MASK;  in xgmac_hw_init()
964 	writel(value, ioaddr + XGMAC_DMA_BUS_MODE);  in xgmac_hw_init()
967 		(readl(ioaddr + XGMAC_DMA_BUS_MODE) & DMA_BUS_MODE_SFT_RESET))  in xgmac_hw_init()
975 	writel(value, ioaddr + XGMAC_DMA_BUS_MODE);  in xgmac_hw_init()
977 	writel(0, ioaddr + XGMAC_DMA_INTR_ENA);  in xgmac_hw_init()
980 	writel(XGMAC_INT_STAT_PMTIM, ioaddr + XGMAC_INT_STAT);  in xgmac_hw_init()
983 	writel(0x0077000E, ioaddr + XGMAC_DMA_AXI_BUS);  in xgmac_hw_init()
989 	writel(ctrl, ioaddr + XGMAC_CONTROL);  in xgmac_hw_init()
991 	writel(DMA_CONTROL_OSF, ioaddr + XGMAC_DMA_CONTROL);  in xgmac_hw_init()
996 		ioaddr + XGMAC_OMR);  in xgmac_hw_init()
999 	writel(1, ioaddr + XGMAC_MMC_CTRL);  in xgmac_hw_init()
1016 	void __iomem *ioaddr = priv->base;  in xgmac_open()  local
1032 	xgmac_set_mac_addr(ioaddr, dev->dev_addr, 0);  in xgmac_open()
1040 	xgmac_mac_enable(ioaddr);  in xgmac_open()
1046 	writel(DMA_INTR_DEFAULT_MASK, ioaddr + XGMAC_DMA_STATUS);  in xgmac_open()
1047 	writel(DMA_INTR_DEFAULT_MASK, ioaddr + XGMAC_DMA_INTR_ENA);  in xgmac_open()
1283 	void __iomem *ioaddr = priv->base;  in xgmac_set_rx_mode()  local
1311 			xgmac_set_mac_addr(ioaddr, ha->addr, reg);  in xgmac_set_rx_mode()
1336 			xgmac_set_mac_addr(ioaddr, ha->addr, reg);  in xgmac_set_rx_mode()
1343 		xgmac_set_mac_addr(ioaddr, NULL, i);  in xgmac_set_rx_mode()
1345 		writel(hash_filter[i], ioaddr + XGMAC_HASH(i));  in xgmac_set_rx_mode()
1347 	writel(value, ioaddr + XGMAC_FRAME_FILTER);  in xgmac_set_rx_mode()
1392 	void __iomem *ioaddr = priv->base;  in xgmac_pmt_interrupt()  local
1394 	intr_status = __raw_readl(ioaddr + XGMAC_INT_STAT);  in xgmac_pmt_interrupt()
1398 		readl(ioaddr + XGMAC_PMT);  in xgmac_pmt_interrupt()
1499 	void __iomem *ioaddr = priv->base;  in xgmac_set_mac_address()  local
1507 	xgmac_set_mac_addr(ioaddr, dev->dev_addr, 0);  in xgmac_set_mac_address()
1516 	void __iomem *ioaddr = priv->base;  in xgmac_set_features()  local
1522 	ctrl = readl(ioaddr + XGMAC_CONTROL);  in xgmac_set_features()
1527 	writel(ctrl, ioaddr + XGMAC_CONTROL);  in xgmac_set_features()
1866 static void xgmac_pmt(void __iomem *ioaddr, unsigned long mode)  in xgmac_pmt()  argument
1875 	writel(pmt, ioaddr + XGMAC_PMT);  in xgmac_pmt()
1908 	void __iomem *ioaddr = priv->base;  in xgmac_resume()  local
1913 	xgmac_pmt(ioaddr, 0);  in xgmac_resume()
1916 	xgmac_mac_enable(ioaddr);  in xgmac_resume()
1917 	writel(DMA_INTR_DEFAULT_MASK, ioaddr + XGMAC_DMA_STATUS);  in xgmac_resume()
1918 	writel(DMA_INTR_DEFAULT_MASK, ioaddr + XGMAC_DMA_INTR_ENA);  in xgmac_resume()