1561 	CNIC_WR(dev, BAR_TSTRORM_INTMEM +  in cnic_bnx2x_iscsi_init2()
1563 	CNIC_WR(dev, BAR_TSTRORM_INTMEM +  in cnic_bnx2x_iscsi_init2()
1569 	CNIC_WR(dev, BAR_USTRORM_INTMEM +  in cnic_bnx2x_iscsi_init2()
1571 	CNIC_WR(dev, BAR_USTRORM_INTMEM +  in cnic_bnx2x_iscsi_init2()
3022 	CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |  in cnic_service_bnx2_msix()
3068 	CNIC_WR(dev, hc_addr, (*(u32 *)&igu_ack));  in cnic_ack_bnx2x_int()
3084 	CNIC_WR(dev, igu_addr, cmd_data.sb_id_and_flags);  in cnic_ack_igu_sb()
4246 	CNIC_WR(dev, BAR_XSTRORM_INTMEM +  in cnic_cm_init_bnx2x_hw()
4248 	CNIC_WR(dev, BAR_XSTRORM_INTMEM +  in cnic_cm_init_bnx2x_hw()
4258 	CNIC_WR(dev, BAR_XSTRORM_INTMEM +  in cnic_cm_init_bnx2x_hw()
4261 	CNIC_WR(dev, BAR_TSTRORM_INTMEM + TSTORM_TCP_MAX_CWND_OFFSET(pfid),  in cnic_cm_init_bnx2x_hw()
4397 		CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA0,  in cnic_setup_5709_context()
4399 		CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA1,  in cnic_setup_5709_context()
4401 		CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL, idx |  in cnic_setup_5709_context()
4454 		CNIC_WR(dev, base, BNX2_HC_SB_CONFIG_1_ONE_SHOT);  in cnic_init_bnx2_irq()
4456 		CNIC_WR(dev, base + BNX2_HC_COMP_PROD_TRIP_OFF, (2 << 16) | 8);  in cnic_init_bnx2_irq()
4457 		CNIC_WR(dev, base + BNX2_HC_COM_TICKS_OFF, (64 << 16) | 220);  in cnic_init_bnx2_irq()
4458 		CNIC_WR(dev, base + BNX2_HC_CMD_TICKS_OFF, (64 << 16) | 220);  in cnic_init_bnx2_irq()
4469 			CNIC_WR(dev, BNX2_HC_COALESCE_NOW,  in cnic_init_bnx2_irq()
4486 			CNIC_WR(dev, BNX2_HC_COMMAND,  in cnic_init_bnx2_irq()
4511 	CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |  in cnic_enable_bnx2_int()
4523 	CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |  in cnic_disable_bnx2_int_sync()
4548 		CNIC_WR(dev, BNX2_TSCH_TSS_CFG, (sb_id << 24) |  in cnic_init_bnx2_tx_ring()
4621 		CNIC_WR(dev, coal_reg, coal_val);  in cnic_init_bnx2_rx_ring()
4688 	CNIC_WR(dev, BNX2_EMAC_MAC_MATCH4, val);  in cnic_set_bnx2_mac()
4697 	CNIC_WR(dev, BNX2_EMAC_MAC_MATCH5, val);  in cnic_set_bnx2_mac()
4703 	CNIC_WR(dev, BNX2_RPM_SORT_USER2, 0x0);  in cnic_set_bnx2_mac()
4704 	CNIC_WR(dev, BNX2_RPM_SORT_USER2, val);  in cnic_set_bnx2_mac()
4705 	CNIC_WR(dev, BNX2_RPM_SORT_USER2, val | BNX2_RPM_SORT_USER2_ENA);  in cnic_set_bnx2_mac()
4725 	CNIC_WR(dev, BNX2_MQ_CONFIG, val);  in cnic_start_bnx2_hw()
4727 	CNIC_WR(dev, BNX2_HC_COMP_PROD_TRIP, (2 << 16) | 8);  in cnic_start_bnx2_hw()
4728 	CNIC_WR(dev, BNX2_HC_COM_TICKS, (64 << 16) | 220);  in cnic_start_bnx2_hw()
4729 	CNIC_WR(dev, BNX2_HC_CMD_TICKS, (64 << 16) | 220);  in cnic_start_bnx2_hw()
4811 	CNIC_WR(dev, BNX2_MQ_KNL_CMD_MASK1, 2);  in cnic_start_bnx2_hw()
4816 	CNIC_WR(dev, BNX2_MQ_KNL_BYP_CMD_MASK1, 7);  in cnic_start_bnx2_hw()
4817 	CNIC_WR(dev, BNX2_MQ_KNL_BYP_WRITE_MASK1, 7);  in cnic_start_bnx2_hw()
4820 	CNIC_WR(dev, BNX2_MQ_KNL_RX_V2P_MASK2, 0x2000);  in cnic_start_bnx2_hw()
5123 	CNIC_WR(dev, BAR_CSTRORM_INTMEM +  in cnic_start_bnx2x_hw()
5125 	CNIC_WR(dev, BAR_CSTRORM_INTMEM +  in cnic_start_bnx2x_hw()
5128 	CNIC_WR(dev, BAR_CSTRORM_INTMEM +  in cnic_start_bnx2x_hw()
5131 	CNIC_WR(dev, BAR_CSTRORM_INTMEM +  in cnic_start_bnx2x_hw()
5134 	CNIC_WR(dev, BAR_CSTRORM_INTMEM +  in cnic_start_bnx2x_hw()
5145 	CNIC_WR(dev, BAR_USTRORM_INTMEM +  in cnic_start_bnx2x_hw()
5148 	CNIC_WR(dev, BAR_USTRORM_INTMEM +  in cnic_start_bnx2x_hw()
5152 	CNIC_WR(dev, BAR_TSTRORM_INTMEM +  in cnic_start_bnx2x_hw()
5199 			CNIC_WR(dev, off + i * 4, ((u32 *) &rx_prods)[i]);  in cnic_init_rings()
5401 	CNIC_WR(dev, BAR_CSTRORM_INTMEM +  in cnic_stop_bnx2x_hw()