275 	link_status = REG_RD(bp, params->shmem_base +  in bnx2x_check_lfa()
2113 	REG_WR(bp, params->shmem_base +  in bnx2x_update_mng()
2895 		eee_mode = ((REG_RD(bp, params->shmem_base +  in bnx2x_eee_calc_timer()
3072 	board_cfg = REG_RD(bp, params->shmem_base +  in bnx2x_bsc_module_sel()
3080 	sfp_ctrl = REG_RD(bp, params->shmem_base +  in bnx2x_bsc_module_sel()
3818 	if (REG_RD(bp, params->shmem_base +  in bnx2x_warpcore_enable_AN_KR()
3858 		wc_lane_config = REG_RD(bp, params->shmem_base +  in bnx2x_warpcore_enable_AN_KR()
4010 		cfg_tap_val = REG_RD(bp, params->shmem_base +  in bnx2x_warpcore_set_10G_XFI()
4336 						u32 shmem_base, u8 port,  in bnx2x_get_mod_abs_int_cfg()  argument
4343 		cfg_pin = (REG_RD(bp, shmem_base +  in bnx2x_get_mod_abs_int_cfg()
4380 				      params->shmem_base, params->port,  in bnx2x_is_sfp_module_plugged()
4420 		serdes_net_if = (REG_RD(bp, params->shmem_base +  in bnx2x_warpcore_config_runtime()
4483 	cfg_pin = REG_RD(bp, params->shmem_base +  in bnx2x_sfp_e3_set_transmitter()
4504 	serdes_net_if = (REG_RD(bp, params->shmem_base +  in bnx2x_warpcore_config_init()
4819 	vars->link_status = REG_RD(bp, params->shmem_base +  in bnx2x_link_status_update()
4836 	sync_offset = params->shmem_base +  in bnx2x_link_status_update()
4853 	sync_offset = params->shmem_base +  in bnx2x_link_status_update()
7432 	if (REG_RD(bp, params->shmem_base +  in bnx2x_8073_config_init()
7720 	bnx2x_save_spirom_version(bp, params->port, params->shmem_base, 0);  in bnx2x_8705_config_init()
7807 	tx_en_mode = REG_RD(bp, params->shmem_base +  in bnx2x_sfp_e1e2_set_transmitter()
7939 	pin_cfg = (REG_RD(bp, params->shmem_base +  in bnx2x_warpcore_power_module()
8235 	sync_offset = params->shmem_base +  in bnx2x_get_edc_mode()
8283 	val = REG_RD(bp, params->shmem_base +  in bnx2x_verify_sfp_module()
8548 	u32 fault_led_gpio = REG_RD(bp, params->shmem_base +  in bnx2x_set_e1e2_module_fault_led()
8581 	pin_cfg = (REG_RD(bp, params->shmem_base +  in bnx2x_set_e3_module_fault_led()
8703 	u32 val = REG_RD(bp, params->shmem_base +  in bnx2x_sfp_module_detection()
8764 	if (bnx2x_get_mod_abs_int_cfg(bp, params->chip_id, params->shmem_base,  in bnx2x_handle_module_detect_int()
8997 	tx_en_mode = REG_RD(bp, params->shmem_base +  in bnx2x_8706_config_init()
9370 	tx_en_mode = REG_RD(bp, params->shmem_base +  in bnx2x_8727_config_init()
9400 	u32 val = REG_RD(bp, params->shmem_base +  in bnx2x_8727_handle_mod_abs()
10123 	pair_swap = REG_RD(bp, params->shmem_base +  in bnx2x_848xx_pair_swap_cfg()
10200 	shmem_base_path[0] = params->shmem_base;  in bnx2x_84833_hw_reset_phy()
10375 		u32 cms_enable = REG_RD(bp, params->shmem_base +  in bnx2x_848x3_config_init()
10934 	cfg_pin = (REG_RD(bp, params->shmem_base +  in bnx2x_54618se_config_init()
11175 	cfg_pin = (REG_RD(bp, params->shmem_base +  in bnx2x_54618se_link_reset()
12030 static void bnx2x_populate_preemphasis(struct bnx2x *bp, u32 shmem_base,  in bnx2x_populate_preemphasis()  argument
12042 			rx = REG_RD(bp, shmem_base +  in bnx2x_populate_preemphasis()
12046 			tx = REG_RD(bp, shmem_base +  in bnx2x_populate_preemphasis()
12050 			rx = REG_RD(bp, shmem_base +  in bnx2x_populate_preemphasis()
12054 			tx = REG_RD(bp, shmem_base +  in bnx2x_populate_preemphasis()
12067 static u32 bnx2x_get_ext_phy_config(struct bnx2x *bp, u32 shmem_base,  in bnx2x_get_ext_phy_config()  argument
12073 		ext_phy_config = REG_RD(bp, shmem_base +  in bnx2x_get_ext_phy_config()
12078 		ext_phy_config = REG_RD(bp, shmem_base +  in bnx2x_get_ext_phy_config()
12089 static int bnx2x_populate_int_phy(struct bnx2x *bp, u32 shmem_base, u8 port,  in bnx2x_populate_int_phy()  argument
12094 	u32 switch_cfg = (REG_RD(bp, shmem_base +  in bnx2x_populate_int_phy()
12112 		serdes_net_if = (REG_RD(bp, shmem_base +  in bnx2x_populate_int_phy()
12222 	bnx2x_populate_preemphasis(bp, shmem_base, phy, port, INT_PHY);  in bnx2x_populate_int_phy()
12228 				  u32 shmem_base,  in bnx2x_populate_ext_phy()  argument
12235 	ext_phy_config = bnx2x_get_ext_phy_config(bp, shmem_base,  in bnx2x_populate_ext_phy()
12302 	bnx2x_populate_preemphasis(bp, shmem_base, phy, port, phy_index);  in bnx2x_populate_ext_phy()
12308 	config2 = REG_RD(bp, shmem_base + offsetof(struct shmem_region,  in bnx2x_populate_ext_phy()
12311 		phy->ver_addr = shmem_base + offsetof(struct shmem_region,  in bnx2x_populate_ext_phy()
12354 static int bnx2x_populate_phy(struct bnx2x *bp, u8 phy_index, u32 shmem_base,  in bnx2x_populate_phy()  argument
12360 		return bnx2x_populate_int_phy(bp, shmem_base, port, phy);  in bnx2x_populate_phy()
12361 	status = bnx2x_populate_ext_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_populate_phy()
12374 		link_config = REG_RD(bp, params->shmem_base +  in bnx2x_phy_def_cfg()
12377 		phy->speed_cap_mask = REG_RD(bp, params->shmem_base +  in bnx2x_phy_def_cfg()
12382 		link_config = REG_RD(bp, params->shmem_base +  in bnx2x_phy_def_cfg()
12385 		phy->speed_cap_mask = REG_RD(bp, params->shmem_base +  in bnx2x_phy_def_cfg()
12495 		if (bnx2x_populate_phy(bp, phy_index, params->shmem_base,  in bnx2x_phy_probe()
12518 		sync_offset = params->shmem_base +  in bnx2x_phy_probe()
13082 		u32 shmem_base, shmem2_base;  in bnx2x_8073_common_init_phy()  local
13085 			shmem_base = shmem_base_path[0];  in bnx2x_8073_common_init_phy()
13089 			shmem_base = shmem_base_path[port];  in bnx2x_8073_common_init_phy()
13095 		if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_8073_common_init_phy()
13209 		u32 shmem_base, shmem2_base;  in bnx2x_8726_common_init_phy()  local
13213 			shmem_base = shmem_base_path[0];  in bnx2x_8726_common_init_phy()
13216 			shmem_base = shmem_base_path[port];  in bnx2x_8726_common_init_phy()
13220 		if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_8726_common_init_phy()
13240 static void bnx2x_get_ext_phy_reset_gpio(struct bnx2x *bp, u32 shmem_base,  in bnx2x_get_ext_phy_reset_gpio()  argument
13244 	u32 phy_gpio_reset = REG_RD(bp, shmem_base +  in bnx2x_get_ext_phy_reset_gpio()
13322 		u32 shmem_base, shmem2_base;  in bnx2x_8727_common_init_phy()  local
13326 			shmem_base = shmem_base_path[0];  in bnx2x_8727_common_init_phy()
13330 			shmem_base = shmem_base_path[port];  in bnx2x_8727_common_init_phy()
13336 		if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_8727_common_init_phy()
13505 	cfg_pin = (REG_RD(bp, params->shmem_base +  in bnx2x_check_over_curr()
13676 	cfg_pin = (REG_RD(bp, params->shmem_base + offsetof(struct shmem_region,  in bnx2x_sfp_tx_fault_detection()
13817 		if ((REG_RD(bp, params->shmem_base +  in bnx2x_period_func()
13837 			     u32 shmem_base,  in bnx2x_fan_failure_det_req()  argument
13845 		if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_fan_failure_det_req()
13880 			    u32 chip_id, u32 shmem_base, u32 shmem2_base,  in bnx2x_init_mod_abs_int()  argument
13888 					      shmem_base,  in bnx2x_init_mod_abs_int()
13897 			if (bnx2x_populate_phy(bp, phy_index, shmem_base,  in bnx2x_init_mod_abs_int()
13924 	sync_offset = shmem_base +  in bnx2x_init_mod_abs_int()