1456 	u8 phy_index;  in bnx2x_set_mdio_emac_per_phy()  local
1458 	for (phy_index = INT_PHY; phy_index < params->num_phys;  in bnx2x_set_mdio_emac_per_phy()
1459 	      phy_index++)  in bnx2x_set_mdio_emac_per_phy()
1461 				   params->phy[phy_index].mdio_ctrl);  in bnx2x_set_mdio_emac_per_phy()
3197 	u8 phy_index;  in bnx2x_phy_read()  local
3201 	for (phy_index = 0; phy_index < params->num_phys; phy_index++) {  in bnx2x_phy_read()
3202 		if (params->phy[phy_index].addr == phy_addr) {  in bnx2x_phy_read()
3204 					       &params->phy[phy_index], devad,  in bnx2x_phy_read()
3214 	u8 phy_index;  in bnx2x_phy_write()  local
3218 	for (phy_index = 0; phy_index < params->num_phys; phy_index++) {  in bnx2x_phy_write()
3219 		if (params->phy[phy_index].addr == phy_addr) {  in bnx2x_phy_write()
3221 						&params->phy[phy_index], devad,  in bnx2x_phy_write()
3429 	u8 actual_phy_idx, phy_index, link_cfg_idx;  in set_phy_vars()  local
3432 	for (phy_index = INT_PHY; phy_index < params->num_phys;  in set_phy_vars()
3433 	      phy_index++) {  in set_phy_vars()
3434 		link_cfg_idx = LINK_CONFIG_IDX(phy_index);  in set_phy_vars()
3435 		actual_phy_idx = phy_index;  in set_phy_vars()
3437 			if (phy_index == EXT_PHY1)  in set_phy_vars()
3439 			else if (phy_index == EXT_PHY2)  in set_phy_vars()
6463 	u16 gp_status = 0, phy_index = 0;  in bnx2x_test_link()  local
6513 		for (phy_index = EXT_PHY1; phy_index < params->num_phys;  in bnx2x_test_link()
6514 		      phy_index++) {  in bnx2x_test_link()
6515 			serdes_phy_type = ((params->phy[phy_index].media_type ==  in bnx2x_test_link()
6517 					   (params->phy[phy_index].media_type ==  in bnx2x_test_link()
6519 					   (params->phy[phy_index].media_type ==  in bnx2x_test_link()
6521 					   (params->phy[phy_index].media_type ==  in bnx2x_test_link()
6526 			if (params->phy[phy_index].read_status) {  in bnx2x_test_link()
6528 					params->phy[phy_index].read_status(  in bnx2x_test_link()
6529 						&params->phy[phy_index],  in bnx2x_test_link()
6543 	u8 phy_index, non_ext_phy;  in bnx2x_link_initialize()  local
6585 		for (phy_index = EXT_PHY1; phy_index < params->num_phys;  in bnx2x_link_initialize()
6586 		      phy_index++) {  in bnx2x_link_initialize()
6592 			if (params->phy[phy_index].supported &  in bnx2x_link_initialize()
6596 			if (phy_index == EXT_PHY2 &&  in bnx2x_link_initialize()
6603 			params->phy[phy_index].config_init(  in bnx2x_link_initialize()
6604 				&params->phy[phy_index],  in bnx2x_link_initialize()
6818 	u8 link_10g_plus, phy_index;  in bnx2x_link_update()  local
6827 	for (phy_index = INT_PHY; phy_index < params->num_phys;  in bnx2x_link_update()
6828 	      phy_index++) {  in bnx2x_link_update()
6829 		phy_vars[phy_index].flow_ctrl = 0;  in bnx2x_link_update()
6830 		phy_vars[phy_index].link_status = 0;  in bnx2x_link_update()
6831 		phy_vars[phy_index].line_speed = 0;  in bnx2x_link_update()
6832 		phy_vars[phy_index].duplex = DUPLEX_FULL;  in bnx2x_link_update()
6833 		phy_vars[phy_index].phy_link_up = 0;  in bnx2x_link_update()
6834 		phy_vars[phy_index].link_up = 0;  in bnx2x_link_update()
6835 		phy_vars[phy_index].fault_detected = 0;  in bnx2x_link_update()
6837 		phy_vars[phy_index].eee_status = vars->eee_status;  in bnx2x_link_update()
6869 	for (phy_index = EXT_PHY1; phy_index < params->num_phys;  in bnx2x_link_update()
6870 	      phy_index++) {  in bnx2x_link_update()
6871 		struct bnx2x_phy *phy = &params->phy[phy_index];  in bnx2x_link_update()
6876 					       &phy_vars[phy_index]);  in bnx2x_link_update()
6879 				   phy_index);  in bnx2x_link_update()
6882 				   phy_index);  in bnx2x_link_update()
6888 			active_external_phy = phy_index;  in bnx2x_link_update()
6974 	for (phy_index = EXT_PHY1; phy_index < params->num_phys;  in bnx2x_link_update()
6975 	      phy_index++) {  in bnx2x_link_update()
6976 		if (params->phy[phy_index].flags &  in bnx2x_link_update()
6979 						 phy_index ==  in bnx2x_link_update()
12032 				     u8 phy_index)  in bnx2x_populate_preemphasis()  argument
12041 		if (phy_index == INT_PHY || phy_index == EXT_PHY1) {  in bnx2x_populate_preemphasis()
12068 				    u8 phy_index, u8 port)  in bnx2x_get_ext_phy_config()  argument
12071 	switch (phy_index) {  in bnx2x_get_ext_phy_config()
12083 		DP(NETIF_MSG_LINK, "Invalid phy_index %d\n", phy_index);  in bnx2x_get_ext_phy_config()
12227 				  u8 phy_index,  in bnx2x_populate_ext_phy()  argument
12236 						  phy_index, port);  in bnx2x_populate_ext_phy()
12302 	bnx2x_populate_preemphasis(bp, shmem_base, phy, port, phy_index);  in bnx2x_populate_ext_phy()
12310 	if (phy_index == EXT_PHY1) {  in bnx2x_populate_ext_phy()
12348 		   phy_type, port, phy_index);  in bnx2x_populate_ext_phy()
12354 static int bnx2x_populate_phy(struct bnx2x *bp, u8 phy_index, u32 shmem_base,  in bnx2x_populate_phy()  argument
12359 	if (phy_index == INT_PHY)  in bnx2x_populate_phy()
12361 	status = bnx2x_populate_ext_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_populate_phy()
12368 			      u8 phy_index)  in bnx2x_phy_def_cfg()  argument
12373 	if (phy_index == EXT_PHY2) {  in bnx2x_phy_def_cfg()
12392 	   phy_index, link_config, phy->speed_cap_mask);  in bnx2x_phy_def_cfg()
12473 	u8 phy_index, actual_phy_idx;  in bnx2x_phy_probe()  local
12482 	for (phy_index = INT_PHY; phy_index < MAX_PHYS;  in bnx2x_phy_probe()
12483 	      phy_index++) {  in bnx2x_phy_probe()
12484 		actual_phy_idx = phy_index;  in bnx2x_phy_probe()
12486 			if (phy_index == EXT_PHY1)  in bnx2x_phy_probe()
12488 			else if (phy_index == EXT_PHY2)  in bnx2x_phy_probe()
12493 			   phy_index, actual_phy_idx);  in bnx2x_phy_probe()
12495 		if (bnx2x_populate_phy(bp, phy_index, params->shmem_base,  in bnx2x_phy_probe()
12500 				   phy_index);  in bnx2x_phy_probe()
12501 			for (phy_index = INT_PHY;  in bnx2x_phy_probe()
12502 			      phy_index < MAX_PHYS;  in bnx2x_phy_probe()
12503 			      phy_index++)  in bnx2x_phy_probe()
12537 		bnx2x_phy_def_cfg(params, phy, phy_index);  in bnx2x_phy_probe()
12664 		u8 phy_index;  in bnx2x_init_xgxs_loopback()  local
12665 		for (phy_index = EXT_PHY1;  in bnx2x_init_xgxs_loopback()
12666 		      phy_index < params->num_phys; phy_index++)  in bnx2x_init_xgxs_loopback()
12667 			if (params->phy[phy_index].config_loopback)  in bnx2x_init_xgxs_loopback()
12668 				params->phy[phy_index].config_loopback(  in bnx2x_init_xgxs_loopback()
12669 					&params->phy[phy_index],  in bnx2x_init_xgxs_loopback()
12923 	u8 phy_index, port = params->port, clear_latch_ind = 0;  in bnx2x_link_reset()  local
12966 		for (phy_index = EXT_PHY1; phy_index < params->num_phys;  in bnx2x_link_reset()
12967 		      phy_index++) {  in bnx2x_link_reset()
12968 			if (params->phy[phy_index].link_reset) {  in bnx2x_link_reset()
12970 						  &params->phy[phy_index]);  in bnx2x_link_reset()
12971 				params->phy[phy_index].link_reset(  in bnx2x_link_reset()
12972 					&params->phy[phy_index],  in bnx2x_link_reset()
12975 			if (params->phy[phy_index].flags &  in bnx2x_link_reset()
13067 				      u32 shmem2_base_path[], u8 phy_index,  in bnx2x_8073_common_init_phy()  argument
13095 		if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_8073_common_init_phy()
13193 				      u32 shmem2_base_path[], u8 phy_index,  in bnx2x_8726_common_init_phy()  argument
13220 		if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_8726_common_init_phy()
13288 				      u32 shmem2_base_path[], u8 phy_index,  in bnx2x_8727_common_init_phy()  argument
13336 		if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_8727_common_init_phy()
13388 						u8 phy_index,  in bnx2x_84833_common_init_phy()  argument
13402 				     u32 shmem2_base_path[], u8 phy_index,  in bnx2x_ext_phy_common_init()  argument
13411 						phy_index, chip_id);  in bnx2x_ext_phy_common_init()
13418 						phy_index, chip_id);  in bnx2x_ext_phy_common_init()
13427 						phy_index, chip_id);  in bnx2x_ext_phy_common_init()
13437 						phy_index, chip_id);  in bnx2x_ext_phy_common_init()
13461 	u8 phy_index = 0;  in bnx2x_common_init_phy()  local
13483 	for (phy_index = EXT_PHY1; phy_index < MAX_PHYS;  in bnx2x_common_init_phy()
13484 	      phy_index++) {  in bnx2x_common_init_phy()
13487 							  phy_index, 0);  in bnx2x_common_init_phy()
13491 						phy_index, ext_phy_type,  in bnx2x_common_init_phy()
13841 	u8 phy_index, fan_failure_det_req = 0;  in bnx2x_fan_failure_det_req()  local
13843 	for (phy_index = EXT_PHY1; phy_index < MAX_PHYS;  in bnx2x_fan_failure_det_req()
13844 	      phy_index++) {  in bnx2x_fan_failure_det_req()
13845 		if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_fan_failure_det_req()
13859 	u8 phy_index;  in bnx2x_hw_reset_phy()  local
13868 	for (phy_index = INT_PHY; phy_index < MAX_PHYS;  in bnx2x_hw_reset_phy()
13869 	      phy_index++) {  in bnx2x_hw_reset_phy()
13870 		if (params->phy[phy_index].hw_reset) {  in bnx2x_hw_reset_phy()
13871 			params->phy[phy_index].hw_reset(  in bnx2x_hw_reset_phy()
13872 				&params->phy[phy_index],  in bnx2x_hw_reset_phy()
13874 			params->phy[phy_index] = phy_null;  in bnx2x_hw_reset_phy()
13883 	u8 gpio_num = 0xff, gpio_port = 0xff, phy_index;  in bnx2x_init_mod_abs_int()  local
13895 		for (phy_index = EXT_PHY1; phy_index < MAX_PHYS;  in bnx2x_init_mod_abs_int()
13896 		      phy_index++) {  in bnx2x_init_mod_abs_int()
13897 			if (bnx2x_populate_phy(bp, phy_index, shmem_base,  in bnx2x_init_mod_abs_int()