Lines Matching refs:params
33 struct link_params *params,
221 static int bnx2x_check_half_open_conn(struct link_params *params,
224 struct link_params *params);
252 static int bnx2x_check_lfa(struct link_params *params) in bnx2x_check_lfa() argument
257 struct bnx2x *bp = params->bp; in bnx2x_check_lfa()
260 REG_RD(bp, params->lfa_base + in bnx2x_check_lfa()
268 REG_WR(bp, params->lfa_base + in bnx2x_check_lfa()
275 link_status = REG_RD(bp, params->shmem_base + in bnx2x_check_lfa()
277 port_mb[params->port].link_status)); in bnx2x_check_lfa()
284 if (params->feature_config_flags & FEATURE_CONFIG_BOOT_FROM_SAN) in bnx2x_check_lfa()
288 if (params->loopback_mode) in bnx2x_check_lfa()
292 if (!params->lfa_base) in bnx2x_check_lfa()
295 if (params->num_phys == 3) { in bnx2x_check_lfa()
304 saved_val = REG_RD(bp, params->lfa_base + in bnx2x_check_lfa()
306 req_val = params->req_duplex[0] | (params->req_duplex[1] << 16); in bnx2x_check_lfa()
313 saved_val = REG_RD(bp, params->lfa_base + in bnx2x_check_lfa()
315 req_val = params->req_flow_ctrl[0] | (params->req_flow_ctrl[1] << 16); in bnx2x_check_lfa()
322 saved_val = REG_RD(bp, params->lfa_base + in bnx2x_check_lfa()
324 req_val = params->req_line_speed[0] | (params->req_line_speed[1] << 16); in bnx2x_check_lfa()
332 cur_speed_cap_mask = REG_RD(bp, params->lfa_base + in bnx2x_check_lfa()
336 if (cur_speed_cap_mask != params->speed_cap_mask[cfg_idx]) { in bnx2x_check_lfa()
339 params->speed_cap_mask[cfg_idx]); in bnx2x_check_lfa()
345 REG_RD(bp, params->lfa_base + in bnx2x_check_lfa()
349 if ((u16)cur_req_fc_auto_adv != params->req_fc_auto_adv) { in bnx2x_check_lfa()
351 cur_req_fc_auto_adv, params->req_fc_auto_adv); in bnx2x_check_lfa()
355 eee_status = REG_RD(bp, params->shmem2_base + in bnx2x_check_lfa()
357 eee_status[params->port])); in bnx2x_check_lfa()
360 (params->eee_mode & EEE_MODE_ENABLE_LPI)) || in bnx2x_check_lfa()
362 (params->eee_mode & EEE_MODE_ADV_LPI))) { in bnx2x_check_lfa()
363 DP(NETIF_MSG_LINK, "EEE mismatch %x vs. %x\n", params->eee_mode, in bnx2x_check_lfa()
446 static void bnx2x_ets_e2e3a0_disabled(struct link_params *params) in bnx2x_ets_e2e3a0_disabled() argument
449 struct bnx2x *bp = params->bp; in bnx2x_ets_e2e3a0_disabled()
537 const struct link_params *params, in bnx2x_ets_e3b0_set_credit_upper_bound_nig() argument
540 struct bnx2x *bp = params->bp; in bnx2x_ets_e3b0_set_credit_upper_bound_nig()
541 const u8 port = params->port; in bnx2x_ets_e3b0_set_credit_upper_bound_nig()
575 static void bnx2x_ets_e3b0_nig_disabled(const struct link_params *params, in bnx2x_ets_e3b0_nig_disabled() argument
578 struct bnx2x *bp = params->bp; in bnx2x_ets_e3b0_nig_disabled()
579 const u8 port = params->port; in bnx2x_ets_e3b0_nig_disabled()
651 bnx2x_ets_e3b0_set_credit_upper_bound_nig(params, min_w_val); in bnx2x_ets_e3b0_nig_disabled()
659 const struct link_params *params, in bnx2x_ets_e3b0_set_credit_upper_bound_pbf() argument
662 struct bnx2x *bp = params->bp; in bnx2x_ets_e3b0_set_credit_upper_bound_pbf()
665 const u8 port = params->port; in bnx2x_ets_e3b0_set_credit_upper_bound_pbf()
692 static void bnx2x_ets_e3b0_pbf_disabled(const struct link_params *params) in bnx2x_ets_e3b0_pbf_disabled() argument
694 struct bnx2x *bp = params->bp; in bnx2x_ets_e3b0_pbf_disabled()
695 const u8 port = params->port; in bnx2x_ets_e3b0_pbf_disabled()
743 bnx2x_ets_e3b0_set_credit_upper_bound_pbf(params, min_w_val_pbf); in bnx2x_ets_e3b0_pbf_disabled()
750 static int bnx2x_ets_e3b0_disabled(const struct link_params *params, in bnx2x_ets_e3b0_disabled() argument
753 struct bnx2x *bp = params->bp; in bnx2x_ets_e3b0_disabled()
761 bnx2x_ets_e3b0_nig_disabled(params, vars); in bnx2x_ets_e3b0_disabled()
763 bnx2x_ets_e3b0_pbf_disabled(params); in bnx2x_ets_e3b0_disabled()
773 int bnx2x_ets_disabled(struct link_params *params, in bnx2x_ets_disabled() argument
776 struct bnx2x *bp = params->bp; in bnx2x_ets_disabled()
780 bnx2x_ets_e2e3a0_disabled(params); in bnx2x_ets_disabled()
782 bnx2x_status = bnx2x_ets_e3b0_disabled(params, vars); in bnx2x_ets_disabled()
796 static int bnx2x_ets_e3b0_cli_map(const struct link_params *params, in bnx2x_ets_e3b0_cli_map() argument
801 struct bnx2x *bp = params->bp; in bnx2x_ets_e3b0_cli_map()
802 const u8 port = params->port; in bnx2x_ets_e3b0_cli_map()
903 const struct link_params *params, in bnx2x_ets_e3b0_get_total_bw() argument
907 struct bnx2x *bp = params->bp; in bnx2x_ets_e3b0_get_total_bw()
916 if (!ets_params->cos[cos_idx].params.bw_params.bw) { in bnx2x_ets_e3b0_get_total_bw()
922 ets_params->cos[cos_idx].params.bw_params.bw in bnx2x_ets_e3b0_get_total_bw()
926 ets_params->cos[cos_idx].params.bw_params.bw; in bnx2x_ets_e3b0_get_total_bw()
963 static int bnx2x_ets_e3b0_sp_pri_to_cos_set(const struct link_params *params, in bnx2x_ets_e3b0_sp_pri_to_cos_set() argument
967 struct bnx2x *bp = params->bp; in bnx2x_ets_e3b0_sp_pri_to_cos_set()
968 const u8 port = params->port; in bnx2x_ets_e3b0_sp_pri_to_cos_set()
1045 static int bnx2x_ets_e3b0_sp_set_pri_cli_reg(const struct link_params *params, in bnx2x_ets_e3b0_sp_set_pri_cli_reg() argument
1048 struct bnx2x *bp = params->bp; in bnx2x_ets_e3b0_sp_set_pri_cli_reg()
1050 const u8 port = params->port; in bnx2x_ets_e3b0_sp_set_pri_cli_reg()
1138 int bnx2x_ets_e3b0_config(const struct link_params *params, in bnx2x_ets_e3b0_config() argument
1142 struct bnx2x *bp = params->bp; in bnx2x_ets_e3b0_config()
1144 const u8 port = params->port; in bnx2x_ets_e3b0_config()
1171 bnx2x_status = bnx2x_ets_e3b0_get_total_bw(params, ets_params, in bnx2x_ets_e3b0_config()
1182 bnx2x_ets_e3b0_set_credit_upper_bound_nig(params, min_w_val_nig); in bnx2x_ets_e3b0_config()
1183 bnx2x_ets_e3b0_set_credit_upper_bound_pbf(params, min_w_val_pbf); in bnx2x_ets_e3b0_config()
1195 ets_params->cos[cos_entry].params.bw_params.bw, in bnx2x_ets_e3b0_config()
1202 params, in bnx2x_ets_e3b0_config()
1204 ets_params->cos[cos_entry].params.sp_params.pri, in bnx2x_ets_e3b0_config()
1220 bnx2x_status = bnx2x_ets_e3b0_sp_set_pri_cli_reg(params, in bnx2x_ets_e3b0_config()
1230 bnx2x_status = bnx2x_ets_e3b0_cli_map(params, ets_params, in bnx2x_ets_e3b0_config()
1240 static void bnx2x_ets_bw_limit_common(const struct link_params *params) in bnx2x_ets_bw_limit_common() argument
1243 struct bnx2x *bp = params->bp; in bnx2x_ets_bw_limit_common()
1284 void bnx2x_ets_bw_limit(const struct link_params *params, const u32 cos0_bw, in bnx2x_ets_bw_limit() argument
1288 struct bnx2x *bp = params->bp; in bnx2x_ets_bw_limit()
1307 bnx2x_ets_bw_limit_common(params); in bnx2x_ets_bw_limit()
1316 int bnx2x_ets_strict(const struct link_params *params, const u8 strict_cos) in bnx2x_ets_strict() argument
1319 struct bnx2x *bp = params->bp; in bnx2x_ets_strict()
1359 static void bnx2x_update_pfc_xmac(struct link_params *params, in bnx2x_update_pfc_xmac() argument
1363 struct bnx2x *bp = params->bp; in bnx2x_update_pfc_xmac()
1368 xmac_base = (params->port) ? GRCBASE_XMAC1 : GRCBASE_XMAC0; in bnx2x_update_pfc_xmac()
1376 if (!(params->feature_config_flags & in bnx2x_update_pfc_xmac()
1409 ((params->mac_addr[2] << 24) | in bnx2x_update_pfc_xmac()
1410 (params->mac_addr[3] << 16) | in bnx2x_update_pfc_xmac()
1411 (params->mac_addr[4] << 8) | in bnx2x_update_pfc_xmac()
1412 (params->mac_addr[5]))); in bnx2x_update_pfc_xmac()
1414 ((params->mac_addr[0] << 8) | in bnx2x_update_pfc_xmac()
1415 (params->mac_addr[1]))); in bnx2x_update_pfc_xmac()
1454 struct link_params *params) in bnx2x_set_mdio_emac_per_phy() argument
1458 for (phy_index = INT_PHY; phy_index < params->num_phys; in bnx2x_set_mdio_emac_per_phy()
1460 bnx2x_set_mdio_clk(bp, params->chip_id, in bnx2x_set_mdio_emac_per_phy()
1461 params->phy[phy_index].mdio_ctrl); in bnx2x_set_mdio_emac_per_phy()
1477 static void bnx2x_emac_init(struct link_params *params, in bnx2x_emac_init() argument
1481 struct bnx2x *bp = params->bp; in bnx2x_emac_init()
1482 u8 port = params->port; in bnx2x_emac_init()
1509 bnx2x_set_mdio_emac_per_phy(bp, params); in bnx2x_emac_init()
1511 val = ((params->mac_addr[0] << 8) | in bnx2x_emac_init()
1512 params->mac_addr[1]); in bnx2x_emac_init()
1515 val = ((params->mac_addr[2] << 24) | in bnx2x_emac_init()
1516 (params->mac_addr[3] << 16) | in bnx2x_emac_init()
1517 (params->mac_addr[4] << 8) | in bnx2x_emac_init()
1518 params->mac_addr[5]); in bnx2x_emac_init()
1522 static void bnx2x_set_xumac_nig(struct link_params *params, in bnx2x_set_xumac_nig() argument
1526 struct bnx2x *bp = params->bp; in bnx2x_set_xumac_nig()
1528 REG_WR(bp, params->port ? NIG_REG_P1_MAC_IN_EN : NIG_REG_P0_MAC_IN_EN, in bnx2x_set_xumac_nig()
1530 REG_WR(bp, params->port ? NIG_REG_P1_MAC_OUT_EN : NIG_REG_P0_MAC_OUT_EN, in bnx2x_set_xumac_nig()
1532 REG_WR(bp, params->port ? NIG_REG_P1_MAC_PAUSE_OUT_EN : in bnx2x_set_xumac_nig()
1536 static void bnx2x_set_umac_rxtx(struct link_params *params, u8 en) in bnx2x_set_umac_rxtx() argument
1538 u32 umac_base = params->port ? GRCBASE_UMAC1 : GRCBASE_UMAC0; in bnx2x_set_umac_rxtx()
1540 struct bnx2x *bp = params->bp; in bnx2x_set_umac_rxtx()
1542 (MISC_REGISTERS_RESET_REG_2_UMAC0 << params->port))) in bnx2x_set_umac_rxtx()
1555 static void bnx2x_umac_enable(struct link_params *params, in bnx2x_umac_enable() argument
1559 u32 umac_base = params->port ? GRCBASE_UMAC1 : GRCBASE_UMAC0; in bnx2x_umac_enable()
1560 struct bnx2x *bp = params->bp; in bnx2x_umac_enable()
1563 (MISC_REGISTERS_RESET_REG_2_UMAC0 << params->port)); in bnx2x_umac_enable()
1567 (MISC_REGISTERS_RESET_REG_2_UMAC0 << params->port)); in bnx2x_umac_enable()
1572 REG_WR(bp, NIG_REG_EGRESS_EMAC0_PORT + params->port*4, 1); in bnx2x_umac_enable()
1620 ((params->mac_addr[2] << 24) | in bnx2x_umac_enable()
1621 (params->mac_addr[3] << 16) | in bnx2x_umac_enable()
1622 (params->mac_addr[4] << 8) | in bnx2x_umac_enable()
1623 (params->mac_addr[5]))); in bnx2x_umac_enable()
1625 ((params->mac_addr[0] << 8) | in bnx2x_umac_enable()
1626 (params->mac_addr[1]))); in bnx2x_umac_enable()
1647 bnx2x_set_xumac_nig(params, in bnx2x_umac_enable()
1654 static void bnx2x_xmac_init(struct link_params *params, u32 max_speed) in bnx2x_xmac_init() argument
1656 struct bnx2x *bp = params->bp; in bnx2x_xmac_init()
1716 static void bnx2x_set_xmac_rxtx(struct link_params *params, u8 en) in bnx2x_set_xmac_rxtx() argument
1718 u8 port = params->port; in bnx2x_set_xmac_rxtx()
1719 struct bnx2x *bp = params->bp; in bnx2x_set_xmac_rxtx()
1744 static int bnx2x_xmac_enable(struct link_params *params, in bnx2x_xmac_enable() argument
1748 struct bnx2x *bp = params->bp; in bnx2x_xmac_enable()
1751 xmac_base = (params->port) ? GRCBASE_XMAC1 : GRCBASE_XMAC0; in bnx2x_xmac_enable()
1753 bnx2x_xmac_init(params, vars->line_speed); in bnx2x_xmac_enable()
1762 REG_WR(bp, NIG_REG_EGRESS_EMAC0_PORT + params->port*4, 0); in bnx2x_xmac_enable()
1767 if (!(params->phy[INT_PHY].flags & FLAGS_TX_ERROR_CHECK)) { in bnx2x_xmac_enable()
1783 bnx2x_update_pfc_xmac(params, vars, 0); in bnx2x_xmac_enable()
1798 (params->phy[INT_PHY].supported & in bnx2x_xmac_enable()
1806 bnx2x_set_xumac_nig(params, in bnx2x_xmac_enable()
1814 static int bnx2x_emac_enable(struct link_params *params, in bnx2x_emac_enable() argument
1817 struct bnx2x *bp = params->bp; in bnx2x_emac_enable()
1818 u8 port = params->port; in bnx2x_emac_enable()
1833 u32 ser_lane = ((params->lane_config & in bnx2x_emac_enable()
1861 if (!(params->feature_config_flags & in bnx2x_emac_enable()
1889 if (params->feature_config_flags & FEATURE_CONFIG_PFC_ENABLED) { in bnx2x_emac_enable()
1933 if ((params->feature_config_flags & in bnx2x_emac_enable()
1947 static void bnx2x_update_pfc_bmac1(struct link_params *params, in bnx2x_update_pfc_bmac1() argument
1951 struct bnx2x *bp = params->bp; in bnx2x_update_pfc_bmac1()
1952 u32 bmac_addr = params->port ? NIG_REG_INGRESS_BMAC1_MEM : in bnx2x_update_pfc_bmac1()
1956 if ((!(params->feature_config_flags & in bnx2x_update_pfc_bmac1()
1967 if (!(params->feature_config_flags & in bnx2x_update_pfc_bmac1()
1976 static void bnx2x_update_pfc_bmac2(struct link_params *params, in bnx2x_update_pfc_bmac2() argument
1984 struct bnx2x *bp = params->bp; in bnx2x_update_pfc_bmac2()
1985 u32 bmac_addr = params->port ? NIG_REG_INGRESS_BMAC1_MEM : in bnx2x_update_pfc_bmac2()
1989 if ((!(params->feature_config_flags & in bnx2x_update_pfc_bmac2()
2001 if (!(params->feature_config_flags & in bnx2x_update_pfc_bmac2()
2009 if (params->feature_config_flags & FEATURE_CONFIG_PFC_ENABLED) { in bnx2x_update_pfc_bmac2()
2038 if (params->feature_config_flags & FEATURE_CONFIG_PFC_ENABLED) in bnx2x_update_pfc_bmac2()
2053 if (params->feature_config_flags & FEATURE_CONFIG_PFC_ENABLED) in bnx2x_update_pfc_bmac2()
2109 static void bnx2x_update_mng(struct link_params *params, u32 link_status) in bnx2x_update_mng() argument
2111 struct bnx2x *bp = params->bp; in bnx2x_update_mng()
2113 REG_WR(bp, params->shmem_base + in bnx2x_update_mng()
2115 port_mb[params->port].link_status), link_status); in bnx2x_update_mng()
2118 static void bnx2x_update_link_attr(struct link_params *params, u32 link_attr) in bnx2x_update_link_attr() argument
2120 struct bnx2x *bp = params->bp; in bnx2x_update_link_attr()
2123 REG_WR(bp, params->shmem2_base + in bnx2x_update_link_attr()
2125 link_attr_sync[params->port]), link_attr); in bnx2x_update_link_attr()
2128 static void bnx2x_update_pfc_nig(struct link_params *params, in bnx2x_update_pfc_nig() argument
2135 struct bnx2x *bp = params->bp; in bnx2x_update_pfc_nig()
2136 u8 port = params->port; in bnx2x_update_pfc_nig()
2138 int set_pfc = params->feature_config_flags & in bnx2x_update_pfc_nig()
2224 int bnx2x_update_pfc(struct link_params *params, in bnx2x_update_pfc() argument
2233 struct bnx2x *bp = params->bp; in bnx2x_update_pfc()
2234 u8 bmac_loopback = (params->loopback_mode == LOOPBACK_BMAC); in bnx2x_update_pfc()
2236 if (params->feature_config_flags & FEATURE_CONFIG_PFC_ENABLED) in bnx2x_update_pfc()
2241 bnx2x_update_mng(params, vars->link_status); in bnx2x_update_pfc()
2244 bnx2x_update_pfc_nig(params, vars, pfc_params); in bnx2x_update_pfc()
2253 bnx2x_update_pfc_xmac(params, vars, 0); in bnx2x_update_pfc()
2257 (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << params->port)) in bnx2x_update_pfc()
2260 bnx2x_emac_enable(params, vars, 0); in bnx2x_update_pfc()
2264 bnx2x_update_pfc_bmac2(params, vars, bmac_loopback); in bnx2x_update_pfc()
2266 bnx2x_update_pfc_bmac1(params, vars); in bnx2x_update_pfc()
2269 if ((params->feature_config_flags & in bnx2x_update_pfc()
2273 REG_WR(bp, NIG_REG_BMAC0_PAUSE_OUT_EN + params->port*4, val); in bnx2x_update_pfc()
2278 static int bnx2x_bmac1_enable(struct link_params *params, in bnx2x_bmac1_enable() argument
2282 struct bnx2x *bp = params->bp; in bnx2x_bmac1_enable()
2283 u8 port = params->port; in bnx2x_bmac1_enable()
2298 wb_data[0] = ((params->mac_addr[2] << 24) | in bnx2x_bmac1_enable()
2299 (params->mac_addr[3] << 16) | in bnx2x_bmac1_enable()
2300 (params->mac_addr[4] << 8) | in bnx2x_bmac1_enable()
2301 params->mac_addr[5]); in bnx2x_bmac1_enable()
2302 wb_data[1] = ((params->mac_addr[0] << 8) | in bnx2x_bmac1_enable()
2303 params->mac_addr[1]); in bnx2x_bmac1_enable()
2321 bnx2x_update_pfc_bmac1(params, vars); in bnx2x_bmac1_enable()
2342 static int bnx2x_bmac2_enable(struct link_params *params, in bnx2x_bmac2_enable() argument
2346 struct bnx2x *bp = params->bp; in bnx2x_bmac2_enable()
2347 u8 port = params->port; in bnx2x_bmac2_enable()
2368 wb_data[0] = ((params->mac_addr[2] << 24) | in bnx2x_bmac2_enable()
2369 (params->mac_addr[3] << 16) | in bnx2x_bmac2_enable()
2370 (params->mac_addr[4] << 8) | in bnx2x_bmac2_enable()
2371 params->mac_addr[5]); in bnx2x_bmac2_enable()
2372 wb_data[1] = ((params->mac_addr[0] << 8) | in bnx2x_bmac2_enable()
2373 params->mac_addr[1]); in bnx2x_bmac2_enable()
2402 bnx2x_update_pfc_bmac2(params, vars, is_lb); in bnx2x_bmac2_enable()
2407 static int bnx2x_bmac_enable(struct link_params *params, in bnx2x_bmac_enable() argument
2412 u8 port = params->port; in bnx2x_bmac_enable()
2413 struct bnx2x *bp = params->bp; in bnx2x_bmac_enable()
2430 rc = bnx2x_bmac2_enable(params, vars, is_lb); in bnx2x_bmac_enable()
2432 rc = bnx2x_bmac1_enable(params, vars, is_lb); in bnx2x_bmac_enable()
2437 if ((params->feature_config_flags & in bnx2x_bmac_enable()
2478 static int bnx2x_pbf_update(struct link_params *params, u32 flow_ctrl, in bnx2x_pbf_update() argument
2481 struct bnx2x *bp = params->bp; in bnx2x_pbf_update()
2482 u8 port = params->port; in bnx2x_pbf_update()
2826 static u8 bnx2x_eee_has_cap(struct link_params *params) in bnx2x_eee_has_cap() argument
2828 struct bnx2x *bp = params->bp; in bnx2x_eee_has_cap()
2830 if (REG_RD(bp, params->shmem2_base) <= in bnx2x_eee_has_cap()
2831 offsetof(struct shmem2_region, eee_status[params->port])) in bnx2x_eee_has_cap()
2877 static u32 bnx2x_eee_calc_timer(struct link_params *params) in bnx2x_eee_calc_timer() argument
2880 struct bnx2x *bp = params->bp; in bnx2x_eee_calc_timer()
2882 if (params->eee_mode & EEE_MODE_OVERRIDE_NVRAM) { in bnx2x_eee_calc_timer()
2883 if (params->eee_mode & EEE_MODE_OUTPUT_TIME) { in bnx2x_eee_calc_timer()
2885 eee_idle = params->eee_mode & EEE_MODE_TIMER_MASK; in bnx2x_eee_calc_timer()
2888 if (bnx2x_eee_nvram_to_time(params->eee_mode & in bnx2x_eee_calc_timer()
2895 eee_mode = ((REG_RD(bp, params->shmem_base + in bnx2x_eee_calc_timer()
2897 port_feature_config[params->port]. in bnx2x_eee_calc_timer()
2909 static int bnx2x_eee_set_timers(struct link_params *params, in bnx2x_eee_set_timers() argument
2913 struct bnx2x *bp = params->bp; in bnx2x_eee_set_timers()
2915 eee_idle = bnx2x_eee_calc_timer(params); in bnx2x_eee_set_timers()
2918 REG_WR(bp, MISC_REG_CPMU_LP_IDLE_THR_P0 + (params->port << 2), in bnx2x_eee_set_timers()
2920 } else if ((params->eee_mode & EEE_MODE_ENABLE_LPI) && in bnx2x_eee_set_timers()
2921 (params->eee_mode & EEE_MODE_OVERRIDE_NVRAM) && in bnx2x_eee_set_timers()
2922 (params->eee_mode & EEE_MODE_OUTPUT_TIME)) { in bnx2x_eee_set_timers()
2928 if (params->eee_mode & EEE_MODE_OUTPUT_TIME) { in bnx2x_eee_set_timers()
2942 static int bnx2x_eee_initial_config(struct link_params *params, in bnx2x_eee_initial_config() argument
2948 if (params->eee_mode & EEE_MODE_ENABLE_LPI) in bnx2x_eee_initial_config()
2953 if (params->eee_mode & EEE_MODE_ADV_LPI) in bnx2x_eee_initial_config()
2958 return bnx2x_eee_set_timers(params, vars); in bnx2x_eee_initial_config()
2962 struct link_params *params, in bnx2x_eee_disable() argument
2965 struct bnx2x *bp = params->bp; in bnx2x_eee_disable()
2968 REG_WR(bp, MISC_REG_CPMU_LP_FW_ENABLE_P0 + (params->port << 2), 0); in bnx2x_eee_disable()
2978 struct link_params *params, in bnx2x_eee_advertise() argument
2981 struct bnx2x *bp = params->bp; in bnx2x_eee_advertise()
2985 REG_WR(bp, MISC_REG_CPMU_LP_MASK_EXT_P0 + (params->port << 2), 0xfc20); in bnx2x_eee_advertise()
3004 static void bnx2x_update_mng_eee(struct link_params *params, u32 eee_status) in bnx2x_update_mng_eee() argument
3006 struct bnx2x *bp = params->bp; in bnx2x_update_mng_eee()
3008 if (bnx2x_eee_has_cap(params)) in bnx2x_update_mng_eee()
3009 REG_WR(bp, params->shmem2_base + in bnx2x_update_mng_eee()
3011 eee_status[params->port]), eee_status); in bnx2x_update_mng_eee()
3015 struct link_params *params, in bnx2x_eee_an_resolve() argument
3018 struct bnx2x *bp = params->bp; in bnx2x_eee_an_resolve()
3064 static void bnx2x_bsc_module_sel(struct link_params *params) in bnx2x_bsc_module_sel() argument
3069 struct bnx2x *bp = params->bp; in bnx2x_bsc_module_sel()
3070 u8 port = params->port; in bnx2x_bsc_module_sel()
3072 board_cfg = REG_RD(bp, params->shmem_base + in bnx2x_bsc_module_sel()
3080 sfp_ctrl = REG_RD(bp, params->shmem_base + in bnx2x_bsc_module_sel()
3090 static int bnx2x_bsc_read(struct link_params *params, in bnx2x_bsc_read() argument
3106 bnx2x_bsc_module_sel(params); in bnx2x_bsc_read()
3194 int bnx2x_phy_read(struct link_params *params, u8 phy_addr, in bnx2x_phy_read() argument
3201 for (phy_index = 0; phy_index < params->num_phys; phy_index++) { in bnx2x_phy_read()
3202 if (params->phy[phy_index].addr == phy_addr) { in bnx2x_phy_read()
3203 return bnx2x_cl45_read(params->bp, in bnx2x_phy_read()
3204 ¶ms->phy[phy_index], devad, in bnx2x_phy_read()
3211 int bnx2x_phy_write(struct link_params *params, u8 phy_addr, in bnx2x_phy_write() argument
3218 for (phy_index = 0; phy_index < params->num_phys; phy_index++) { in bnx2x_phy_write()
3219 if (params->phy[phy_index].addr == phy_addr) { in bnx2x_phy_write()
3220 return bnx2x_cl45_write(params->bp, in bnx2x_phy_write()
3221 ¶ms->phy[phy_index], devad, in bnx2x_phy_write()
3228 struct link_params *params) in bnx2x_get_warpcore_lane() argument
3231 struct bnx2x *bp = params->bp; in bnx2x_get_warpcore_lane()
3236 port = params->port; in bnx2x_get_warpcore_lane()
3281 static void bnx2x_set_aer_mmd(struct link_params *params, in bnx2x_set_aer_mmd() argument
3286 struct bnx2x *bp = params->bp; in bnx2x_set_aer_mmd()
3287 ser_lane = ((params->lane_config & in bnx2x_set_aer_mmd()
3295 aer_val = bnx2x_get_warpcore_lane(phy, params); in bnx2x_set_aer_mmd()
3352 struct link_params *params, in bnx2x_xgxs_specific_func() argument
3355 struct bnx2x *bp = params->bp; in bnx2x_xgxs_specific_func()
3359 REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_ST + params->port*0x18, 0); in bnx2x_xgxs_specific_func()
3360 REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_DEVAD + params->port*0x18, in bnx2x_xgxs_specific_func()
3366 static void bnx2x_xgxs_deassert(struct link_params *params) in bnx2x_xgxs_deassert() argument
3368 struct bnx2x *bp = params->bp; in bnx2x_xgxs_deassert()
3372 port = params->port; in bnx2x_xgxs_deassert()
3380 bnx2x_xgxs_specific_func(¶ms->phy[INT_PHY], params, in bnx2x_xgxs_deassert()
3385 struct link_params *params, u16 *ieee_fc) in bnx2x_calc_ieee_aneg_adv() argument
3387 struct bnx2x *bp = params->bp; in bnx2x_calc_ieee_aneg_adv()
3395 switch (params->req_fc_auto_adv) { in bnx2x_calc_ieee_aneg_adv()
3425 static void set_phy_vars(struct link_params *params, in set_phy_vars() argument
3428 struct bnx2x *bp = params->bp; in set_phy_vars()
3430 u8 phy_config_swapped = params->multi_phy_config & in set_phy_vars()
3432 for (phy_index = INT_PHY; phy_index < params->num_phys; in set_phy_vars()
3442 params->phy[actual_phy_idx].req_flow_ctrl = in set_phy_vars()
3443 params->req_flow_ctrl[link_cfg_idx]; in set_phy_vars()
3445 params->phy[actual_phy_idx].req_line_speed = in set_phy_vars()
3446 params->req_line_speed[link_cfg_idx]; in set_phy_vars()
3448 params->phy[actual_phy_idx].speed_cap_mask = in set_phy_vars()
3449 params->speed_cap_mask[link_cfg_idx]; in set_phy_vars()
3451 params->phy[actual_phy_idx].req_duplex = in set_phy_vars()
3452 params->req_duplex[link_cfg_idx]; in set_phy_vars()
3454 if (params->req_line_speed[link_cfg_idx] == in set_phy_vars()
3460 params->phy[actual_phy_idx].req_flow_ctrl, in set_phy_vars()
3461 params->phy[actual_phy_idx].req_line_speed, in set_phy_vars()
3462 params->phy[actual_phy_idx].speed_cap_mask); in set_phy_vars()
3466 static void bnx2x_ext_phy_set_pause(struct link_params *params, in bnx2x_ext_phy_set_pause() argument
3471 struct bnx2x *bp = params->bp; in bnx2x_ext_phy_set_pause()
3478 bnx2x_calc_ieee_aneg_adv(phy, params, &vars->ieee_fc); in bnx2x_ext_phy_set_pause()
3494 struct link_params *params, in bnx2x_pause_resolve() argument
3498 struct bnx2x *bp = params->bp; in bnx2x_pause_resolve()
3519 if (params->req_fc_auto_adv == BNX2X_FLOW_CTRL_BOTH) { in bnx2x_pause_resolve()
3541 struct link_params *params, in bnx2x_ext_phy_update_adv_fc() argument
3547 struct bnx2x *bp = params->bp; in bnx2x_ext_phy_update_adv_fc()
3552 SINGLE_MEDIA_DIRECT(params)) { in bnx2x_ext_phy_update_adv_fc()
3553 u8 lane = bnx2x_get_warpcore_lane(phy, params); in bnx2x_ext_phy_update_adv_fc()
3591 bnx2x_pause_resolve(phy, params, vars, pause_result); in bnx2x_ext_phy_update_adv_fc()
3596 struct link_params *params, in bnx2x_ext_phy_resolve_fc() argument
3604 bnx2x_ext_phy_update_adv_fc(phy, params, vars); in bnx2x_ext_phy_resolve_fc()
3608 vars->flow_ctrl = params->req_fc_auto_adv; in bnx2x_ext_phy_resolve_fc()
3611 bnx2x_ext_phy_update_adv_fc(phy, params, vars); in bnx2x_ext_phy_resolve_fc()
3635 struct link_params *params, in bnx2x_warpcore_enable_AN_KR2() argument
3638 struct bnx2x *bp = params->bp; in bnx2x_warpcore_enable_AN_KR2()
3669 params->link_attr_sync |= LINK_ATTR_SYNC_KR2_ENABLE; in bnx2x_warpcore_enable_AN_KR2()
3670 bnx2x_update_link_attr(params, params->link_attr_sync); in bnx2x_warpcore_enable_AN_KR2()
3673 static void bnx2x_disable_kr2(struct link_params *params, in bnx2x_disable_kr2() argument
3677 struct bnx2x *bp = params->bp; in bnx2x_disable_kr2()
3702 params->link_attr_sync &= ~LINK_ATTR_SYNC_KR2_ENABLE; in bnx2x_disable_kr2()
3703 bnx2x_update_link_attr(params, params->link_attr_sync); in bnx2x_disable_kr2()
3709 struct link_params *params) in bnx2x_warpcore_set_lpi_passthrough() argument
3711 struct bnx2x *bp = params->bp; in bnx2x_warpcore_set_lpi_passthrough()
3721 struct link_params *params) in bnx2x_warpcore_restart_AN_KR() argument
3724 struct bnx2x *bp = params->bp; in bnx2x_warpcore_restart_AN_KR()
3725 u16 lane = bnx2x_get_warpcore_lane(phy, params); in bnx2x_warpcore_restart_AN_KR()
3732 bnx2x_set_aer_mmd(params, phy); in bnx2x_warpcore_restart_AN_KR()
3736 struct link_params *params, in bnx2x_warpcore_enable_AN_KR() argument
3740 struct bnx2x *bp = params->bp; in bnx2x_warpcore_enable_AN_KR()
3786 bnx2x_set_aer_mmd(params, phy); in bnx2x_warpcore_enable_AN_KR()
3791 lane = bnx2x_get_warpcore_lane(phy, params); in bnx2x_warpcore_enable_AN_KR()
3818 if (REG_RD(bp, params->shmem_base + in bnx2x_warpcore_enable_AN_KR()
3820 port_hw_config[params->port].default_cfg)) & in bnx2x_warpcore_enable_AN_KR()
3829 bnx2x_ext_phy_set_pause(params, phy, vars); in bnx2x_warpcore_enable_AN_KR()
3851 bnx2x_set_aer_mmd(params, phy); in bnx2x_warpcore_enable_AN_KR()
3853 bnx2x_warpcore_enable_AN_KR2(phy, params, vars); in bnx2x_warpcore_enable_AN_KR()
3858 wc_lane_config = REG_RD(bp, params->shmem_base + in bnx2x_warpcore_enable_AN_KR()
3880 bnx2x_disable_kr2(params, vars, phy); in bnx2x_warpcore_enable_AN_KR()
3884 bnx2x_warpcore_restart_AN_KR(phy, params); in bnx2x_warpcore_enable_AN_KR()
3888 struct link_params *params, in bnx2x_warpcore_set_10G_KR() argument
3891 struct bnx2x *bp = params->bp; in bnx2x_warpcore_set_10G_KR()
3910 lane = bnx2x_get_warpcore_lane(phy, params); in bnx2x_warpcore_set_10G_KR()
3927 bnx2x_set_aer_mmd(params, phy); in bnx2x_warpcore_set_10G_KR()
3956 struct link_params *params, in bnx2x_warpcore_set_10G_XFI() argument
3959 struct bnx2x *bp = params->bp; in bnx2x_warpcore_set_10G_XFI()
4010 cfg_tap_val = REG_RD(bp, params->shmem_base + in bnx2x_warpcore_set_10G_XFI()
4012 port_hw_config[params->port]. in bnx2x_warpcore_set_10G_XFI()
4060 lane = bnx2x_get_warpcore_lane(phy, params); in bnx2x_warpcore_set_10G_XFI()
4076 bnx2x_warpcore_set_lpi_passthrough(phy, params); in bnx2x_warpcore_set_10G_XFI()
4092 struct link_params *params) in bnx2x_warpcore_set_20G_force_KR2() argument
4095 struct bnx2x *bp = params->bp; in bnx2x_warpcore_set_20G_force_KR2()
4104 bnx2x_set_aer_mmd(params, phy); in bnx2x_warpcore_set_20G_force_KR2()
4141 bnx2x_set_aer_mmd(params, phy); in bnx2x_warpcore_set_20G_force_KR2()
4199 struct link_params *params, in bnx2x_warpcore_set_sgmii_speed() argument
4203 struct bnx2x *bp = params->bp; in bnx2x_warpcore_set_sgmii_speed()
4210 bnx2x_warpcore_set_lpi_passthrough(phy, params); in bnx2x_warpcore_set_sgmii_speed()
4299 struct link_params *params, in bnx2x_warpcore_clear_regs() argument
4302 struct bnx2x *bp = params->bp; in bnx2x_warpcore_clear_regs()
4328 lane = bnx2x_get_warpcore_lane(phy, params); in bnx2x_warpcore_clear_regs()
4374 struct link_params *params) in bnx2x_is_sfp_module_plugged() argument
4376 struct bnx2x *bp = params->bp; in bnx2x_is_sfp_module_plugged()
4379 if (bnx2x_get_mod_abs_int_cfg(bp, params->chip_id, in bnx2x_is_sfp_module_plugged()
4380 params->shmem_base, params->port, in bnx2x_is_sfp_module_plugged()
4392 struct link_params *params) in bnx2x_warpcore_get_sigdet() argument
4395 struct bnx2x *bp = params->bp; in bnx2x_warpcore_get_sigdet()
4397 lane = bnx2x_get_warpcore_lane(phy, params); in bnx2x_warpcore_get_sigdet()
4406 struct link_params *params, in bnx2x_warpcore_config_runtime() argument
4409 struct bnx2x *bp = params->bp; in bnx2x_warpcore_config_runtime()
4419 u16 lane = bnx2x_get_warpcore_lane(phy, params); in bnx2x_warpcore_config_runtime()
4420 serdes_net_if = (REG_RD(bp, params->shmem_base + in bnx2x_warpcore_config_runtime()
4422 port_hw_config[params->port].default_cfg)) & in bnx2x_warpcore_config_runtime()
4459 struct link_params *params) in bnx2x_warpcore_config_sfi() argument
4461 u16 lane = bnx2x_get_warpcore_lane(phy, params); in bnx2x_warpcore_config_sfi()
4462 struct bnx2x *bp = params->bp; in bnx2x_warpcore_config_sfi()
4463 bnx2x_warpcore_clear_regs(phy, params, lane); in bnx2x_warpcore_config_sfi()
4464 if ((params->req_line_speed[LINK_CONFIG_IDX(INT_PHY)] == in bnx2x_warpcore_config_sfi()
4468 bnx2x_warpcore_set_10G_XFI(phy, params, 0); in bnx2x_warpcore_config_sfi()
4471 bnx2x_warpcore_set_sgmii_speed(phy, params, 1, 0); in bnx2x_warpcore_config_sfi()
4475 static void bnx2x_sfp_e3_set_transmitter(struct link_params *params, in bnx2x_sfp_e3_set_transmitter() argument
4479 struct bnx2x *bp = params->bp; in bnx2x_sfp_e3_set_transmitter()
4481 u8 port = params->port; in bnx2x_sfp_e3_set_transmitter()
4483 cfg_pin = REG_RD(bp, params->shmem_base + in bnx2x_sfp_e3_set_transmitter()
4497 struct link_params *params, in bnx2x_warpcore_config_init() argument
4500 struct bnx2x *bp = params->bp; in bnx2x_warpcore_config_init()
4503 u16 lane = bnx2x_get_warpcore_lane(phy, params); in bnx2x_warpcore_config_init()
4504 serdes_net_if = (REG_RD(bp, params->shmem_base + in bnx2x_warpcore_config_init()
4506 port_hw_config[params->port].default_cfg)) & in bnx2x_warpcore_config_init()
4511 bnx2x_set_aer_mmd(params, phy); in bnx2x_warpcore_config_init()
4520 bnx2x_warpcore_clear_regs(phy, params, lane); in bnx2x_warpcore_config_init()
4521 bnx2x_warpcore_set_sgmii_speed(phy, params, 0, 1); in bnx2x_warpcore_config_init()
4526 if (params->loopback_mode != LOOPBACK_EXT) in bnx2x_warpcore_config_init()
4527 bnx2x_warpcore_enable_AN_KR(phy, params, vars); in bnx2x_warpcore_config_init()
4530 bnx2x_warpcore_set_10G_KR(phy, params, vars); in bnx2x_warpcore_config_init()
4535 bnx2x_warpcore_clear_regs(phy, params, lane); in bnx2x_warpcore_config_init()
4538 bnx2x_warpcore_set_10G_XFI(phy, params, 1); in bnx2x_warpcore_config_init()
4540 if (SINGLE_MEDIA_DIRECT(params)) { in bnx2x_warpcore_config_init()
4548 params, in bnx2x_warpcore_config_init()
4560 if ((params->loopback_mode == LOOPBACK_NONE) || in bnx2x_warpcore_config_init()
4561 (params->loopback_mode == LOOPBACK_EXT)) { in bnx2x_warpcore_config_init()
4562 if (bnx2x_is_sfp_module_plugged(phy, params)) in bnx2x_warpcore_config_init()
4563 bnx2x_sfp_module_detection(phy, params); in bnx2x_warpcore_config_init()
4565 bnx2x_sfp_e3_set_transmitter(params, in bnx2x_warpcore_config_init()
4569 bnx2x_warpcore_config_sfi(phy, params); in bnx2x_warpcore_config_init()
4581 bnx2x_sfp_module_detection(phy, params); in bnx2x_warpcore_config_init()
4584 if (!params->loopback_mode) { in bnx2x_warpcore_config_init()
4585 bnx2x_warpcore_enable_AN_KR(phy, params, vars); in bnx2x_warpcore_config_init()
4588 bnx2x_warpcore_set_20G_force_KR2(phy, params); in bnx2x_warpcore_config_init()
4605 struct link_params *params) in bnx2x_warpcore_link_reset() argument
4607 struct bnx2x *bp = params->bp; in bnx2x_warpcore_link_reset()
4609 bnx2x_sfp_e3_set_transmitter(params, phy, 0); in bnx2x_warpcore_link_reset()
4610 bnx2x_set_mdio_emac_per_phy(bp, params); in bnx2x_warpcore_link_reset()
4611 bnx2x_set_aer_mmd(params, phy); in bnx2x_warpcore_link_reset()
4633 lane = bnx2x_get_warpcore_lane(phy, params); in bnx2x_warpcore_link_reset()
4655 bnx2x_set_aer_mmd(params, phy); in bnx2x_warpcore_link_reset()
4660 struct link_params *params) in bnx2x_set_warpcore_loopback() argument
4662 struct bnx2x *bp = params->bp; in bnx2x_set_warpcore_loopback()
4666 params->loopback_mode, phy->req_line_speed); in bnx2x_set_warpcore_loopback()
4680 lane = bnx2x_get_warpcore_lane(phy, params); in bnx2x_set_warpcore_loopback()
4691 bnx2x_set_aer_mmd(params, phy); in bnx2x_set_warpcore_loopback()
4704 static void bnx2x_sync_link(struct link_params *params, in bnx2x_sync_link() argument
4707 struct bnx2x *bp = params->bp; in bnx2x_sync_link()
4810 void bnx2x_link_status_update(struct link_params *params, in bnx2x_link_status_update() argument
4813 struct bnx2x *bp = params->bp; in bnx2x_link_status_update()
4814 u8 port = params->port; in bnx2x_link_status_update()
4817 set_phy_vars(params, vars); in bnx2x_link_status_update()
4819 vars->link_status = REG_RD(bp, params->shmem_base + in bnx2x_link_status_update()
4824 if (params->loopback_mode != LOOPBACK_NONE && in bnx2x_link_status_update()
4825 params->loopback_mode != LOOPBACK_EXT) in bnx2x_link_status_update()
4828 if (bnx2x_eee_has_cap(params)) in bnx2x_link_status_update()
4829 vars->eee_status = REG_RD(bp, params->shmem2_base + in bnx2x_link_status_update()
4831 eee_status[params->port])); in bnx2x_link_status_update()
4834 bnx2x_sync_link(params, vars); in bnx2x_link_status_update()
4836 sync_offset = params->shmem_base + in bnx2x_link_status_update()
4841 params->phy[INT_PHY].media_type = in bnx2x_link_status_update()
4844 params->phy[EXT_PHY1].media_type = in bnx2x_link_status_update()
4847 params->phy[EXT_PHY2].media_type = in bnx2x_link_status_update()
4853 sync_offset = params->shmem_base + in bnx2x_link_status_update()
4861 params->feature_config_flags |= in bnx2x_link_status_update()
4864 params->feature_config_flags &= in bnx2x_link_status_update()
4868 params->link_attr_sync = SHMEM2_RD(bp, in bnx2x_link_status_update()
4869 link_attr_sync[params->port]); in bnx2x_link_status_update()
4877 static void bnx2x_set_master_ln(struct link_params *params, in bnx2x_set_master_ln() argument
4880 struct bnx2x *bp = params->bp; in bnx2x_set_master_ln()
4882 ser_lane = ((params->lane_config & in bnx2x_set_master_ln()
4898 static int bnx2x_reset_unicore(struct link_params *params, in bnx2x_reset_unicore() argument
4902 struct bnx2x *bp = params->bp; in bnx2x_reset_unicore()
4916 bnx2x_set_serdes_access(bp, params->port); in bnx2x_reset_unicore()
4936 params->port); in bnx2x_reset_unicore()
4942 static void bnx2x_set_swap_lanes(struct link_params *params, in bnx2x_set_swap_lanes() argument
4945 struct bnx2x *bp = params->bp; in bnx2x_set_swap_lanes()
4951 rx_lane_swap = ((params->lane_config & in bnx2x_set_swap_lanes()
4954 tx_lane_swap = ((params->lane_config & in bnx2x_set_swap_lanes()
4985 struct link_params *params) in bnx2x_set_parallel_detection() argument
4987 struct bnx2x *bp = params->bp; in bnx2x_set_parallel_detection()
5038 struct link_params *params, in bnx2x_set_autoneg() argument
5042 struct bnx2x *bp = params->bp; in bnx2x_set_autoneg()
5142 struct link_params *params, in bnx2x_program_serdes() argument
5145 struct bnx2x *bp = params->bp; in bnx2x_program_serdes()
5191 struct link_params *params) in bnx2x_set_brcm_cl37_advertisement() argument
5193 struct bnx2x *bp = params->bp; in bnx2x_set_brcm_cl37_advertisement()
5211 struct link_params *params, in bnx2x_set_ieee_aneg_advertisement() argument
5214 struct bnx2x *bp = params->bp; in bnx2x_set_ieee_aneg_advertisement()
5232 struct link_params *params, in bnx2x_restart_autoneg() argument
5235 struct bnx2x *bp = params->bp; in bnx2x_restart_autoneg()
5272 struct link_params *params, in bnx2x_initialize_sgmii_process() argument
5275 struct bnx2x *bp = params->bp; in bnx2x_initialize_sgmii_process()
5337 bnx2x_restart_autoneg(phy, params, 0); in bnx2x_initialize_sgmii_process()
5344 struct link_params *params) in bnx2x_direct_parallel_detect_used() argument
5346 struct bnx2x *bp = params->bp; in bnx2x_direct_parallel_detect_used()
5360 params->port); in bnx2x_direct_parallel_detect_used()
5371 params->port); in bnx2x_direct_parallel_detect_used()
5378 struct link_params *params, in bnx2x_update_adv_fc() argument
5385 struct bnx2x *bp = params->bp; in bnx2x_update_adv_fc()
5420 bnx2x_pause_resolve(phy, params, vars, pause_result); in bnx2x_update_adv_fc()
5425 struct link_params *params, in bnx2x_flow_ctrl_resolve() argument
5429 struct bnx2x *bp = params->bp; in bnx2x_flow_ctrl_resolve()
5436 bnx2x_update_adv_fc(phy, params, vars, gp_status); in bnx2x_flow_ctrl_resolve()
5440 vars->flow_ctrl = params->req_fc_auto_adv; in bnx2x_flow_ctrl_resolve()
5443 if (bnx2x_direct_parallel_detect_used(phy, params)) { in bnx2x_flow_ctrl_resolve()
5444 vars->flow_ctrl = params->req_fc_auto_adv; in bnx2x_flow_ctrl_resolve()
5447 bnx2x_update_adv_fc(phy, params, vars, gp_status); in bnx2x_flow_ctrl_resolve()
5453 struct link_params *params) in bnx2x_check_fallback_to_cl37() argument
5455 struct bnx2x *bp = params->bp; in bnx2x_check_fallback_to_cl37()
5516 bnx2x_restart_autoneg(phy, params, 0); in bnx2x_check_fallback_to_cl37()
5521 struct link_params *params, in bnx2x_xgxs_an_resolve() argument
5529 if (bnx2x_direct_parallel_detect_used(phy, params)) in bnx2x_xgxs_an_resolve()
5534 struct link_params *params, in bnx2x_get_link_speed_duplex() argument
5540 struct bnx2x *bp = params->bp; in bnx2x_get_link_speed_duplex()
5625 struct link_params *params, in bnx2x_link_settings_status() argument
5628 struct bnx2x *bp = params->bp; in bnx2x_link_settings_status()
5645 rc = bnx2x_get_link_speed_duplex(phy, params, vars, link_up, speed_mask, in bnx2x_link_settings_status()
5651 if (SINGLE_MEDIA_DIRECT(params)) { in bnx2x_link_settings_status()
5653 bnx2x_flow_ctrl_resolve(phy, params, vars, gp_status); in bnx2x_link_settings_status()
5655 bnx2x_xgxs_an_resolve(phy, params, vars, in bnx2x_link_settings_status()
5660 SINGLE_MEDIA_DIRECT(params)) { in bnx2x_link_settings_status()
5662 bnx2x_check_fallback_to_cl37(phy, params); in bnx2x_link_settings_status()
5667 if (SINGLE_MEDIA_DIRECT(params) && in bnx2x_link_settings_status()
5699 struct link_params *params, in bnx2x_warpcore_read_status() argument
5702 struct bnx2x *bp = params->bp; in bnx2x_warpcore_read_status()
5706 lane = bnx2x_get_warpcore_lane(phy, params); in bnx2x_warpcore_read_status()
5708 if ((params->loopback_mode) && in bnx2x_warpcore_read_status()
5726 bnx2x_ext_phy_resolve_fc(phy, params, vars); in bnx2x_warpcore_read_status()
5745 if (link_up && SINGLE_MEDIA_DIRECT(params)) { in bnx2x_warpcore_read_status()
5764 bnx2x_ext_phy_resolve_fc(phy, params, vars); in bnx2x_warpcore_read_status()
5770 SINGLE_MEDIA_DIRECT(params)) { in bnx2x_warpcore_read_status()
5811 rc = bnx2x_get_link_speed_duplex(phy, params, vars, link_up, gp_speed, in bnx2x_warpcore_read_status()
5823 static void bnx2x_set_gmii_tx_driver(struct link_params *params) in bnx2x_set_gmii_tx_driver() argument
5825 struct bnx2x *bp = params->bp; in bnx2x_set_gmii_tx_driver()
5826 struct bnx2x_phy *phy = ¶ms->phy[INT_PHY]; in bnx2x_set_gmii_tx_driver()
5862 static int bnx2x_emac_program(struct link_params *params, in bnx2x_emac_program() argument
5865 struct bnx2x *bp = params->bp; in bnx2x_emac_program()
5866 u8 port = params->port; in bnx2x_emac_program()
5905 bnx2x_set_led(params, vars, LED_MODE_OPER, vars->line_speed); in bnx2x_emac_program()
5910 struct link_params *params) in bnx2x_set_preemphasis() argument
5914 struct bnx2x *bp = params->bp; in bnx2x_set_preemphasis()
5934 struct link_params *params, in bnx2x_xgxs_config_init() argument
5937 struct bnx2x *bp = params->bp; in bnx2x_xgxs_config_init()
5938 u8 enable_cl73 = (SINGLE_MEDIA_DIRECT(params) || in bnx2x_xgxs_config_init()
5939 (params->loopback_mode == LOOPBACK_XGXS)); in bnx2x_xgxs_config_init()
5941 if (SINGLE_MEDIA_DIRECT(params) && in bnx2x_xgxs_config_init()
5942 (params->feature_config_flags & in bnx2x_xgxs_config_init()
5944 bnx2x_set_preemphasis(phy, params); in bnx2x_xgxs_config_init()
5948 (SINGLE_MEDIA_DIRECT(params) && in bnx2x_xgxs_config_init()
5949 params->loopback_mode == LOOPBACK_EXT)) { in bnx2x_xgxs_config_init()
5953 bnx2x_set_autoneg(phy, params, vars, 0); in bnx2x_xgxs_config_init()
5956 bnx2x_program_serdes(phy, params, vars); in bnx2x_xgxs_config_init()
5962 bnx2x_set_brcm_cl37_advertisement(phy, params); in bnx2x_xgxs_config_init()
5965 bnx2x_set_ieee_aneg_advertisement(phy, params, in bnx2x_xgxs_config_init()
5969 bnx2x_set_autoneg(phy, params, vars, enable_cl73); in bnx2x_xgxs_config_init()
5972 bnx2x_restart_autoneg(phy, params, enable_cl73); in bnx2x_xgxs_config_init()
5978 bnx2x_initialize_sgmii_process(phy, params, vars); in bnx2x_xgxs_config_init()
5983 struct link_params *params, in bnx2x_prepare_xgxs() argument
6001 bnx2x_calc_ieee_aneg_adv(phy, params, &vars->ieee_fc); in bnx2x_prepare_xgxs()
6002 bnx2x_set_aer_mmd(params, phy); in bnx2x_prepare_xgxs()
6004 bnx2x_set_master_ln(params, phy); in bnx2x_prepare_xgxs()
6006 rc = bnx2x_reset_unicore(params, phy, 0); in bnx2x_prepare_xgxs()
6011 bnx2x_set_aer_mmd(params, phy); in bnx2x_prepare_xgxs()
6014 bnx2x_set_master_ln(params, phy); in bnx2x_prepare_xgxs()
6015 bnx2x_set_swap_lanes(params, phy); in bnx2x_prepare_xgxs()
6023 struct link_params *params) in bnx2x_wait_reset_complete() argument
6043 params->port); in bnx2x_wait_reset_complete()
6048 static void bnx2x_link_int_enable(struct link_params *params) in bnx2x_link_int_enable() argument
6050 u8 port = params->port; in bnx2x_link_int_enable()
6052 struct bnx2x *bp = params->bp; in bnx2x_link_int_enable()
6057 if (!(SINGLE_MEDIA_DIRECT(params))) in bnx2x_link_int_enable()
6059 } else if (params->switch_cfg == SWITCH_CFG_10G) { in bnx2x_link_int_enable()
6063 if (!(SINGLE_MEDIA_DIRECT(params)) && in bnx2x_link_int_enable()
6064 params->phy[INT_PHY].type != in bnx2x_link_int_enable()
6073 if (!(SINGLE_MEDIA_DIRECT(params)) && in bnx2x_link_int_enable()
6074 params->phy[INT_PHY].type != in bnx2x_link_int_enable()
6085 (params->switch_cfg == SWITCH_CFG_10G), in bnx2x_link_int_enable()
6130 static void bnx2x_link_int_ack(struct link_params *params, in bnx2x_link_int_ack() argument
6133 struct bnx2x *bp = params->bp; in bnx2x_link_int_ack()
6134 u8 port = params->port; in bnx2x_link_int_ack()
6149 else if (params->switch_cfg == SWITCH_CFG_10G) { in bnx2x_link_int_ack()
6154 ((params->lane_config & in bnx2x_link_int_ack()
6216 int bnx2x_get_ext_phy_fw_version(struct link_params *params, u8 *version, in bnx2x_get_ext_phy_fw_version() argument
6224 if (version == NULL || params == NULL) in bnx2x_get_ext_phy_fw_version()
6226 bp = params->bp; in bnx2x_get_ext_phy_fw_version()
6230 spirom_ver = REG_RD(bp, params->phy[EXT_PHY1].ver_addr); in bnx2x_get_ext_phy_fw_version()
6232 if (params->phy[EXT_PHY1].format_fw_ver) { in bnx2x_get_ext_phy_fw_version()
6233 status |= params->phy[EXT_PHY1].format_fw_ver(spirom_ver, in bnx2x_get_ext_phy_fw_version()
6238 if ((params->num_phys == MAX_PHYS) && in bnx2x_get_ext_phy_fw_version()
6239 (params->phy[EXT_PHY2].ver_addr != 0)) { in bnx2x_get_ext_phy_fw_version()
6240 spirom_ver = REG_RD(bp, params->phy[EXT_PHY2].ver_addr); in bnx2x_get_ext_phy_fw_version()
6241 if (params->phy[EXT_PHY2].format_fw_ver) { in bnx2x_get_ext_phy_fw_version()
6245 status |= params->phy[EXT_PHY2].format_fw_ver( in bnx2x_get_ext_phy_fw_version()
6257 struct link_params *params) in bnx2x_set_xgxs_loopback() argument
6259 u8 port = params->port; in bnx2x_set_xgxs_loopback()
6260 struct bnx2x *bp = params->bp; in bnx2x_set_xgxs_loopback()
6289 bnx2x_set_aer_mmd(params, phy); in bnx2x_set_xgxs_loopback()
6311 int bnx2x_set_led(struct link_params *params, in bnx2x_set_led() argument
6314 u8 port = params->port; in bnx2x_set_led()
6315 u16 hw_led_mode = params->hw_led_mode; in bnx2x_set_led()
6320 struct bnx2x *bp = params->bp; in bnx2x_set_led()
6326 if (params->phy[phy_idx].set_link_led) { in bnx2x_set_led()
6327 params->phy[phy_idx].set_link_led( in bnx2x_set_led()
6328 ¶ms->phy[phy_idx], params, mode); in bnx2x_set_led()
6340 if (params->phy[EXT_PHY1].type == in bnx2x_set_led()
6358 if (((params->phy[EXT_PHY1].type == in bnx2x_set_led()
6360 (params->phy[EXT_PHY1].type == in bnx2x_set_led()
6362 CHIP_IS_E2(bp) && params->num_phys == 2) { in bnx2x_set_led()
6380 } else if (SINGLE_MEDIA_DIRECT(params)) { in bnx2x_set_led()
6396 } else if ((params->phy[EXT_PHY1].type == in bnx2x_set_led()
6408 u32 nig_led_mode = ((params->hw_led_mode << in bnx2x_set_led()
6459 int bnx2x_test_link(struct link_params *params, struct link_vars *vars, in bnx2x_test_link() argument
6462 struct bnx2x *bp = params->bp; in bnx2x_test_link()
6466 struct bnx2x_phy *int_phy = ¶ms->phy[INT_PHY]; in bnx2x_test_link()
6470 if (params->req_line_speed[LINK_CONFIG_IDX(INT_PHY)] in bnx2x_test_link()
6480 u8 lane = bnx2x_get_warpcore_lane(int_phy, params); in bnx2x_test_link()
6500 if (params->loopback_mode == LOOPBACK_XGXS) in bnx2x_test_link()
6503 switch (params->num_phys) { in bnx2x_test_link()
6508 ext_phy_link_up = params->phy[EXT_PHY1].read_status( in bnx2x_test_link()
6509 ¶ms->phy[EXT_PHY1], in bnx2x_test_link()
6510 params, &temp_vars); in bnx2x_test_link()
6513 for (phy_index = EXT_PHY1; phy_index < params->num_phys; in bnx2x_test_link()
6515 serdes_phy_type = ((params->phy[phy_index].media_type == in bnx2x_test_link()
6517 (params->phy[phy_index].media_type == in bnx2x_test_link()
6519 (params->phy[phy_index].media_type == in bnx2x_test_link()
6521 (params->phy[phy_index].media_type == in bnx2x_test_link()
6526 if (params->phy[phy_index].read_status) { in bnx2x_test_link()
6528 params->phy[phy_index].read_status( in bnx2x_test_link()
6529 ¶ms->phy[phy_index], in bnx2x_test_link()
6530 params, &temp_vars); in bnx2x_test_link()
6540 static int bnx2x_link_initialize(struct link_params *params, in bnx2x_link_initialize() argument
6544 struct bnx2x *bp = params->bp; in bnx2x_link_initialize()
6550 vars->line_speed = params->phy[INT_PHY].req_line_speed; in bnx2x_link_initialize()
6557 bnx2x_prepare_xgxs(¶ms->phy[INT_PHY], params, vars); in bnx2x_link_initialize()
6559 non_ext_phy = (SINGLE_MEDIA_DIRECT(params) || in bnx2x_link_initialize()
6560 (params->loopback_mode == LOOPBACK_XGXS)); in bnx2x_link_initialize()
6563 (params->phy[EXT_PHY1].flags & FLAGS_INIT_XGXS_FIRST) || in bnx2x_link_initialize()
6564 (params->loopback_mode == LOOPBACK_EXT_PHY)) { in bnx2x_link_initialize()
6565 struct bnx2x_phy *phy = ¶ms->phy[INT_PHY]; in bnx2x_link_initialize()
6569 bnx2x_set_parallel_detection(phy, params); in bnx2x_link_initialize()
6570 if (params->phy[INT_PHY].config_init) in bnx2x_link_initialize()
6571 params->phy[INT_PHY].config_init(phy, params, vars); in bnx2x_link_initialize()
6577 vars->line_speed = params->phy[INT_PHY].req_line_speed; in bnx2x_link_initialize()
6581 if (params->phy[INT_PHY].supported & in bnx2x_link_initialize()
6585 for (phy_index = EXT_PHY1; phy_index < params->num_phys; in bnx2x_link_initialize()
6592 if (params->phy[phy_index].supported & in bnx2x_link_initialize()
6597 (bnx2x_phy_selection(params) == in bnx2x_link_initialize()
6603 params->phy[phy_index].config_init( in bnx2x_link_initialize()
6604 ¶ms->phy[phy_index], in bnx2x_link_initialize()
6605 params, vars); in bnx2x_link_initialize()
6610 params->port*4, in bnx2x_link_initialize()
6619 struct link_params *params) in bnx2x_int_link_reset() argument
6622 REG_WR(params->bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_3_CLEAR, in bnx2x_int_link_reset()
6623 (0x1ff << (params->port*16))); in bnx2x_int_link_reset()
6627 struct link_params *params) in bnx2x_common_ext_link_reset() argument
6629 struct bnx2x *bp = params->bp; in bnx2x_common_ext_link_reset()
6635 gpio_port = params->port; in bnx2x_common_ext_link_reset()
6645 static int bnx2x_update_link_down(struct link_params *params, in bnx2x_update_link_down() argument
6648 struct bnx2x *bp = params->bp; in bnx2x_update_link_down()
6649 u8 port = params->port; in bnx2x_update_link_down()
6652 bnx2x_set_led(params, vars, LED_MODE_OFF, 0); in bnx2x_update_link_down()
6660 bnx2x_update_mng(params, vars->link_status); in bnx2x_update_link_down()
6673 bnx2x_set_bmac_rx(bp, params->chip_id, params->port, 0); in bnx2x_update_link_down()
6677 REG_WR(bp, MISC_REG_CPMU_LP_FW_ENABLE_P0 + (params->port << 2), in bnx2x_update_link_down()
6679 REG_WR(bp, MISC_REG_CPMU_LP_MASK_ENT_P0 + (params->port << 2), in bnx2x_update_link_down()
6684 bnx2x_update_mng_eee(params, vars->eee_status); in bnx2x_update_link_down()
6685 bnx2x_set_xmac_rxtx(params, 0); in bnx2x_update_link_down()
6686 bnx2x_set_umac_rxtx(params, 0); in bnx2x_update_link_down()
6692 static int bnx2x_update_link_up(struct link_params *params, in bnx2x_update_link_up() argument
6696 struct bnx2x *bp = params->bp; in bnx2x_update_link_up()
6697 u8 phy_idx, port = params->port; in bnx2x_update_link_up()
6713 if (bnx2x_xmac_enable(params, vars, 0) == in bnx2x_update_link_up()
6721 bnx2x_umac_enable(params, vars, 0); in bnx2x_update_link_up()
6722 bnx2x_set_led(params, vars, in bnx2x_update_link_up()
6729 (params->port << 2), 1); in bnx2x_update_link_up()
6732 (params->port << 2), 0xfc20); in bnx2x_update_link_up()
6738 if (bnx2x_bmac_enable(params, vars, 0, 1) == in bnx2x_update_link_up()
6746 bnx2x_set_led(params, vars, in bnx2x_update_link_up()
6749 rc = bnx2x_emac_program(params, vars); in bnx2x_update_link_up()
6750 bnx2x_emac_enable(params, vars, 0); in bnx2x_update_link_up()
6756 SINGLE_MEDIA_DIRECT(params)) in bnx2x_update_link_up()
6757 bnx2x_set_gmii_tx_driver(params); in bnx2x_update_link_up()
6763 rc |= bnx2x_pbf_update(params, vars->flow_ctrl, in bnx2x_update_link_up()
6770 bnx2x_update_mng(params, vars->link_status); in bnx2x_update_link_up()
6771 bnx2x_update_mng_eee(params, vars->eee_status); in bnx2x_update_link_up()
6774 if (params->phy[phy_idx].flags & FLAGS_TX_ERROR_CHECK) { in bnx2x_update_link_up()
6775 bnx2x_check_half_open_conn(params, vars, 0); in bnx2x_update_link_up()
6783 static void bnx2x_chng_link_count(struct link_params *params, bool clear) in bnx2x_chng_link_count() argument
6785 struct bnx2x *bp = params->bp; in bnx2x_chng_link_count()
6792 addr = params->shmem2_base + in bnx2x_chng_link_count()
6793 offsetof(struct shmem2_region, link_change_count[params->port]); in bnx2x_chng_link_count()
6813 int bnx2x_link_update(struct link_params *params, struct link_vars *vars) in bnx2x_link_update() argument
6815 struct bnx2x *bp = params->bp; in bnx2x_link_update()
6817 u8 port = params->port; in bnx2x_link_update()
6827 for (phy_index = INT_PHY; phy_index < params->num_phys; in bnx2x_link_update()
6841 bnx2x_set_aer_mmd(params, ¶ms->phy[INT_PHY]); in bnx2x_link_update()
6869 for (phy_index = EXT_PHY1; phy_index < params->num_phys; in bnx2x_link_update()
6871 struct bnx2x_phy *phy = ¶ms->phy[phy_index]; in bnx2x_link_update()
6875 cur_link_up = phy->read_status(phy, params, in bnx2x_link_update()
6890 switch (bnx2x_phy_selection(params)) { in bnx2x_link_update()
6916 params->multi_phy_config); in bnx2x_link_update()
6929 if (params->phy[INT_PHY].read_status) in bnx2x_link_update()
6930 params->phy[INT_PHY].read_status( in bnx2x_link_update()
6931 ¶ms->phy[INT_PHY], in bnx2x_link_update()
6932 params, vars); in bnx2x_link_update()
6951 if (params->phy[EXT_PHY2].phy_specific_func) { in bnx2x_link_update()
6954 params->phy[EXT_PHY2].phy_specific_func( in bnx2x_link_update()
6955 ¶ms->phy[EXT_PHY2], in bnx2x_link_update()
6956 params, DISABLE_TX); in bnx2x_link_update()
6962 if (params->phy[active_external_phy].supported & in bnx2x_link_update()
6974 for (phy_index = EXT_PHY1; phy_index < params->num_phys; in bnx2x_link_update()
6976 if (params->phy[phy_index].flags & in bnx2x_link_update()
6993 if (!(SINGLE_MEDIA_DIRECT(params)) && ext_phy_link_up && in bnx2x_link_update()
7001 REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, in bnx2x_link_update()
7010 bnx2x_link_int_ack(params, vars, link_10g_plus); in bnx2x_link_update()
7019 if (!(SINGLE_MEDIA_DIRECT(params))) { in bnx2x_link_update()
7023 params->phy[EXT_PHY1].flags & in bnx2x_link_update()
7025 if (!(params->phy[EXT_PHY1].flags & in bnx2x_link_update()
7034 if (params->phy[INT_PHY].config_init) in bnx2x_link_update()
7035 params->phy[INT_PHY].config_init( in bnx2x_link_update()
7036 ¶ms->phy[INT_PHY], params, in bnx2x_link_update()
7045 SINGLE_MEDIA_DIRECT(params)) && in bnx2x_link_update()
7049 if (params->feature_config_flags & FEATURE_CONFIG_PFC_ENABLED) in bnx2x_link_update()
7055 rc = bnx2x_update_link_up(params, vars, link_10g_plus); in bnx2x_link_update()
7057 rc = bnx2x_update_link_down(params, vars); in bnx2x_link_update()
7060 bnx2x_chng_link_count(params, false); in bnx2x_link_update()
7063 if (params->feature_config_flags & FEATURE_CONFIG_BC_SUPPORTS_AFEX) in bnx2x_link_update()
7126 struct link_params *params, in bnx2x_8073_resolve_fc() argument
7129 struct bnx2x *bp = params->bp; in bnx2x_8073_resolve_fc()
7136 if (bnx2x_ext_phy_resolve_fc(phy, params, vars) && in bnx2x_8073_resolve_fc()
7153 bnx2x_pause_resolve(phy, params, vars, pause_result); in bnx2x_8073_resolve_fc()
7334 static void bnx2x_8073_set_pause_cl37(struct link_params *params, in bnx2x_8073_set_pause_cl37() argument
7339 struct bnx2x *bp = params->bp; in bnx2x_8073_set_pause_cl37()
7345 bnx2x_calc_ieee_aneg_adv(phy, params, &vars->ieee_fc); in bnx2x_8073_set_pause_cl37()
7370 struct link_params *params, in bnx2x_8073_specific_func() argument
7373 struct bnx2x *bp = params->bp; in bnx2x_8073_specific_func()
7386 struct link_params *params, in bnx2x_8073_config_init() argument
7389 struct bnx2x *bp = params->bp; in bnx2x_8073_config_init()
7397 gpio_port = params->port; in bnx2x_8073_config_init()
7405 bnx2x_8073_specific_func(phy, params, PHY_INIT); in bnx2x_8073_config_init()
7406 bnx2x_8073_set_pause_cl37(params, phy, vars); in bnx2x_8073_config_init()
7417 if (params->lane_config & PORT_HW_CFG_SWAP_PHY_POLARITY_ENABLED) { in bnx2x_8073_config_init()
7432 if (REG_RD(bp, params->shmem_base + in bnx2x_8073_config_init()
7434 port_hw_config[params->port].default_cfg)) & in bnx2x_8073_config_init()
7445 if (params->loopback_mode == LOOPBACK_EXT) { in bnx2x_8073_config_init()
7523 bnx2x_ext_phy_set_pause(params, phy, vars); in bnx2x_8073_config_init()
7534 struct link_params *params, in bnx2x_8073_read_status() argument
7537 struct bnx2x *bp = params->bp; in bnx2x_8073_read_status()
7618 params->port); in bnx2x_8073_read_status()
7623 params->port); in bnx2x_8073_read_status()
7628 params->port); in bnx2x_8073_read_status()
7632 params->port); in bnx2x_8073_read_status()
7637 if (params->lane_config & in bnx2x_8073_read_status()
7659 bnx2x_8073_resolve_fc(phy, params, vars); in bnx2x_8073_read_status()
7679 struct link_params *params) in bnx2x_8073_link_reset() argument
7681 struct bnx2x *bp = params->bp; in bnx2x_8073_link_reset()
7686 gpio_port = params->port; in bnx2x_8073_link_reset()
7698 struct link_params *params, in bnx2x_8705_config_init() argument
7701 struct bnx2x *bp = params->bp; in bnx2x_8705_config_init()
7705 MISC_REGISTERS_GPIO_OUTPUT_HIGH, params->port); in bnx2x_8705_config_init()
7707 bnx2x_ext_phy_hw_reset(bp, params->port); in bnx2x_8705_config_init()
7709 bnx2x_wait_reset_complete(bp, phy, params); in bnx2x_8705_config_init()
7720 bnx2x_save_spirom_version(bp, params->port, params->shmem_base, 0); in bnx2x_8705_config_init()
7725 struct link_params *params, in bnx2x_8705_read_status() argument
7730 struct bnx2x *bp = params->bp; in bnx2x_8705_read_status()
7752 bnx2x_ext_phy_resolve_fc(phy, params, vars); in bnx2x_8705_read_status()
7760 static void bnx2x_set_disable_pmd_transmit(struct link_params *params, in bnx2x_set_disable_pmd_transmit() argument
7764 struct bnx2x *bp = params->bp; in bnx2x_set_disable_pmd_transmit()
7769 if (params->feature_config_flags & in bnx2x_set_disable_pmd_transmit()
7783 static u8 bnx2x_get_gpio_port(struct link_params *params) in bnx2x_get_gpio_port() argument
7787 struct bnx2x *bp = params->bp; in bnx2x_get_gpio_port()
7791 gpio_port = params->port; in bnx2x_get_gpio_port()
7797 static void bnx2x_sfp_e1e2_set_transmitter(struct link_params *params, in bnx2x_sfp_e1e2_set_transmitter() argument
7802 u8 port = params->port; in bnx2x_sfp_e1e2_set_transmitter()
7803 struct bnx2x *bp = params->bp; in bnx2x_sfp_e1e2_set_transmitter()
7807 tx_en_mode = REG_RD(bp, params->shmem_base + in bnx2x_sfp_e1e2_set_transmitter()
7844 gpio_port = bnx2x_get_gpio_port(params); in bnx2x_sfp_e1e2_set_transmitter()
7854 static void bnx2x_sfp_set_transmitter(struct link_params *params, in bnx2x_sfp_set_transmitter() argument
7858 struct bnx2x *bp = params->bp; in bnx2x_sfp_set_transmitter()
7861 bnx2x_sfp_e3_set_transmitter(params, phy, tx_en); in bnx2x_sfp_set_transmitter()
7863 bnx2x_sfp_e1e2_set_transmitter(params, phy, tx_en); in bnx2x_sfp_set_transmitter()
7867 struct link_params *params, in bnx2x_8726_read_sfp_module_eeprom() argument
7871 struct bnx2x *bp = params->bp; in bnx2x_8726_read_sfp_module_eeprom()
7933 static void bnx2x_warpcore_power_module(struct link_params *params, in bnx2x_warpcore_power_module() argument
7937 struct bnx2x *bp = params->bp; in bnx2x_warpcore_power_module()
7939 pin_cfg = (REG_RD(bp, params->shmem_base + in bnx2x_warpcore_power_module()
7941 dev_info.port_hw_config[params->port].e3_sfp_ctrl)) & in bnx2x_warpcore_power_module()
7955 struct link_params *params, in bnx2x_warpcore_read_sfp_module_eeprom() argument
7964 struct bnx2x *bp = params->bp; in bnx2x_warpcore_read_sfp_module_eeprom()
7976 bnx2x_warpcore_power_module(params, 0); in bnx2x_warpcore_read_sfp_module_eeprom()
7979 bnx2x_warpcore_power_module(params, 1); in bnx2x_warpcore_read_sfp_module_eeprom()
7981 rc = bnx2x_bsc_read(params, bp, dev_addr, addr32, 0, byte_cnt, in bnx2x_warpcore_read_sfp_module_eeprom()
7996 struct link_params *params, in bnx2x_8727_read_sfp_module_eeprom() argument
8000 struct bnx2x *bp = params->bp; in bnx2x_8727_read_sfp_module_eeprom()
8091 struct link_params *params, u8 dev_addr, in bnx2x_read_sfp_module_eeprom() argument
8095 struct bnx2x *bp = params->bp; in bnx2x_read_sfp_module_eeprom()
8123 rc = read_func(phy, params, dev_addr, addr, xfer_size, in bnx2x_read_sfp_module_eeprom()
8133 struct link_params *params, in bnx2x_get_edc_mode() argument
8136 struct bnx2x *bp = params->bp; in bnx2x_get_edc_mode()
8143 params, in bnx2x_get_edc_mode()
8151 params->link_attr_sync &= ~LINK_SFP_EEPROM_COMP_CODE_MASK; in bnx2x_get_edc_mode()
8152 params->link_attr_sync |= val[SFP_EEPROM_10G_COMP_CODE_ADDR] << in bnx2x_get_edc_mode()
8154 bnx2x_update_link_attr(params, params->link_attr_sync); in bnx2x_get_edc_mode()
8201 u8 gport = params->port; in bnx2x_get_edc_mode()
8205 (params->port << 1); in bnx2x_get_edc_mode()
8213 bnx2x_sfp_set_transmitter(params, phy, 0); in bnx2x_get_edc_mode()
8215 bnx2x_sfp_set_transmitter(params, phy, 1); in bnx2x_get_edc_mode()
8221 if (params->phy[idx].type == phy->type) { in bnx2x_get_edc_mode()
8227 phy->req_line_speed = params->req_line_speed[cfg_idx]; in bnx2x_get_edc_mode()
8235 sync_offset = params->shmem_base + in bnx2x_get_edc_mode()
8237 dev_info.port_hw_config[params->port].media_type); in bnx2x_get_edc_mode()
8241 if (&(params->phy[phy_idx]) == phy) { in bnx2x_get_edc_mode()
8254 params, in bnx2x_get_edc_mode()
8275 struct link_params *params) in bnx2x_verify_sfp_module() argument
8277 struct bnx2x *bp = params->bp; in bnx2x_verify_sfp_module()
8283 val = REG_RD(bp, params->shmem_base + in bnx2x_verify_sfp_module()
8285 port_feature_config[params->port].config)); in bnx2x_verify_sfp_module()
8292 if (params->feature_config_flags & in bnx2x_verify_sfp_module()
8296 } else if (params->feature_config_flags & in bnx2x_verify_sfp_module()
8299 if (DUAL_MEDIA(params)) { in bnx2x_verify_sfp_module()
8321 params, in bnx2x_verify_sfp_module()
8330 params, in bnx2x_verify_sfp_module()
8341 params->port, vendor_name, vendor_pn); in bnx2x_verify_sfp_module()
8349 struct link_params *params) in bnx2x_wait_for_sfp_module_initialized() argument
8354 struct bnx2x *bp = params->bp; in bnx2x_wait_for_sfp_module_initialized()
8363 phy, params, I2C_DEV_ADDR_A0, 1, 1, &val, in bnx2x_wait_for_sfp_module_initialized()
8366 rc = bnx2x_read_sfp_module_eeprom(phy, params, in bnx2x_wait_for_sfp_module_initialized()
8377 rc = bnx2x_read_sfp_module_eeprom(phy, params, I2C_DEV_ADDR_A0, in bnx2x_wait_for_sfp_module_initialized()
8498 struct link_params *params, in bnx2x_8727_specific_func() argument
8501 struct bnx2x *bp = params->bp; in bnx2x_8727_specific_func()
8505 bnx2x_sfp_set_transmitter(params, phy, 0); in bnx2x_8727_specific_func()
8509 bnx2x_sfp_set_transmitter(params, phy, 1); in bnx2x_8727_specific_func()
8543 static void bnx2x_set_e1e2_module_fault_led(struct link_params *params, in bnx2x_set_e1e2_module_fault_led() argument
8546 struct bnx2x *bp = params->bp; in bnx2x_set_e1e2_module_fault_led()
8548 u32 fault_led_gpio = REG_RD(bp, params->shmem_base + in bnx2x_set_e1e2_module_fault_led()
8550 dev_info.port_hw_config[params->port].sfp_ctrl)) & in bnx2x_set_e1e2_module_fault_led()
8560 u8 gpio_port = bnx2x_get_gpio_port(params); in bnx2x_set_e1e2_module_fault_led()
8575 static void bnx2x_set_e3_module_fault_led(struct link_params *params, in bnx2x_set_e3_module_fault_led() argument
8579 u8 port = params->port; in bnx2x_set_e3_module_fault_led()
8580 struct bnx2x *bp = params->bp; in bnx2x_set_e3_module_fault_led()
8581 pin_cfg = (REG_RD(bp, params->shmem_base + in bnx2x_set_e3_module_fault_led()
8591 static void bnx2x_set_sfp_module_fault_led(struct link_params *params, in bnx2x_set_sfp_module_fault_led() argument
8594 struct bnx2x *bp = params->bp; in bnx2x_set_sfp_module_fault_led()
8600 bnx2x_set_e3_module_fault_led(params, gpio_mode); in bnx2x_set_sfp_module_fault_led()
8602 bnx2x_set_e1e2_module_fault_led(params, gpio_mode); in bnx2x_set_sfp_module_fault_led()
8606 struct link_params *params) in bnx2x_warpcore_hw_reset() argument
8608 struct bnx2x *bp = params->bp; in bnx2x_warpcore_hw_reset()
8609 bnx2x_warpcore_power_module(params, 0); in bnx2x_warpcore_hw_reset()
8619 static void bnx2x_power_sfp_module(struct link_params *params, in bnx2x_power_sfp_module() argument
8623 struct bnx2x *bp = params->bp; in bnx2x_power_sfp_module()
8629 bnx2x_8727_power_module(params->bp, phy, power); in bnx2x_power_sfp_module()
8632 bnx2x_warpcore_power_module(params, power); in bnx2x_power_sfp_module()
8638 static void bnx2x_warpcore_set_limiting_mode(struct link_params *params, in bnx2x_warpcore_set_limiting_mode() argument
8644 struct bnx2x *bp = params->bp; in bnx2x_warpcore_set_limiting_mode()
8646 u8 lane = bnx2x_get_warpcore_lane(phy, params); in bnx2x_warpcore_set_limiting_mode()
8678 static void bnx2x_set_limiting_mode(struct link_params *params, in bnx2x_set_limiting_mode() argument
8684 bnx2x_8726_set_limiting_mode(params->bp, phy, edc_mode); in bnx2x_set_limiting_mode()
8688 bnx2x_8727_set_limiting_mode(params->bp, phy, edc_mode); in bnx2x_set_limiting_mode()
8691 bnx2x_warpcore_set_limiting_mode(params, phy, edc_mode); in bnx2x_set_limiting_mode()
8697 struct link_params *params) in bnx2x_sfp_module_detection() argument
8699 struct bnx2x *bp = params->bp; in bnx2x_sfp_module_detection()
8703 u32 val = REG_RD(bp, params->shmem_base + in bnx2x_sfp_module_detection()
8705 port_feature_config[params->port].config)); in bnx2x_sfp_module_detection()
8707 bnx2x_sfp_set_transmitter(params, phy, 1); in bnx2x_sfp_module_detection()
8709 params->port); in bnx2x_sfp_module_detection()
8711 bnx2x_power_sfp_module(params, phy, 1); in bnx2x_sfp_module_detection()
8712 if (bnx2x_get_edc_mode(phy, params, &edc_mode) != 0) { in bnx2x_sfp_module_detection()
8715 } else if (bnx2x_verify_sfp_module(phy, params) != 0) { in bnx2x_sfp_module_detection()
8720 bnx2x_set_sfp_module_fault_led(params, in bnx2x_sfp_module_detection()
8727 bnx2x_power_sfp_module(params, phy, 0); in bnx2x_sfp_module_detection()
8732 bnx2x_set_sfp_module_fault_led(params, MISC_REGISTERS_GPIO_LOW); in bnx2x_sfp_module_detection()
8738 bnx2x_set_limiting_mode(params, phy, edc_mode); in bnx2x_sfp_module_detection()
8746 bnx2x_sfp_set_transmitter(params, phy, 0); in bnx2x_sfp_module_detection()
8751 void bnx2x_handle_module_detect_int(struct link_params *params) in bnx2x_handle_module_detect_int() argument
8753 struct bnx2x *bp = params->bp; in bnx2x_handle_module_detect_int()
8758 phy = ¶ms->phy[INT_PHY]; in bnx2x_handle_module_detect_int()
8760 bnx2x_sfp_set_transmitter(params, phy, 1); in bnx2x_handle_module_detect_int()
8762 phy = ¶ms->phy[EXT_PHY1]; in bnx2x_handle_module_detect_int()
8764 if (bnx2x_get_mod_abs_int_cfg(bp, params->chip_id, params->shmem_base, in bnx2x_handle_module_detect_int()
8765 params->port, &gpio_num, &gpio_port) == in bnx2x_handle_module_detect_int()
8772 bnx2x_set_sfp_module_fault_led(params, MISC_REGISTERS_GPIO_HIGH); in bnx2x_handle_module_detect_int()
8779 bnx2x_set_mdio_emac_per_phy(bp, params); in bnx2x_handle_module_detect_int()
8780 bnx2x_set_aer_mmd(params, phy); in bnx2x_handle_module_detect_int()
8782 bnx2x_power_sfp_module(params, phy, 1); in bnx2x_handle_module_detect_int()
8786 if (bnx2x_wait_for_sfp_module_initialized(phy, params) == 0) { in bnx2x_handle_module_detect_int()
8787 bnx2x_sfp_module_detection(phy, params); in bnx2x_handle_module_detect_int()
8799 (params->link_flags & in bnx2x_handle_module_detect_int()
8802 bnx2x_warpcore_config_sfi(phy, params); in bnx2x_handle_module_detect_int()
8847 struct link_params *params, in bnx2x_8706_8726_read_status() argument
8852 struct bnx2x *bp = params->bp; in bnx2x_8706_8726_read_status()
8888 bnx2x_ext_phy_resolve_fc(phy, params, vars); in bnx2x_8706_8726_read_status()
8909 struct link_params *params, in bnx2x_8706_config_init() argument
8914 struct bnx2x *bp = params->bp; in bnx2x_8706_config_init()
8917 MISC_REGISTERS_GPIO_OUTPUT_HIGH, params->port); in bnx2x_8706_config_init()
8919 bnx2x_ext_phy_hw_reset(bp, params->port); in bnx2x_8706_config_init()
8921 bnx2x_wait_reset_complete(bp, phy, params); in bnx2x_8706_config_init()
8932 if ((params->feature_config_flags & in bnx2x_8706_config_init()
8991 bnx2x_save_bcm_spirom_ver(bp, phy, params->port); in bnx2x_8706_config_init()
8997 tx_en_mode = REG_RD(bp, params->shmem_base + in bnx2x_8706_config_init()
8999 dev_info.port_hw_config[params->port].sfp_ctrl)) in bnx2x_8706_config_init()
9015 struct link_params *params, in bnx2x_8706_read_status() argument
9018 return bnx2x_8706_8726_read_status(phy, params, vars); in bnx2x_8706_read_status()
9025 struct link_params *params) in bnx2x_8726_config_loopback() argument
9027 struct bnx2x *bp = params->bp; in bnx2x_8726_config_loopback()
9033 struct link_params *params) in bnx2x_8726_external_rom_boot() argument
9035 struct bnx2x *bp = params->bp; in bnx2x_8726_external_rom_boot()
9067 bnx2x_save_bcm_spirom_ver(bp, phy, params->port); in bnx2x_8726_external_rom_boot()
9071 struct link_params *params, in bnx2x_8726_read_status() argument
9074 struct bnx2x *bp = params->bp; in bnx2x_8726_read_status()
9076 u8 link_up = bnx2x_8706_8726_read_status(phy, params, vars); in bnx2x_8726_read_status()
9092 struct link_params *params, in bnx2x_8726_config_init() argument
9095 struct bnx2x *bp = params->bp; in bnx2x_8726_config_init()
9099 bnx2x_wait_reset_complete(bp, phy, params); in bnx2x_8726_config_init()
9101 bnx2x_8726_external_rom_boot(phy, params); in bnx2x_8726_config_init()
9108 bnx2x_sfp_module_detection(phy, params); in bnx2x_8726_config_init()
9129 bnx2x_ext_phy_set_pause(params, phy, vars); in bnx2x_8726_config_init()
9155 if ((params->feature_config_flags & in bnx2x_8726_config_init()
9177 struct link_params *params) in bnx2x_8726_link_reset() argument
9179 struct bnx2x *bp = params->bp; in bnx2x_8726_link_reset()
9180 DP(NETIF_MSG_LINK, "bnx2x_8726_link_reset port %d\n", params->port); in bnx2x_8726_link_reset()
9192 struct link_params *params, u8 mode) in bnx2x_8727_set_link_led() argument
9194 struct bnx2x *bp = params->bp; in bnx2x_8727_set_link_led()
9238 struct link_params *params) { in bnx2x_8727_hw_reset() argument
9244 struct bnx2x *bp = params->bp; in bnx2x_8727_hw_reset()
9253 struct link_params *params) in bnx2x_8727_config_speed() argument
9255 struct bnx2x *bp = params->bp; in bnx2x_8727_config_speed()
9271 if (DUAL_MEDIA(params)) { in bnx2x_8727_config_speed()
9310 struct link_params *params, in bnx2x_8727_config_init() argument
9315 struct bnx2x *bp = params->bp; in bnx2x_8727_config_init()
9318 bnx2x_wait_reset_complete(bp, phy, params); in bnx2x_8727_config_init()
9322 bnx2x_8727_specific_func(phy, params, PHY_INIT); in bnx2x_8727_config_init()
9339 bnx2x_set_disable_pmd_transmit(params, phy, 0); in bnx2x_8727_config_init()
9349 bnx2x_8727_config_speed(phy, params); in bnx2x_8727_config_init()
9353 if ((params->feature_config_flags & in bnx2x_8727_config_init()
9370 tx_en_mode = REG_RD(bp, params->shmem_base + in bnx2x_8727_config_init()
9372 dev_info.port_hw_config[params->port].sfp_ctrl)) in bnx2x_8727_config_init()
9396 struct link_params *params) in bnx2x_8727_handle_mod_abs() argument
9398 struct bnx2x *bp = params->bp; in bnx2x_8727_handle_mod_abs()
9400 u32 val = REG_RD(bp, params->shmem_base + in bnx2x_8727_handle_mod_abs()
9402 port_feature_config[params->port]. in bnx2x_8727_handle_mod_abs()
9464 bnx2x_sfp_set_transmitter(params, phy, 0); in bnx2x_8727_handle_mod_abs()
9466 if (bnx2x_wait_for_sfp_module_initialized(phy, params) == 0) in bnx2x_8727_handle_mod_abs()
9467 bnx2x_sfp_module_detection(phy, params); in bnx2x_8727_handle_mod_abs()
9472 bnx2x_8727_config_speed(phy, params); in bnx2x_8727_handle_mod_abs()
9481 struct link_params *params, in bnx2x_8727_read_status() argument
9485 struct bnx2x *bp = params->bp; in bnx2x_8727_read_status()
9486 u8 link_up = 0, oc_port = params->port; in bnx2x_8727_read_status()
9527 oc_port = BP_PATH(bp) + (params->port << 1); in bnx2x_8727_read_status()
9556 bnx2x_8727_power_module(params->bp, phy, 0); in bnx2x_8727_read_status()
9563 bnx2x_8727_handle_mod_abs(phy, params); in bnx2x_8727_read_status()
9572 bnx2x_sfp_set_transmitter(params, phy, 1); in bnx2x_8727_read_status()
9589 params->port); in bnx2x_8727_read_status()
9594 params->port); in bnx2x_8727_read_status()
9598 params->port); in bnx2x_8727_read_status()
9615 bnx2x_ext_phy_resolve_fc(phy, params, vars); in bnx2x_8727_read_status()
9620 if ((DUAL_MEDIA(params)) && in bnx2x_8727_read_status()
9640 struct link_params *params) in bnx2x_8727_link_reset() argument
9642 struct bnx2x *bp = params->bp; in bnx2x_8727_link_reset()
9645 bnx2x_set_disable_pmd_transmit(params, phy, 1); in bnx2x_8727_link_reset()
9648 bnx2x_sfp_set_transmitter(params, phy, 0); in bnx2x_8727_link_reset()
9772 struct link_params *params, in bnx2x_848xx_specific_func() argument
9775 struct bnx2x *bp = params->bp; in bnx2x_848xx_specific_func()
9780 bnx2x_save_848xx_spirom_version(phy, bp, params->port); in bnx2x_848xx_specific_func()
9786 bnx2x_bits_en(bp, NIG_REG_LATCH_BC_0 + params->port*4, in bnx2x_848xx_specific_func()
9795 struct link_params *params, in bnx2x_848xx_cmn_config_init() argument
9798 struct bnx2x *bp = params->bp; in bnx2x_848xx_cmn_config_init()
9801 bnx2x_848xx_specific_func(phy, params, PHY_INIT); in bnx2x_848xx_cmn_config_init()
9810 bnx2x_ext_phy_set_pause(params, phy, vars); in bnx2x_848xx_cmn_config_init()
9941 struct link_params *params, in bnx2x_8481_config_init() argument
9944 struct bnx2x *bp = params->bp; in bnx2x_8481_config_init()
9947 MISC_REGISTERS_GPIO_OUTPUT_HIGH, params->port); in bnx2x_8481_config_init()
9950 bnx2x_ext_phy_hw_reset(bp, params->port); in bnx2x_8481_config_init()
9951 bnx2x_wait_reset_complete(bp, phy, params); in bnx2x_8481_config_init()
9954 return bnx2x_848xx_cmn_config_init(phy, params, vars); in bnx2x_8481_config_init()
9961 struct link_params *params, in bnx2x_84858_cmd_hdlr() argument
9967 struct bnx2x *bp = params->bp; in bnx2x_84858_cmd_hdlr()
10038 struct link_params *params, u16 fw_cmd, in bnx2x_84833_cmd_hdlr() argument
10043 struct bnx2x *bp = params->bp; in bnx2x_84833_cmd_hdlr()
10094 struct link_params *params, in bnx2x_848xx_cmd_hdlr() argument
10098 struct bnx2x *bp = params->bp; in bnx2x_848xx_cmd_hdlr()
10101 (REG_RD(bp, params->shmem2_base + in bnx2x_848xx_cmd_hdlr()
10103 link_attr_sync[params->port])) & in bnx2x_848xx_cmd_hdlr()
10105 return bnx2x_84858_cmd_hdlr(phy, params, fw_cmd, cmd_args, in bnx2x_848xx_cmd_hdlr()
10108 return bnx2x_84833_cmd_hdlr(phy, params, fw_cmd, cmd_args, in bnx2x_848xx_cmd_hdlr()
10114 struct link_params *params, in bnx2x_848xx_pair_swap_cfg() argument
10120 struct bnx2x *bp = params->bp; in bnx2x_848xx_pair_swap_cfg()
10123 pair_swap = REG_RD(bp, params->shmem_base + in bnx2x_848xx_pair_swap_cfg()
10125 dev_info.port_hw_config[params->port].xgbt_phy_cfg)) & in bnx2x_848xx_pair_swap_cfg()
10134 status = bnx2x_848xx_cmd_hdlr(phy, params, in bnx2x_848xx_pair_swap_cfg()
10182 struct link_params *params) in bnx2x_84833_hw_reset_phy() argument
10184 struct bnx2x *bp = params->bp; in bnx2x_84833_hw_reset_phy()
10186 u32 other_shmem_base_addr = REG_RD(bp, params->shmem2_base + in bnx2x_84833_hw_reset_phy()
10200 shmem_base_path[0] = params->shmem_base; in bnx2x_84833_hw_reset_phy()
10204 params->chip_id); in bnx2x_84833_hw_reset_phy()
10215 struct link_params *params, in bnx2x_8483x_disable_eee() argument
10219 struct bnx2x *bp = params->bp; in bnx2x_8483x_disable_eee()
10225 rc = bnx2x_848xx_cmd_hdlr(phy, params, in bnx2x_8483x_disable_eee()
10232 return bnx2x_eee_disable(phy, params, vars); in bnx2x_8483x_disable_eee()
10236 struct link_params *params, in bnx2x_8483x_enable_eee() argument
10240 struct bnx2x *bp = params->bp; in bnx2x_8483x_enable_eee()
10243 rc = bnx2x_848xx_cmd_hdlr(phy, params, in bnx2x_8483x_enable_eee()
10250 return bnx2x_eee_advertise(phy, params, vars, SHMEM_EEE_10G_ADV); in bnx2x_8483x_enable_eee()
10255 struct link_params *params, in bnx2x_848x3_config_init() argument
10258 struct bnx2x *bp = params->bp; in bnx2x_848x3_config_init()
10270 port = params->port; in bnx2x_848x3_config_init()
10283 bnx2x_wait_reset_complete(bp, phy, params); in bnx2x_848x3_config_init()
10294 bnx2x_set_autoneg(¶ms->phy[INT_PHY], params, vars, 0); in bnx2x_848x3_config_init()
10295 bnx2x_program_serdes(¶ms->phy[INT_PHY], params, vars); in bnx2x_848x3_config_init()
10305 params->link_attr_sync |= LINK_ATTR_84858; in bnx2x_848x3_config_init()
10306 bnx2x_update_link_attr(params, params->link_attr_sync); in bnx2x_848x3_config_init()
10327 actual_phy_selection = bnx2x_phy_selection(params); in bnx2x_848x3_config_init()
10347 if (params->phy[EXT_PHY2].req_line_speed == SPEED_1000) in bnx2x_848x3_config_init()
10353 params->multi_phy_config, val); in bnx2x_848x3_config_init()
10356 bnx2x_848xx_pair_swap_cfg(phy, params, vars); in bnx2x_848x3_config_init()
10363 rc = bnx2x_848xx_cmd_hdlr(phy, params, in bnx2x_848x3_config_init()
10370 rc = bnx2x_848xx_cmn_config_init(phy, params, vars); in bnx2x_848x3_config_init()
10372 bnx2x_save_848xx_spirom_version(phy, bp, params->port); in bnx2x_848x3_config_init()
10375 u32 cms_enable = REG_RD(bp, params->shmem_base + in bnx2x_848x3_config_init()
10377 dev_info.port_hw_config[params->port].default_cfg)) & in bnx2x_848x3_config_init()
10396 bnx2x_eee_has_cap(params)) { in bnx2x_848x3_config_init()
10397 rc = bnx2x_eee_initial_config(params, vars, SHMEM_EEE_10G_ADV); in bnx2x_848x3_config_init()
10400 bnx2x_8483x_disable_eee(phy, params, vars); in bnx2x_848x3_config_init()
10405 (params->eee_mode & EEE_MODE_ADV_LPI) && in bnx2x_848x3_config_init()
10406 (bnx2x_eee_calc_timer(params) || in bnx2x_848x3_config_init()
10407 !(params->eee_mode & EEE_MODE_ENABLE_LPI))) in bnx2x_848x3_config_init()
10408 rc = bnx2x_8483x_enable_eee(phy, params, vars); in bnx2x_848x3_config_init()
10410 rc = bnx2x_8483x_disable_eee(phy, params, vars); in bnx2x_848x3_config_init()
10430 struct link_params *params, in bnx2x_848xx_read_status() argument
10433 struct bnx2x *bp = params->bp; in bnx2x_848xx_read_status()
10512 bnx2x_ext_phy_resolve_fc(phy, params, vars); in bnx2x_848xx_read_status()
10552 bnx2x_eee_an_resolve(phy, params, vars); in bnx2x_848xx_read_status()
10568 struct link_params *params) in bnx2x_8481_hw_reset() argument
10570 bnx2x_set_gpio(params->bp, MISC_REGISTERS_GPIO_1, in bnx2x_8481_hw_reset()
10572 bnx2x_set_gpio(params->bp, MISC_REGISTERS_GPIO_1, in bnx2x_8481_hw_reset()
10577 struct link_params *params) in bnx2x_8481_link_reset() argument
10579 bnx2x_cl45_write(params->bp, phy, in bnx2x_8481_link_reset()
10581 bnx2x_cl45_write(params->bp, phy, in bnx2x_8481_link_reset()
10586 struct link_params *params) in bnx2x_848x3_link_reset() argument
10588 struct bnx2x *bp = params->bp; in bnx2x_848x3_link_reset()
10595 port = params->port; in bnx2x_848x3_link_reset()
10613 struct link_params *params, u8 mode) in bnx2x_848xx_set_link_led() argument
10615 struct bnx2x *bp = params->bp; in bnx2x_848xx_set_link_led()
10622 port = params->port; in bnx2x_848xx_set_link_led()
10629 if ((params->hw_led_mode << SHARED_HW_CFG_LED_MODE_SHIFT) == in bnx2x_848xx_set_link_led()
10665 if ((params->hw_led_mode << SHARED_HW_CFG_LED_MODE_SHIFT) == in bnx2x_848xx_set_link_led()
10700 params->port*4) & in bnx2x_848xx_set_link_led()
10702 params->link_flags |= in bnx2x_848xx_set_link_led()
10708 params->port*4, in bnx2x_848xx_set_link_led()
10722 if ((params->hw_led_mode << SHARED_HW_CFG_LED_MODE_SHIFT) == in bnx2x_848xx_set_link_led()
10768 params->port*4) & in bnx2x_848xx_set_link_led()
10770 params->link_flags |= in bnx2x_848xx_set_link_led()
10776 params->port*4, in bnx2x_848xx_set_link_led()
10791 if ((params->hw_led_mode << SHARED_HW_CFG_LED_MODE_SHIFT) == in bnx2x_848xx_set_link_led()
10836 val = ((params->hw_led_mode << in bnx2x_848xx_set_link_led()
10865 if (params->link_flags & in bnx2x_848xx_set_link_led()
10867 bnx2x_link_int_enable(params); in bnx2x_848xx_set_link_led()
10868 params->link_flags &= in bnx2x_848xx_set_link_led()
10889 struct link_params *params, in bnx2x_54618se_specific_func() argument
10892 struct bnx2x *bp = params->bp; in bnx2x_54618se_specific_func()
10918 struct link_params *params, in bnx2x_54618se_config_init() argument
10921 struct bnx2x *bp = params->bp; in bnx2x_54618se_config_init()
10932 port = params->port; in bnx2x_54618se_config_init()
10934 cfg_pin = (REG_RD(bp, params->shmem_base + in bnx2x_54618se_config_init()
10949 bnx2x_wait_reset_complete(bp, phy, params); in bnx2x_54618se_config_init()
10955 bnx2x_54618se_specific_func(phy, params, PHY_INIT); in bnx2x_54618se_config_init()
10970 bnx2x_calc_ieee_aneg_adv(phy, params, &vars->ieee_fc); in bnx2x_54618se_config_init()
11062 if ((phy->flags & FLAGS_EEE) && bnx2x_eee_has_cap(params)) { in bnx2x_54618se_config_init()
11072 rc = bnx2x_eee_initial_config(params, vars, SHMEM_EEE_1G_ADV); in bnx2x_54618se_config_init()
11075 bnx2x_eee_disable(phy, params, vars); in bnx2x_54618se_config_init()
11076 } else if ((params->eee_mode & EEE_MODE_ADV_LPI) && in bnx2x_54618se_config_init()
11078 (bnx2x_eee_calc_timer(params) || in bnx2x_54618se_config_init()
11079 !(params->eee_mode & EEE_MODE_ENABLE_LPI))) { in bnx2x_54618se_config_init()
11085 bnx2x_eee_advertise(phy, params, vars, in bnx2x_54618se_config_init()
11089 bnx2x_eee_disable(phy, params, vars); in bnx2x_54618se_config_init()
11097 if (params->feature_config_flags & in bnx2x_54618se_config_init()
11125 struct link_params *params, u8 mode) in bnx2x_5461x_set_link_led() argument
11127 struct bnx2x *bp = params->bp; in bnx2x_5461x_set_link_led()
11161 struct link_params *params) in bnx2x_54618se_link_reset() argument
11163 struct bnx2x *bp = params->bp; in bnx2x_54618se_link_reset()
11174 port = params->port; in bnx2x_54618se_link_reset()
11175 cfg_pin = (REG_RD(bp, params->shmem_base + in bnx2x_54618se_link_reset()
11186 struct link_params *params, in bnx2x_54618se_read_status() argument
11189 struct bnx2x *bp = params->bp; in bnx2x_54618se_read_status()
11254 bnx2x_ext_phy_resolve_fc(phy, params, vars); in bnx2x_54618se_read_status()
11285 bnx2x_eee_has_cap(params)) in bnx2x_54618se_read_status()
11286 bnx2x_eee_an_resolve(phy, params, vars); in bnx2x_54618se_read_status()
11293 struct link_params *params) in bnx2x_54618se_config_loopback() argument
11295 struct bnx2x *bp = params->bp; in bnx2x_54618se_config_loopback()
11297 u32 umac_base = params->port ? GRCBASE_UMAC1 : GRCBASE_UMAC0; in bnx2x_54618se_config_loopback()
11324 REG_WR(bp, NIG_REG_EGRESS_EMAC0_PORT + params->port*4, 1); in bnx2x_54618se_config_loopback()
11336 struct link_params *params) in bnx2x_7101_config_loopback() argument
11338 struct bnx2x *bp = params->bp; in bnx2x_7101_config_loopback()
11345 struct link_params *params, in bnx2x_7101_config_init() argument
11349 struct bnx2x *bp = params->bp; in bnx2x_7101_config_init()
11354 MISC_REGISTERS_GPIO_OUTPUT_HIGH, params->port); in bnx2x_7101_config_init()
11356 bnx2x_ext_phy_hw_reset(bp, params->port); in bnx2x_7101_config_init()
11357 bnx2x_wait_reset_complete(bp, phy, params); in bnx2x_7101_config_init()
11365 bnx2x_ext_phy_set_pause(params, phy, vars); in bnx2x_7101_config_init()
11379 bnx2x_save_spirom_version(bp, params->port, in bnx2x_7101_config_init()
11385 struct link_params *params, in bnx2x_7101_read_status() argument
11388 struct bnx2x *bp = params->bp; in bnx2x_7101_read_status()
11414 bnx2x_ext_phy_resolve_fc(phy, params, vars); in bnx2x_7101_read_status()
11463 struct link_params *params) { in bnx2x_7101_hw_reset() argument
11465 bnx2x_set_gpio(params->bp, MISC_REGISTERS_GPIO_2, in bnx2x_7101_hw_reset()
11466 MISC_REGISTERS_GPIO_OUTPUT_LOW, params->port); in bnx2x_7101_hw_reset()
11468 bnx2x_set_gpio(params->bp, MISC_REGISTERS_GPIO_1, in bnx2x_7101_hw_reset()
11469 MISC_REGISTERS_GPIO_OUTPUT_LOW, params->port); in bnx2x_7101_hw_reset()
11473 struct link_params *params, u8 mode) in bnx2x_7101_set_link_led() argument
11476 struct bnx2x *bp = params->bp; in bnx2x_7101_set_link_led()
12366 static void bnx2x_phy_def_cfg(struct link_params *params, in bnx2x_phy_def_cfg() argument
12370 struct bnx2x *bp = params->bp; in bnx2x_phy_def_cfg()
12374 link_config = REG_RD(bp, params->shmem_base + in bnx2x_phy_def_cfg()
12376 port_feature_config[params->port].link_config2)); in bnx2x_phy_def_cfg()
12377 phy->speed_cap_mask = REG_RD(bp, params->shmem_base + in bnx2x_phy_def_cfg()
12380 port_hw_config[params->port].speed_capability_mask2)); in bnx2x_phy_def_cfg()
12382 link_config = REG_RD(bp, params->shmem_base + in bnx2x_phy_def_cfg()
12384 port_feature_config[params->port].link_config)); in bnx2x_phy_def_cfg()
12385 phy->speed_cap_mask = REG_RD(bp, params->shmem_base + in bnx2x_phy_def_cfg()
12388 port_hw_config[params->port].speed_capability_mask)); in bnx2x_phy_def_cfg()
12439 u32 bnx2x_phy_selection(struct link_params *params) in bnx2x_phy_selection() argument
12444 phy_config_swapped = params->multi_phy_config & in bnx2x_phy_selection()
12447 prio_cfg = params->multi_phy_config & in bnx2x_phy_selection()
12471 int bnx2x_phy_probe(struct link_params *params) in bnx2x_phy_probe() argument
12475 struct bnx2x *bp = params->bp; in bnx2x_phy_probe()
12477 params->num_phys = 0; in bnx2x_phy_probe()
12479 phy_config_swapped = params->multi_phy_config & in bnx2x_phy_probe()
12494 phy = ¶ms->phy[actual_phy_idx]; in bnx2x_phy_probe()
12495 if (bnx2x_populate_phy(bp, phy_index, params->shmem_base, in bnx2x_phy_probe()
12496 params->shmem2_base, params->port, in bnx2x_phy_probe()
12498 params->num_phys = 0; in bnx2x_phy_probe()
12510 if (params->feature_config_flags & in bnx2x_phy_probe()
12514 if (!(params->feature_config_flags & in bnx2x_phy_probe()
12518 sync_offset = params->shmem_base + in bnx2x_phy_probe()
12520 dev_info.port_hw_config[params->port].media_type); in bnx2x_phy_probe()
12537 bnx2x_phy_def_cfg(params, phy, phy_index); in bnx2x_phy_probe()
12538 params->num_phys++; in bnx2x_phy_probe()
12541 DP(NETIF_MSG_LINK, "End phy probe. #phys found %x\n", params->num_phys); in bnx2x_phy_probe()
12545 static void bnx2x_init_bmac_loopback(struct link_params *params, in bnx2x_init_bmac_loopback() argument
12548 struct bnx2x *bp = params->bp; in bnx2x_init_bmac_loopback()
12557 bnx2x_xgxs_deassert(params); in bnx2x_init_bmac_loopback()
12560 bnx2x_bmac_enable(params, vars, 1, 1); in bnx2x_init_bmac_loopback()
12562 REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0); in bnx2x_init_bmac_loopback()
12565 static void bnx2x_init_emac_loopback(struct link_params *params, in bnx2x_init_emac_loopback() argument
12568 struct bnx2x *bp = params->bp; in bnx2x_init_emac_loopback()
12577 bnx2x_xgxs_deassert(params); in bnx2x_init_emac_loopback()
12579 bnx2x_emac_enable(params, vars, 1); in bnx2x_init_emac_loopback()
12580 bnx2x_emac_program(params, vars); in bnx2x_init_emac_loopback()
12581 REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0); in bnx2x_init_emac_loopback()
12584 static void bnx2x_init_xmac_loopback(struct link_params *params, in bnx2x_init_xmac_loopback() argument
12587 struct bnx2x *bp = params->bp; in bnx2x_init_xmac_loopback()
12589 if (!params->req_line_speed[0]) in bnx2x_init_xmac_loopback()
12592 vars->line_speed = params->req_line_speed[0]; in bnx2x_init_xmac_loopback()
12600 bnx2x_set_aer_mmd(params, ¶ms->phy[0]); in bnx2x_init_xmac_loopback()
12601 bnx2x_warpcore_reset_lane(bp, ¶ms->phy[0], 0); in bnx2x_init_xmac_loopback()
12602 params->phy[INT_PHY].config_loopback( in bnx2x_init_xmac_loopback()
12603 ¶ms->phy[INT_PHY], in bnx2x_init_xmac_loopback()
12604 params); in bnx2x_init_xmac_loopback()
12606 bnx2x_xmac_enable(params, vars, 1); in bnx2x_init_xmac_loopback()
12607 REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0); in bnx2x_init_xmac_loopback()
12610 static void bnx2x_init_umac_loopback(struct link_params *params, in bnx2x_init_umac_loopback() argument
12613 struct bnx2x *bp = params->bp; in bnx2x_init_umac_loopback()
12620 bnx2x_umac_enable(params, vars, 1); in bnx2x_init_umac_loopback()
12622 REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0); in bnx2x_init_umac_loopback()
12625 static void bnx2x_init_xgxs_loopback(struct link_params *params, in bnx2x_init_xgxs_loopback() argument
12628 struct bnx2x *bp = params->bp; in bnx2x_init_xgxs_loopback()
12629 struct bnx2x_phy *int_phy = ¶ms->phy[INT_PHY]; in bnx2x_init_xgxs_loopback()
12633 if (params->req_line_speed[0] == SPEED_1000) in bnx2x_init_xgxs_loopback()
12635 else if ((params->req_line_speed[0] == SPEED_20000) || in bnx2x_init_xgxs_loopback()
12642 bnx2x_xgxs_deassert(params); in bnx2x_init_xgxs_loopback()
12643 bnx2x_link_initialize(params, vars); in bnx2x_init_xgxs_loopback()
12645 if (params->req_line_speed[0] == SPEED_1000) { in bnx2x_init_xgxs_loopback()
12647 bnx2x_umac_enable(params, vars, 0); in bnx2x_init_xgxs_loopback()
12649 bnx2x_emac_program(params, vars); in bnx2x_init_xgxs_loopback()
12650 bnx2x_emac_enable(params, vars, 0); in bnx2x_init_xgxs_loopback()
12654 bnx2x_xmac_enable(params, vars, 0); in bnx2x_init_xgxs_loopback()
12656 bnx2x_bmac_enable(params, vars, 0, 1); in bnx2x_init_xgxs_loopback()
12659 if (params->loopback_mode == LOOPBACK_XGXS) { in bnx2x_init_xgxs_loopback()
12661 int_phy->config_loopback(int_phy, params); in bnx2x_init_xgxs_loopback()
12666 phy_index < params->num_phys; phy_index++) in bnx2x_init_xgxs_loopback()
12667 if (params->phy[phy_index].config_loopback) in bnx2x_init_xgxs_loopback()
12668 params->phy[phy_index].config_loopback( in bnx2x_init_xgxs_loopback()
12669 ¶ms->phy[phy_index], in bnx2x_init_xgxs_loopback()
12670 params); in bnx2x_init_xgxs_loopback()
12672 REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0); in bnx2x_init_xgxs_loopback()
12674 bnx2x_set_led(params, vars, LED_MODE_OPER, vars->line_speed); in bnx2x_init_xgxs_loopback()
12677 void bnx2x_set_rx_filter(struct link_params *params, u8 en) in bnx2x_set_rx_filter() argument
12679 struct bnx2x *bp = params->bp; in bnx2x_set_rx_filter()
12685 REG_WR(bp, NIG_REG_LLH0_BRB1_DRV_MASK + params->port*4, val); in bnx2x_set_rx_filter()
12688 REG_WR(bp, NIG_REG_LLH0_BRB1_DRV_MASK_MF + params->port*4, in bnx2x_set_rx_filter()
12692 REG_WR(bp, (params->port ? NIG_REG_LLH1_BRB1_NOT_MCP : in bnx2x_set_rx_filter()
12695 static int bnx2x_avoid_link_flap(struct link_params *params, in bnx2x_avoid_link_flap() argument
12700 struct bnx2x *bp = params->bp; in bnx2x_avoid_link_flap()
12702 bnx2x_set_mdio_emac_per_phy(bp, params); in bnx2x_avoid_link_flap()
12704 bnx2x_link_status_update(params, vars); in bnx2x_avoid_link_flap()
12711 for (phy_idx = INT_PHY; phy_idx < params->num_phys; phy_idx++) { in bnx2x_avoid_link_flap()
12712 struct bnx2x_phy *phy = ¶ms->phy[phy_idx]; in bnx2x_avoid_link_flap()
12715 phy->phy_specific_func(phy, params, PHY_INIT); in bnx2x_avoid_link_flap()
12720 bnx2x_verify_sfp_module(phy, params); in bnx2x_avoid_link_flap()
12722 lfa_sts = REG_RD(bp, params->lfa_base + in bnx2x_avoid_link_flap()
12734 params->port)); in bnx2x_avoid_link_flap()
12738 params->port)); in bnx2x_avoid_link_flap()
12741 bnx2x_umac_enable(params, vars, 0); in bnx2x_avoid_link_flap()
12743 bnx2x_xmac_enable(params, vars, 0); in bnx2x_avoid_link_flap()
12746 bnx2x_emac_enable(params, vars, 0); in bnx2x_avoid_link_flap()
12748 bnx2x_bmac_enable(params, vars, 0, !dont_clear_stat); in bnx2x_avoid_link_flap()
12759 REG_WR(bp, params->lfa_base + in bnx2x_avoid_link_flap()
12763 REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0); in bnx2x_avoid_link_flap()
12766 bnx2x_link_int_enable(params); in bnx2x_avoid_link_flap()
12770 static void bnx2x_cannot_avoid_link_flap(struct link_params *params, in bnx2x_cannot_avoid_link_flap() argument
12775 struct bnx2x *bp = params->bp; in bnx2x_cannot_avoid_link_flap()
12777 bnx2x_link_reset(params, vars, 1); in bnx2x_cannot_avoid_link_flap()
12779 if (!params->lfa_base) in bnx2x_cannot_avoid_link_flap()
12782 REG_WR(bp, params->lfa_base + in bnx2x_cannot_avoid_link_flap()
12784 params->req_duplex[0] | (params->req_duplex[1] << 16)); in bnx2x_cannot_avoid_link_flap()
12786 REG_WR(bp, params->lfa_base + in bnx2x_cannot_avoid_link_flap()
12788 params->req_flow_ctrl[0] | (params->req_flow_ctrl[1] << 16)); in bnx2x_cannot_avoid_link_flap()
12790 REG_WR(bp, params->lfa_base + in bnx2x_cannot_avoid_link_flap()
12792 params->req_line_speed[0] | (params->req_line_speed[1] << 16)); in bnx2x_cannot_avoid_link_flap()
12795 REG_WR(bp, params->lfa_base + in bnx2x_cannot_avoid_link_flap()
12798 params->speed_cap_mask[cfg_idx]); in bnx2x_cannot_avoid_link_flap()
12801 tmp_val = REG_RD(bp, params->lfa_base + in bnx2x_cannot_avoid_link_flap()
12804 tmp_val |= params->req_fc_auto_adv; in bnx2x_cannot_avoid_link_flap()
12806 REG_WR(bp, params->lfa_base + in bnx2x_cannot_avoid_link_flap()
12809 lfa_sts = REG_RD(bp, params->lfa_base + in bnx2x_cannot_avoid_link_flap()
12825 REG_WR(bp, params->lfa_base + in bnx2x_cannot_avoid_link_flap()
12830 int bnx2x_phy_init(struct link_params *params, struct link_vars *vars) in bnx2x_phy_init() argument
12833 struct bnx2x *bp = params->bp; in bnx2x_phy_init()
12836 params->req_line_speed[0], params->req_flow_ctrl[0]); in bnx2x_phy_init()
12838 params->req_line_speed[1], params->req_flow_ctrl[1]); in bnx2x_phy_init()
12839 DP(NETIF_MSG_LINK, "req_adv_flow_ctrl 0x%x\n", params->req_fc_auto_adv); in bnx2x_phy_init()
12849 params->link_flags = PHY_INITIALIZED; in bnx2x_phy_init()
12851 bnx2x_set_rx_filter(params, 1); in bnx2x_phy_init()
12852 bnx2x_chng_link_count(params, true); in bnx2x_phy_init()
12854 lfa_status = bnx2x_check_lfa(params); in bnx2x_phy_init()
12858 return bnx2x_avoid_link_flap(params, vars); in bnx2x_phy_init()
12863 bnx2x_cannot_avoid_link_flap(params, vars, lfa_status); in bnx2x_phy_init()
12866 bnx2x_bits_dis(bp, NIG_REG_MASK_INTERRUPT_PORT0 + params->port*4, in bnx2x_phy_init()
12872 bnx2x_emac_init(params, vars); in bnx2x_phy_init()
12874 if (params->feature_config_flags & FEATURE_CONFIG_PFC_ENABLED) in bnx2x_phy_init()
12877 if (params->num_phys == 0) { in bnx2x_phy_init()
12881 set_phy_vars(params, vars); in bnx2x_phy_init()
12883 DP(NETIF_MSG_LINK, "Num of phys on board: %d\n", params->num_phys); in bnx2x_phy_init()
12884 switch (params->loopback_mode) { in bnx2x_phy_init()
12886 bnx2x_init_bmac_loopback(params, vars); in bnx2x_phy_init()
12889 bnx2x_init_emac_loopback(params, vars); in bnx2x_phy_init()
12892 bnx2x_init_xmac_loopback(params, vars); in bnx2x_phy_init()
12895 bnx2x_init_umac_loopback(params, vars); in bnx2x_phy_init()
12899 bnx2x_init_xgxs_loopback(params, vars); in bnx2x_phy_init()
12903 if (params->switch_cfg == SWITCH_CFG_10G) in bnx2x_phy_init()
12904 bnx2x_xgxs_deassert(params); in bnx2x_phy_init()
12906 bnx2x_serdes_deassert(bp, params->port); in bnx2x_phy_init()
12908 bnx2x_link_initialize(params, vars); in bnx2x_phy_init()
12910 bnx2x_link_int_enable(params); in bnx2x_phy_init()
12913 bnx2x_update_mng(params, vars->link_status); in bnx2x_phy_init()
12915 bnx2x_update_mng_eee(params, vars->eee_status); in bnx2x_phy_init()
12919 int bnx2x_link_reset(struct link_params *params, struct link_vars *vars, in bnx2x_link_reset() argument
12922 struct bnx2x *bp = params->bp; in bnx2x_link_reset()
12923 u8 phy_index, port = params->port, clear_latch_ind = 0; in bnx2x_link_reset()
12927 bnx2x_chng_link_count(params, true); in bnx2x_link_reset()
12928 bnx2x_update_mng(params, vars->link_status); in bnx2x_link_reset()
12931 bnx2x_update_mng_eee(params, vars->eee_status); in bnx2x_link_reset()
12948 bnx2x_set_bmac_rx(bp, params->chip_id, port, 0); in bnx2x_link_reset()
12950 bnx2x_set_xmac_rxtx(params, 0); in bnx2x_link_reset()
12951 bnx2x_set_umac_rxtx(params, 0); in bnx2x_link_reset()
12962 bnx2x_set_mdio_emac_per_phy(bp, params); in bnx2x_link_reset()
12963 bnx2x_set_led(params, vars, LED_MODE_OFF, 0); in bnx2x_link_reset()
12966 for (phy_index = EXT_PHY1; phy_index < params->num_phys; in bnx2x_link_reset()
12968 if (params->phy[phy_index].link_reset) { in bnx2x_link_reset()
12969 bnx2x_set_aer_mmd(params, in bnx2x_link_reset()
12970 ¶ms->phy[phy_index]); in bnx2x_link_reset()
12971 params->phy[phy_index].link_reset( in bnx2x_link_reset()
12972 ¶ms->phy[phy_index], in bnx2x_link_reset()
12973 params); in bnx2x_link_reset()
12975 if (params->phy[phy_index].flags & in bnx2x_link_reset()
12987 if (params->phy[INT_PHY].link_reset) in bnx2x_link_reset()
12988 params->phy[INT_PHY].link_reset( in bnx2x_link_reset()
12989 ¶ms->phy[INT_PHY], params); in bnx2x_link_reset()
12999 u32 xmac_base = (params->port) ? GRCBASE_XMAC1 : GRCBASE_XMAC0; in bnx2x_link_reset()
13000 bnx2x_set_xumac_nig(params, 0, 0); in bnx2x_link_reset()
13010 int bnx2x_lfa_reset(struct link_params *params, in bnx2x_lfa_reset() argument
13013 struct bnx2x *bp = params->bp; in bnx2x_lfa_reset()
13016 params->link_flags &= ~PHY_INITIALIZED; in bnx2x_lfa_reset()
13017 if (!params->lfa_base) in bnx2x_lfa_reset()
13018 return bnx2x_link_reset(params, vars, 1); in bnx2x_lfa_reset()
13023 REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 1); in bnx2x_lfa_reset()
13030 bnx2x_set_bmac_rx(bp, params->chip_id, params->port, 0); in bnx2x_lfa_reset()
13033 bnx2x_set_xmac_rxtx(params, 0); in bnx2x_lfa_reset()
13034 bnx2x_set_umac_rxtx(params, 0); in bnx2x_lfa_reset()
13042 bnx2x_set_rx_filter(params, 0); in bnx2x_lfa_reset()
13051 bnx2x_set_bmac_rx(bp, params->chip_id, params->port, 1); in bnx2x_lfa_reset()
13054 bnx2x_set_xmac_rxtx(params, 1); in bnx2x_lfa_reset()
13055 bnx2x_set_umac_rxtx(params, 1); in bnx2x_lfa_reset()
13058 REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0); in bnx2x_lfa_reset()
13497 static void bnx2x_check_over_curr(struct link_params *params, in bnx2x_check_over_curr() argument
13500 struct bnx2x *bp = params->bp; in bnx2x_check_over_curr()
13502 u8 port = params->port; in bnx2x_check_over_curr()
13505 cfg_pin = (REG_RD(bp, params->shmem_base + in bnx2x_check_over_curr()
13524 params->port); in bnx2x_check_over_curr()
13526 bnx2x_warpcore_power_module(params, 0); in bnx2x_check_over_curr()
13533 static u8 bnx2x_analyze_link_error(struct link_params *params, in bnx2x_analyze_link_error() argument
13537 struct bnx2x *bp = params->bp; in bnx2x_analyze_link_error()
13573 REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 1); in bnx2x_analyze_link_error()
13586 REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0); in bnx2x_analyze_link_error()
13588 bnx2x_sync_link(params, vars); in bnx2x_analyze_link_error()
13590 bnx2x_set_led(params, vars, led_mode, SPEED_10000); in bnx2x_analyze_link_error()
13593 bnx2x_update_mng(params, vars->link_status); in bnx2x_analyze_link_error()
13612 static int bnx2x_check_half_open_conn(struct link_params *params, in bnx2x_check_half_open_conn() argument
13616 struct bnx2x *bp = params->bp; in bnx2x_check_half_open_conn()
13621 (REG_RD(bp, NIG_REG_EGRESS_EMAC0_PORT + params->port*4))) in bnx2x_check_half_open_conn()
13632 mac_base = (params->port) ? GRCBASE_XMAC1 : GRCBASE_XMAC0; in bnx2x_check_half_open_conn()
13642 bnx2x_analyze_link_error(params, vars, lss_status, in bnx2x_check_half_open_conn()
13646 (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << params->port)) { in bnx2x_check_half_open_conn()
13650 mac_base = params->port ? NIG_REG_INGRESS_BMAC1_MEM : in bnx2x_check_half_open_conn()
13661 bnx2x_analyze_link_error(params, vars, lss_status, in bnx2x_check_half_open_conn()
13668 struct link_params *params, in bnx2x_sfp_tx_fault_detection() argument
13671 struct bnx2x *bp = params->bp; in bnx2x_sfp_tx_fault_detection()
13673 u8 led_change, port = params->port; in bnx2x_sfp_tx_fault_detection()
13676 cfg_pin = (REG_RD(bp, params->shmem_base + offsetof(struct shmem_region, in bnx2x_sfp_tx_fault_detection()
13686 led_change = bnx2x_analyze_link_error(params, vars, value, in bnx2x_sfp_tx_fault_detection()
13706 bnx2x_set_e3_module_fault_led(params, led_mode); in bnx2x_sfp_tx_fault_detection()
13710 static void bnx2x_kr2_recovery(struct link_params *params, in bnx2x_kr2_recovery() argument
13714 struct bnx2x *bp = params->bp; in bnx2x_kr2_recovery()
13716 bnx2x_warpcore_enable_AN_KR2(phy, params, vars); in bnx2x_kr2_recovery()
13717 bnx2x_warpcore_restart_AN_KR(phy, params); in bnx2x_kr2_recovery()
13720 static void bnx2x_check_kr2_wa(struct link_params *params, in bnx2x_check_kr2_wa() argument
13724 struct bnx2x *bp = params->bp; in bnx2x_check_kr2_wa()
13738 sigdet = bnx2x_warpcore_get_sigdet(phy, params); in bnx2x_check_kr2_wa()
13740 if (!(params->link_attr_sync & LINK_ATTR_SYNC_KR2_ENABLE)) { in bnx2x_check_kr2_wa()
13741 bnx2x_kr2_recovery(params, vars, phy); in bnx2x_check_kr2_wa()
13747 lane = bnx2x_get_warpcore_lane(phy, params); in bnx2x_check_kr2_wa()
13754 bnx2x_set_aer_mmd(params, phy); in bnx2x_check_kr2_wa()
13758 if (!(params->link_attr_sync & LINK_ATTR_SYNC_KR2_ENABLE)) { in bnx2x_check_kr2_wa()
13759 bnx2x_kr2_recovery(params, vars, phy); in bnx2x_check_kr2_wa()
13774 if (!(params->link_attr_sync & LINK_ATTR_SYNC_KR2_ENABLE)) { in bnx2x_check_kr2_wa()
13778 bnx2x_kr2_recovery(params, vars, phy); in bnx2x_check_kr2_wa()
13786 bnx2x_disable_kr2(params, vars, phy); in bnx2x_check_kr2_wa()
13788 bnx2x_warpcore_restart_AN_KR(phy, params); in bnx2x_check_kr2_wa()
13793 void bnx2x_period_func(struct link_params *params, struct link_vars *vars) in bnx2x_period_func() argument
13796 struct bnx2x *bp = params->bp; in bnx2x_period_func()
13798 if (params->phy[phy_idx].flags & FLAGS_TX_ERROR_CHECK) { in bnx2x_period_func()
13799 bnx2x_set_aer_mmd(params, ¶ms->phy[phy_idx]); in bnx2x_period_func()
13800 if (bnx2x_check_half_open_conn(params, vars, 1) != in bnx2x_period_func()
13808 struct bnx2x_phy *phy = ¶ms->phy[INT_PHY]; in bnx2x_period_func()
13809 bnx2x_set_aer_mmd(params, phy); in bnx2x_period_func()
13812 bnx2x_check_kr2_wa(params, vars, phy); in bnx2x_period_func()
13813 bnx2x_check_over_curr(params, vars); in bnx2x_period_func()
13815 bnx2x_warpcore_config_runtime(phy, params, vars); in bnx2x_period_func()
13817 if ((REG_RD(bp, params->shmem_base + in bnx2x_period_func()
13819 port_hw_config[params->port].default_cfg)) in bnx2x_period_func()
13822 if (bnx2x_is_sfp_module_plugged(phy, params)) { in bnx2x_period_func()
13823 bnx2x_sfp_tx_fault_detection(phy, params, vars); in bnx2x_period_func()
13830 bnx2x_update_mng(params, vars->link_status); in bnx2x_period_func()
13857 void bnx2x_hw_reset_phy(struct link_params *params) in bnx2x_hw_reset_phy() argument
13860 struct bnx2x *bp = params->bp; in bnx2x_hw_reset_phy()
13861 bnx2x_update_mng(params, 0); in bnx2x_hw_reset_phy()
13862 bnx2x_bits_dis(bp, NIG_REG_MASK_INTERRUPT_PORT0 + params->port*4, in bnx2x_hw_reset_phy()
13870 if (params->phy[phy_index].hw_reset) { in bnx2x_hw_reset_phy()
13871 params->phy[phy_index].hw_reset( in bnx2x_hw_reset_phy()
13872 ¶ms->phy[phy_index], in bnx2x_hw_reset_phy()
13873 params); in bnx2x_hw_reset_phy()
13874 params->phy[phy_index] = phy_null; in bnx2x_hw_reset_phy()