1423 static void bnx2x_set_mdio_clk(struct bnx2x *bp, u32 chip_id,  in bnx2x_set_mdio_clk()  argument
1460 		bnx2x_set_mdio_clk(bp, params->chip_id,  in bnx2x_set_mdio_emac_per_phy()
2452 static void bnx2x_set_bmac_rx(struct bnx2x *bp, u32 chip_id, u8 port, u8 en)  in bnx2x_set_bmac_rx()  argument
2681 	u32 chip_id;  in bnx2x_cl45_read()  local
2683 		chip_id = (REG_RD(bp, MISC_REG_CHIP_NUM) << 16) |  in bnx2x_cl45_read()
2685 		bnx2x_set_mdio_clk(bp, chip_id, phy->mdio_ctrl);  in bnx2x_cl45_read()
2756 	u32 chip_id;  in bnx2x_cl45_write()  local
2758 		chip_id = (REG_RD(bp, MISC_REG_CHIP_NUM) << 16) |  in bnx2x_cl45_write()
2760 		bnx2x_set_mdio_clk(bp, chip_id, phy->mdio_ctrl);  in bnx2x_cl45_write()
4335 						u32 chip_id,  in bnx2x_get_mod_abs_int_cfg()  argument
4379 	if (bnx2x_get_mod_abs_int_cfg(bp, params->chip_id,  in bnx2x_is_sfp_module_plugged()
6673 		bnx2x_set_bmac_rx(bp, params->chip_id, params->port, 0);  in bnx2x_update_link_down()
8764 	if (bnx2x_get_mod_abs_int_cfg(bp, params->chip_id, params->shmem_base,  in bnx2x_handle_module_detect_int()
10145 				      u32 chip_id)  in bnx2x_84833_get_reset_gpios()  argument
10204 						  params->chip_id);  in bnx2x_84833_hw_reset_phy()
12093 	u32 chip_id;  in bnx2x_populate_int_phy()  local
12098 	chip_id = (REG_RD(bp, MISC_REG_CHIP_NUM) << 16) |  in bnx2x_populate_int_phy()
12101 	DP(NETIF_MSG_LINK, ":chip_id = 0x%x\n", chip_id);  in bnx2x_populate_int_phy()
12948 			bnx2x_set_bmac_rx(bp, params->chip_id, port, 0);  in bnx2x_link_reset()
13030 		bnx2x_set_bmac_rx(bp, params->chip_id, params->port, 0);  in bnx2x_lfa_reset()
13051 		bnx2x_set_bmac_rx(bp, params->chip_id, params->port, 1);  in bnx2x_lfa_reset()
13068 				      u32 chip_id)  in bnx2x_8073_common_init_phy()  argument
13194 				      u32 chip_id)  in bnx2x_8726_common_init_phy()  argument
13289 				      u32 chip_id)  in bnx2x_8727_common_init_phy()  argument
13389 						u32 chip_id)  in bnx2x_84833_common_init_phy()  argument
13392 	reset_gpios = bnx2x_84833_get_reset_gpios(bp, shmem_base_path, chip_id);  in bnx2x_84833_common_init_phy()
13403 				     u32 ext_phy_type, u32 chip_id)  in bnx2x_ext_phy_common_init()  argument
13411 						phy_index, chip_id);  in bnx2x_ext_phy_common_init()
13418 						phy_index, chip_id);  in bnx2x_ext_phy_common_init()
13427 						phy_index, chip_id);  in bnx2x_ext_phy_common_init()
13437 						phy_index, chip_id);  in bnx2x_ext_phy_common_init()
13457 			  u32 shmem2_base_path[], u32 chip_id)  in bnx2x_common_init_phy()  argument
13464 	bnx2x_set_mdio_clk(bp, chip_id, GRCBASE_EMAC0);  in bnx2x_common_init_phy()
13465 	bnx2x_set_mdio_clk(bp, chip_id, GRCBASE_EMAC1);  in bnx2x_common_init_phy()
13492 						chip_id);  in bnx2x_common_init_phy()
13880 			    u32 chip_id, u32 shmem_base, u32 shmem2_base,  in bnx2x_init_mod_abs_int()  argument
13887 		if (bnx2x_get_mod_abs_int_cfg(bp, chip_id,  in bnx2x_init_mod_abs_int()