Lines Matching refs:reg_mask
570 } reg_mask; /* Register mask (all valid bits) */ member
696 return bnx2x_blocks_parity_data[idx].reg_mask.e1; in bnx2x_parity_reg_mask()
698 return bnx2x_blocks_parity_data[idx].reg_mask.e1h; in bnx2x_parity_reg_mask()
700 return bnx2x_blocks_parity_data[idx].reg_mask.e2; in bnx2x_parity_reg_mask()
702 return bnx2x_blocks_parity_data[idx].reg_mask.e3; in bnx2x_parity_reg_mask()
742 u32 reg_mask = bnx2x_parity_reg_mask(bp, i); in bnx2x_clear_blocks_parity() local
744 if (reg_mask) { in bnx2x_clear_blocks_parity()
747 if (reg_val & reg_mask) in bnx2x_clear_blocks_parity()
751 reg_val & reg_mask); in bnx2x_clear_blocks_parity()
775 u32 reg_mask = bnx2x_parity_reg_mask(bp, i); in bnx2x_enable_blocks_parity() local
777 if (reg_mask) in bnx2x_enable_blocks_parity()
779 bnx2x_blocks_parity_data[i].en_mask & reg_mask); in bnx2x_enable_blocks_parity()