Lines Matching refs:u32
20 u32 reserved[6];
22 u32 max_iscsi_conn;
28 u32 reserved_a;
30 u32 max_fcoe_conn;
36 u32 reserved_b[4];
120 u32 upper;
121 u32 lower;
128 u32 config; /* 0x114 */
197 u32 config2; /* 0x118 */
285 u32 config_3; /* 0x11C */
291 u32 ump_nc_si_config; /* 0x120 */
307 u32 board; /* 0x124 */
322 u32 wc_lane_config; /* 0x128 */
362 u32 pci_id;
366 u32 pci_sub_id;
370 u32 power_dissipated;
380 u32 power_consumed;
390 u32 mac_upper;
393 u32 mac_lower;
395 u32 iscsi_mac_upper; /* Upper 16 bits are always zeroes */
396 u32 iscsi_mac_lower;
398 u32 rdma_mac_upper; /* Upper 16 bits are always zeroes */
399 u32 rdma_mac_lower;
401 u32 serdes_config;
410 u32 pf_config; /* 0x158 */
421 u32 vf_config; /* 0x15C */
428 u32 mf_pci_id; /* 0x160 */
433 u32 sfp_ctrl; /* 0x164 */
453 u32 e3_sfp_ctrl; /* 0x168 */
475 u32 e3_cmn_pin_cfg; /* 0x16C */
501 u32 e3_cmn_pin_cfg1; /* 0x170 */
506 u32 generic_features; /* 0x174 */
516 u32 sfi_tap_values; /* 0x178 */
538 u32 reserved0[5]; /* 0x17c */
540 u32 aeu_int_mask; /* 0x190 */
542 u32 media_type; /* 0x194 */
561 u32 fcoe_fip_mac_upper;
564 u32 fcoe_fip_mac_lower;
566 u32 fcoe_wwn_port_name_upper;
567 u32 fcoe_wwn_port_name_lower;
569 u32 fcoe_wwn_node_name_upper;
570 u32 fcoe_wwn_node_name_lower;
572 u32 Reserved1[49]; /* 0x1C0 */
576 u32 xgbt_phy_cfg; /* 0x284 */
580 u32 default_cfg; /* 0x288 */
663 u32 speed_capability_mask2; /* 0x28C */
691 u32 multi_phy_config; /* 0x290 */
709 u32 external_phy_config2; /* 0x294 */
744 u32 lane_config;
768 u32 external_phy_config;
807 u32 speed_capability_mask;
833 u32 backup_mac_upper; /* 0x2B4 */
834 u32 backup_mac_lower; /* 0x2B8 */
844 u32 config; /* 0x450 */
892 u32 config;
960 u32 wol_config;
972 u32 mba_config;
1028 u32 bmc_config;
1033 u32 mba_vlan_cfg;
1038 u32 resource_cfg;
1045 u32 smbus_config;
1049 u32 vf_config;
1069 u32 link_config; /* Used as HW defaults for the driver */
1101 u32 mfw_wol_link_cfg;
1105 u32 link_config2; /* 0x47C */
1109 u32 mfw_wol_link_cfg2; /* 0x480 */
1113 u32 eee_power_mode; /* 0x484 */
1122 u32 Reserved2[16]; /* 0x488 */
1131 u32 bc_rev; /* 8 bits each: major, minor, build */ /* 4 */
1191 u32 link_status;
1254 u32 port_stx;
1256 u32 stat_nig_timer;
1259 u32 ext_phy_fw_version;
1266 u32 drv_mb_header;
1339 u32 drv_mb_param;
1348 u32 fw_mb_header;
1409 u32 fw_mb_param;
1411 u32 drv_pulse_mb;
1425 u32 mcp_pulse_mb;
1433 u32 iscsi_boot_signature;
1434 u32 iscsi_boot_block_offset;
1436 u32 drv_status;
1468 u32 virt_mac_upper;
1471 u32 virt_mac_lower;
1483 u32 opaque[MGMTFW_STATE_WORD_SIZE];
1492 u32 clp_mb;
1503 u32 dynamic_cfg; /* device control channel */
1508 u32 reserved[1];
1514 u32 config;
1545 u32 mac_upper; /* MAC */
1549 u32 mac_lower;
1552 u32 e1hov_tag; /* VNI */
1561 u32 afex_config;
1570 u32 reserved;
1581 u32 func_cfg;
1590 u32 iscsi_mac_addr_upper;
1591 u32 iscsi_mac_addr_lower;
1593 u32 fcoe_mac_addr_upper;
1594 u32 fcoe_mac_addr_lower;
1596 u32 fcoe_wwn_port_name_upper;
1597 u32 fcoe_wwn_port_name_lower;
1599 u32 fcoe_wwn_node_name_upper;
1600 u32 fcoe_wwn_node_name_lower;
1602 u32 preserve_data;
1630 u32 validity_map[PORT_MAX]; /* 0x0 (4*2 = 0x8) */
1656 u32 fw_info_fio_offset; /* 0x4a8 (0x4) */
1688 u32 pf_ack;
1689 u32 vf_ack[1];
1690 u32 iov_dis_ack;
1694 u32 aggint;
1695 u32 opgen_addr;
1700 u32 tx_tw;
1701 u32 rx_tw;
1785 u32 enabled;
1786 u32 pg_bw_tbl[2];
1787 u32 pri_pg_tbl[1];
1903 u32 peer_chassis_id[REM_CHASSIS_ID_STAT_LEN];
1905 u32 peer_port_id[REM_PORT_ID_STAT_LEN];
1912 u32 local_chassis_id[LOCAL_CHASSIS_ID_STAT_LEN];
1914 u32 local_port_id[LOCAL_PORT_ID_STAT_LEN];
1916 u32 num_tx_dcbx_pkts;
1918 u32 num_rx_dcbx_pkts;
1923 u32 ver_cfg_flags;
1944 u32 prefix_seq_num;
1945 u32 flags;
1958 u32 suffix_seq_num;
1963 u32 prefix_seq_num;
1965 u32 error;
1976 u32 suffix_seq_num;
1985 u32 req_duplex;
1990 u32 req_flow_ctrl;
1995 u32 req_line_speed; /* Also determine AutoNeg */
2000 u32 speed_cap_mask[SHMEM_LINK_CONFIG_SIZE];
2001 u32 additional_config;
2005 u32 lfa_sts;
2042 u32 versions[MAX_DRV_PERS];
2046 u32 fcoe_features1;
2053 u32 fcoe_features2;
2060 u32 fcoe_features3;
2067 u32 fcoe_features4;
2087 u32 hdr;
2088 u32 num_of_npiv;
2098 u32 epoc;
2099 u32 drv_ver;
2100 u32 fw_ver;
2102 u32 valid_dump;
2106 u32 flags;
2112 u32 driver_version[4];
2118 u32 size; /* 0x0000 */
2120 u32 dcc_support; /* 0x0004 */
2128 u32 ext_phy_fw_version2[PORT_MAX]; /* 0x0008 */
2134 u32 mf_cfg_addr; /* 0x0010 */
2138 u32 dcbx_lldp_params_offset; /* 0x0028 */
2140 u32 dcbx_neg_res_offset; /* 0x002c */
2142 u32 dcbx_remote_mib_offset; /* 0x0030 */
2150 u32 other_shmem_base_addr; /* 0x0034 */
2151 u32 other_shmem2_base_addr; /* 0x0038 */
2156 u32 mcp_vf_disabled[E2_VF_MAX / 32]; /* 0x003c */
2162 u32 drv_ack_vf_disabled[E2_FUNC_MAX][E2_VF_MAX / 32]; /* 0x0044 */
2164 u32 dcbx_lldp_dcbx_stat_offset; /* 0x0064 */
2176 u32 edebug_driver_if[2]; /* 0x0068 */
2181 u32 nvm_retain_bitmap_addr; /* 0x0070 */
2184 u32 afex_driver_support; /* 0x0074 */
2190 u32 afex_scratchpad_addr_to_write[E2_FUNC_MAX];
2195 u32 afex_param1_to_driver[E2_FUNC_MAX]; /* 0x0088 */
2196 u32 afex_param2_to_driver[E2_FUNC_MAX]; /* 0x0098 */
2198 u32 swim_base_addr; /* 0x0108 */
2199 u32 swim_funcs;
2200 u32 swim_main_cb;
2205 u32 afex_profiles_enabled[2];
2208 u32 drv_flags;
2217 u32 extended_dev_info_shared_addr;
2218 u32 ncsi_oem_data_addr;
2220 u32 ocsd_host_addr; /* initialized by option ROM */
2221 u32 ocbb_host_addr; /* initialized by option ROM */
2222 u32 ocsd_req_update_interval; /* initialized by option ROM */
2223 u32 temperature_in_half_celsius;
2224 u32 glob_struct_in_host;
2226 u32 dcbx_neg_res_ext_offset;
2229 u32 drv_capabilities_flag[E2_FUNC_MAX];
2237 u32 extended_dev_info_shared_cfg_size;
2239 u32 dcbx_en[PORT_MAX];
2242 u32 multi_thread_data_offset;
2245 u32 drv_info_host_addr_lo;
2246 u32 drv_info_host_addr_hi;
2249 u32 drv_info_control;
2254 u32 ibft_host_addr; /* initialized by option ROM */
2256 u32 reserved[E2_FUNC_MAX];
2273 u32 eee_status[PORT_MAX];
2289 u32 sizeof_port_stats;
2292 u32 lfa_host_addr[PORT_MAX];
2293 u32 reserved1;
2295 u32 reserved2; /* Offset 0x148 */
2296 u32 reserved3; /* Offset 0x14C */
2297 u32 reserved4; /* Offset 0x150 */
2298 u32 link_attr_sync[PORT_MAX]; /* Offset 0x154 */
2307 u32 reserved5[2];
2308 u32 link_change_count[PORT_MAX]; /* Offset 0x160-0x164 */
2314 u32 mfw_drv_indication;
2332 u32 oem_i2c_data_addr;
2340 u32 c2s_pcp_map_lower[E2_FUNC_MAX]; /* 0x1a4 */
2346 u32 c2s_pcp_map_upper[E2_FUNC_MAX]; /* 0x1b4 */
2349 u32 c2s_pcp_map_default[E2_FUNC_MAX]; /* 0x1c4 */
2352 u32 fc_npiv_nvram_tbl_addr[PORT_MAX]; /* 0x1d4 */
2360 u32 netproc_fw_ver; /* 0x1e0 */
2363 u32 clp_ver; /* 0x1e4 */
2365 u32 pcie_bus_num; /* 0x1e8 */
2367 u32 sriov_switch_mode; /* 0x1ec */
2374 u32 img_inv_table_addr; /* Address to INV_TABLE_P */ /* 0x1f4 */
2376 u32 mtu_size[E2_FUNC_MAX]; /* 0x1f8 */
2378 u32 os_driver_state[E2_FUNC_MAX]; /* 0x208 */
2390 u32 rx_stat_ifhcinoctets;
2391 u32 rx_stat_ifhcinbadoctets;
2392 u32 rx_stat_etherstatsfragments;
2393 u32 rx_stat_ifhcinucastpkts;
2394 u32 rx_stat_ifhcinmulticastpkts;
2395 u32 rx_stat_ifhcinbroadcastpkts;
2396 u32 rx_stat_dot3statsfcserrors;
2397 u32 rx_stat_dot3statsalignmenterrors;
2398 u32 rx_stat_dot3statscarriersenseerrors;
2399 u32 rx_stat_xonpauseframesreceived;
2400 u32 rx_stat_xoffpauseframesreceived;
2401 u32 rx_stat_maccontrolframesreceived;
2402 u32 rx_stat_xoffstateentered;
2403 u32 rx_stat_dot3statsframestoolong;
2404 u32 rx_stat_etherstatsjabbers;
2405 u32 rx_stat_etherstatsundersizepkts;
2406 u32 rx_stat_etherstatspkts64octets;
2407 u32 rx_stat_etherstatspkts65octetsto127octets;
2408 u32 rx_stat_etherstatspkts128octetsto255octets;
2409 u32 rx_stat_etherstatspkts256octetsto511octets;
2410 u32 rx_stat_etherstatspkts512octetsto1023octets;
2411 u32 rx_stat_etherstatspkts1024octetsto1522octets;
2412 u32 rx_stat_etherstatspktsover1522octets;
2414 u32 rx_stat_falsecarriererrors;
2416 u32 tx_stat_ifhcoutoctets;
2417 u32 tx_stat_ifhcoutbadoctets;
2418 u32 tx_stat_etherstatscollisions;
2419 u32 tx_stat_outxonsent;
2420 u32 tx_stat_outxoffsent;
2421 u32 tx_stat_flowcontroldone;
2422 u32 tx_stat_dot3statssinglecollisionframes;
2423 u32 tx_stat_dot3statsmultiplecollisionframes;
2424 u32 tx_stat_dot3statsdeferredtransmissions;
2425 u32 tx_stat_dot3statsexcessivecollisions;
2426 u32 tx_stat_dot3statslatecollisions;
2427 u32 tx_stat_ifhcoutucastpkts;
2428 u32 tx_stat_ifhcoutmulticastpkts;
2429 u32 tx_stat_ifhcoutbroadcastpkts;
2430 u32 tx_stat_etherstatspkts64octets;
2431 u32 tx_stat_etherstatspkts65octetsto127octets;
2432 u32 tx_stat_etherstatspkts128octetsto255octets;
2433 u32 tx_stat_etherstatspkts256octetsto511octets;
2434 u32 tx_stat_etherstatspkts512octetsto1023octets;
2435 u32 tx_stat_etherstatspkts1024octetsto1522octets;
2436 u32 tx_stat_etherstatspktsover1522octets;
2437 u32 tx_stat_dot3statsinternalmactransmiterrors;
2442 u32 tx_stat_gtpkt_lo;
2443 u32 tx_stat_gtpkt_hi;
2444 u32 tx_stat_gtxpf_lo;
2445 u32 tx_stat_gtxpf_hi;
2446 u32 tx_stat_gtfcs_lo;
2447 u32 tx_stat_gtfcs_hi;
2448 u32 tx_stat_gtmca_lo;
2449 u32 tx_stat_gtmca_hi;
2450 u32 tx_stat_gtbca_lo;
2451 u32 tx_stat_gtbca_hi;
2452 u32 tx_stat_gtfrg_lo;
2453 u32 tx_stat_gtfrg_hi;
2454 u32 tx_stat_gtovr_lo;
2455 u32 tx_stat_gtovr_hi;
2456 u32 tx_stat_gt64_lo;
2457 u32 tx_stat_gt64_hi;
2458 u32 tx_stat_gt127_lo;
2459 u32 tx_stat_gt127_hi;
2460 u32 tx_stat_gt255_lo;
2461 u32 tx_stat_gt255_hi;
2462 u32 tx_stat_gt511_lo;
2463 u32 tx_stat_gt511_hi;
2464 u32 tx_stat_gt1023_lo;
2465 u32 tx_stat_gt1023_hi;
2466 u32 tx_stat_gt1518_lo;
2467 u32 tx_stat_gt1518_hi;
2468 u32 tx_stat_gt2047_lo;
2469 u32 tx_stat_gt2047_hi;
2470 u32 tx_stat_gt4095_lo;
2471 u32 tx_stat_gt4095_hi;
2472 u32 tx_stat_gt9216_lo;
2473 u32 tx_stat_gt9216_hi;
2474 u32 tx_stat_gt16383_lo;
2475 u32 tx_stat_gt16383_hi;
2476 u32 tx_stat_gtmax_lo;
2477 u32 tx_stat_gtmax_hi;
2478 u32 tx_stat_gtufl_lo;
2479 u32 tx_stat_gtufl_hi;
2480 u32 tx_stat_gterr_lo;
2481 u32 tx_stat_gterr_hi;
2482 u32 tx_stat_gtbyt_lo;
2483 u32 tx_stat_gtbyt_hi;
2485 u32 rx_stat_gr64_lo;
2486 u32 rx_stat_gr64_hi;
2487 u32 rx_stat_gr127_lo;
2488 u32 rx_stat_gr127_hi;
2489 u32 rx_stat_gr255_lo;
2490 u32 rx_stat_gr255_hi;
2491 u32 rx_stat_gr511_lo;
2492 u32 rx_stat_gr511_hi;
2493 u32 rx_stat_gr1023_lo;
2494 u32 rx_stat_gr1023_hi;
2495 u32 rx_stat_gr1518_lo;
2496 u32 rx_stat_gr1518_hi;
2497 u32 rx_stat_gr2047_lo;
2498 u32 rx_stat_gr2047_hi;
2499 u32 rx_stat_gr4095_lo;
2500 u32 rx_stat_gr4095_hi;
2501 u32 rx_stat_gr9216_lo;
2502 u32 rx_stat_gr9216_hi;
2503 u32 rx_stat_gr16383_lo;
2504 u32 rx_stat_gr16383_hi;
2505 u32 rx_stat_grmax_lo;
2506 u32 rx_stat_grmax_hi;
2507 u32 rx_stat_grpkt_lo;
2508 u32 rx_stat_grpkt_hi;
2509 u32 rx_stat_grfcs_lo;
2510 u32 rx_stat_grfcs_hi;
2511 u32 rx_stat_grmca_lo;
2512 u32 rx_stat_grmca_hi;
2513 u32 rx_stat_grbca_lo;
2514 u32 rx_stat_grbca_hi;
2515 u32 rx_stat_grxcf_lo;
2516 u32 rx_stat_grxcf_hi;
2517 u32 rx_stat_grxpf_lo;
2518 u32 rx_stat_grxpf_hi;
2519 u32 rx_stat_grxuo_lo;
2520 u32 rx_stat_grxuo_hi;
2521 u32 rx_stat_grjbr_lo;
2522 u32 rx_stat_grjbr_hi;
2523 u32 rx_stat_grovr_lo;
2524 u32 rx_stat_grovr_hi;
2525 u32 rx_stat_grflr_lo;
2526 u32 rx_stat_grflr_hi;
2527 u32 rx_stat_grmeg_lo;
2528 u32 rx_stat_grmeg_hi;
2529 u32 rx_stat_grmeb_lo;
2530 u32 rx_stat_grmeb_hi;
2531 u32 rx_stat_grbyt_lo;
2532 u32 rx_stat_grbyt_hi;
2533 u32 rx_stat_grund_lo;
2534 u32 rx_stat_grund_hi;
2535 u32 rx_stat_grfrg_lo;
2536 u32 rx_stat_grfrg_hi;
2537 u32 rx_stat_grerb_lo;
2538 u32 rx_stat_grerb_hi;
2539 u32 rx_stat_grfre_lo;
2540 u32 rx_stat_grfre_hi;
2541 u32 rx_stat_gripj_lo;
2542 u32 rx_stat_gripj_hi;
2546 u32 tx_stat_gtpk_lo; /* gtpok */
2547 u32 tx_stat_gtpk_hi; /* gtpok */
2548 u32 tx_stat_gtxpf_lo; /* gtpf */
2549 u32 tx_stat_gtxpf_hi; /* gtpf */
2550 u32 tx_stat_gtpp_lo; /* NEW BMAC2 */
2551 u32 tx_stat_gtpp_hi; /* NEW BMAC2 */
2552 u32 tx_stat_gtfcs_lo;
2553 u32 tx_stat_gtfcs_hi;
2554 u32 tx_stat_gtuca_lo; /* NEW BMAC2 */
2555 u32 tx_stat_gtuca_hi; /* NEW BMAC2 */
2556 u32 tx_stat_gtmca_lo;
2557 u32 tx_stat_gtmca_hi;
2558 u32 tx_stat_gtbca_lo;
2559 u32 tx_stat_gtbca_hi;
2560 u32 tx_stat_gtovr_lo;
2561 u32 tx_stat_gtovr_hi;
2562 u32 tx_stat_gtfrg_lo;
2563 u32 tx_stat_gtfrg_hi;
2564 u32 tx_stat_gtpkt1_lo; /* gtpkt */
2565 u32 tx_stat_gtpkt1_hi; /* gtpkt */
2566 u32 tx_stat_gt64_lo;
2567 u32 tx_stat_gt64_hi;
2568 u32 tx_stat_gt127_lo;
2569 u32 tx_stat_gt127_hi;
2570 u32 tx_stat_gt255_lo;
2571 u32 tx_stat_gt255_hi;
2572 u32 tx_stat_gt511_lo;
2573 u32 tx_stat_gt511_hi;
2574 u32 tx_stat_gt1023_lo;
2575 u32 tx_stat_gt1023_hi;
2576 u32 tx_stat_gt1518_lo;
2577 u32 tx_stat_gt1518_hi;
2578 u32 tx_stat_gt2047_lo;
2579 u32 tx_stat_gt2047_hi;
2580 u32 tx_stat_gt4095_lo;
2581 u32 tx_stat_gt4095_hi;
2582 u32 tx_stat_gt9216_lo;
2583 u32 tx_stat_gt9216_hi;
2584 u32 tx_stat_gt16383_lo;
2585 u32 tx_stat_gt16383_hi;
2586 u32 tx_stat_gtmax_lo;
2587 u32 tx_stat_gtmax_hi;
2588 u32 tx_stat_gtufl_lo;
2589 u32 tx_stat_gtufl_hi;
2590 u32 tx_stat_gterr_lo;
2591 u32 tx_stat_gterr_hi;
2592 u32 tx_stat_gtbyt_lo;
2593 u32 tx_stat_gtbyt_hi;
2595 u32 rx_stat_gr64_lo;
2596 u32 rx_stat_gr64_hi;
2597 u32 rx_stat_gr127_lo;
2598 u32 rx_stat_gr127_hi;
2599 u32 rx_stat_gr255_lo;
2600 u32 rx_stat_gr255_hi;
2601 u32 rx_stat_gr511_lo;
2602 u32 rx_stat_gr511_hi;
2603 u32 rx_stat_gr1023_lo;
2604 u32 rx_stat_gr1023_hi;
2605 u32 rx_stat_gr1518_lo;
2606 u32 rx_stat_gr1518_hi;
2607 u32 rx_stat_gr2047_lo;
2608 u32 rx_stat_gr2047_hi;
2609 u32 rx_stat_gr4095_lo;
2610 u32 rx_stat_gr4095_hi;
2611 u32 rx_stat_gr9216_lo;
2612 u32 rx_stat_gr9216_hi;
2613 u32 rx_stat_gr16383_lo;
2614 u32 rx_stat_gr16383_hi;
2615 u32 rx_stat_grmax_lo;
2616 u32 rx_stat_grmax_hi;
2617 u32 rx_stat_grpkt_lo;
2618 u32 rx_stat_grpkt_hi;
2619 u32 rx_stat_grfcs_lo;
2620 u32 rx_stat_grfcs_hi;
2621 u32 rx_stat_gruca_lo;
2622 u32 rx_stat_gruca_hi;
2623 u32 rx_stat_grmca_lo;
2624 u32 rx_stat_grmca_hi;
2625 u32 rx_stat_grbca_lo;
2626 u32 rx_stat_grbca_hi;
2627 u32 rx_stat_grxpf_lo; /* grpf */
2628 u32 rx_stat_grxpf_hi; /* grpf */
2629 u32 rx_stat_grpp_lo;
2630 u32 rx_stat_grpp_hi;
2631 u32 rx_stat_grxuo_lo; /* gruo */
2632 u32 rx_stat_grxuo_hi; /* gruo */
2633 u32 rx_stat_grjbr_lo;
2634 u32 rx_stat_grjbr_hi;
2635 u32 rx_stat_grovr_lo;
2636 u32 rx_stat_grovr_hi;
2637 u32 rx_stat_grxcf_lo; /* grcf */
2638 u32 rx_stat_grxcf_hi; /* grcf */
2639 u32 rx_stat_grflr_lo;
2640 u32 rx_stat_grflr_hi;
2641 u32 rx_stat_grpok_lo;
2642 u32 rx_stat_grpok_hi;
2643 u32 rx_stat_grmeg_lo;
2644 u32 rx_stat_grmeg_hi;
2645 u32 rx_stat_grmeb_lo;
2646 u32 rx_stat_grmeb_hi;
2647 u32 rx_stat_grbyt_lo;
2648 u32 rx_stat_grbyt_hi;
2649 u32 rx_stat_grund_lo;
2650 u32 rx_stat_grund_hi;
2651 u32 rx_stat_grfrg_lo;
2652 u32 rx_stat_grfrg_hi;
2653 u32 rx_stat_grerb_lo; /* grerrbyt */
2654 u32 rx_stat_grerb_hi; /* grerrbyt */
2655 u32 rx_stat_grfre_lo; /* grfrerr */
2656 u32 rx_stat_grfre_hi; /* grfrerr */
2657 u32 rx_stat_gripj_lo;
2658 u32 rx_stat_gripj_hi;
2666 u32 tx_gtxpok_lo;
2667 u32 tx_gtxpok_hi;
2668 u32 tx_gtxpf_lo;
2669 u32 tx_gtxpf_hi;
2670 u32 tx_gtxpp_lo;
2671 u32 tx_gtxpp_hi;
2672 u32 tx_gtfcs_lo;
2673 u32 tx_gtfcs_hi;
2674 u32 tx_gtuca_lo;
2675 u32 tx_gtuca_hi;
2676 u32 tx_gtmca_lo;
2677 u32 tx_gtmca_hi;
2678 u32 tx_gtgca_lo;
2679 u32 tx_gtgca_hi;
2680 u32 tx_gtpkt_lo;
2681 u32 tx_gtpkt_hi;
2682 u32 tx_gt64_lo;
2683 u32 tx_gt64_hi;
2684 u32 tx_gt127_lo;
2685 u32 tx_gt127_hi;
2686 u32 tx_gt255_lo;
2687 u32 tx_gt255_hi;
2688 u32 tx_gt511_lo;
2689 u32 tx_gt511_hi;
2690 u32 tx_gt1023_lo;
2691 u32 tx_gt1023_hi;
2692 u32 tx_gt1518_lo;
2693 u32 tx_gt1518_hi;
2694 u32 tx_gt2047_lo;
2695 u32 tx_gt2047_hi;
2696 u32 tx_gt4095_lo;
2697 u32 tx_gt4095_hi;
2698 u32 tx_gt9216_lo;
2699 u32 tx_gt9216_hi;
2700 u32 tx_gt16383_lo;
2701 u32 tx_gt16383_hi;
2702 u32 tx_gtufl_lo;
2703 u32 tx_gtufl_hi;
2704 u32 tx_gterr_lo;
2705 u32 tx_gterr_hi;
2706 u32 tx_gtbyt_lo;
2707 u32 tx_gtbyt_hi;
2708 u32 tx_collisions_lo;
2709 u32 tx_collisions_hi;
2710 u32 tx_singlecollision_lo;
2711 u32 tx_singlecollision_hi;
2712 u32 tx_multiplecollisions_lo;
2713 u32 tx_multiplecollisions_hi;
2714 u32 tx_deferred_lo;
2715 u32 tx_deferred_hi;
2716 u32 tx_excessivecollisions_lo;
2717 u32 tx_excessivecollisions_hi;
2718 u32 tx_latecollisions_lo;
2719 u32 tx_latecollisions_hi;
2723 u32 rx_gr64_lo;
2724 u32 rx_gr64_hi;
2725 u32 rx_gr127_lo;
2726 u32 rx_gr127_hi;
2727 u32 rx_gr255_lo;
2728 u32 rx_gr255_hi;
2729 u32 rx_gr511_lo;
2730 u32 rx_gr511_hi;
2731 u32 rx_gr1023_lo;
2732 u32 rx_gr1023_hi;
2733 u32 rx_gr1518_lo;
2734 u32 rx_gr1518_hi;
2735 u32 rx_gr2047_lo;
2736 u32 rx_gr2047_hi;
2737 u32 rx_gr4095_lo;
2738 u32 rx_gr4095_hi;
2739 u32 rx_gr9216_lo;
2740 u32 rx_gr9216_hi;
2741 u32 rx_gr16383_lo;
2742 u32 rx_gr16383_hi;
2743 u32 rx_grpkt_lo;
2744 u32 rx_grpkt_hi;
2745 u32 rx_grfcs_lo;
2746 u32 rx_grfcs_hi;
2747 u32 rx_gruca_lo;
2748 u32 rx_gruca_hi;
2749 u32 rx_grmca_lo;
2750 u32 rx_grmca_hi;
2751 u32 rx_grbca_lo;
2752 u32 rx_grbca_hi;
2753 u32 rx_grxpf_lo;
2754 u32 rx_grxpf_hi;
2755 u32 rx_grxpp_lo;
2756 u32 rx_grxpp_hi;
2757 u32 rx_grxuo_lo;
2758 u32 rx_grxuo_hi;
2759 u32 rx_grovr_lo;
2760 u32 rx_grovr_hi;
2761 u32 rx_grxcf_lo;
2762 u32 rx_grxcf_hi;
2763 u32 rx_grflr_lo;
2764 u32 rx_grflr_hi;
2765 u32 rx_grpok_lo;
2766 u32 rx_grpok_hi;
2767 u32 rx_grbyt_lo;
2768 u32 rx_grbyt_hi;
2769 u32 rx_grund_lo;
2770 u32 rx_grund_hi;
2771 u32 rx_grfrg_lo;
2772 u32 rx_grfrg_hi;
2773 u32 rx_grerb_lo;
2774 u32 rx_grerb_hi;
2775 u32 rx_grfre_lo;
2776 u32 rx_grfre_hi;
2778 u32 rx_alignmenterrors_lo;
2779 u32 rx_alignmenterrors_hi;
2780 u32 rx_falsecarrier_lo;
2781 u32 rx_falsecarrier_hi;
2782 u32 rx_llfcmsgcnt_lo;
2783 u32 rx_llfcmsgcnt_hi;
2797 u32 rx_stat_ifhcinbadoctets_hi;
2798 u32 rx_stat_ifhcinbadoctets_lo;
2801 u32 tx_stat_ifhcoutbadoctets_hi;
2802 u32 tx_stat_ifhcoutbadoctets_lo;
2805 u32 rx_stat_dot3statsfcserrors_hi;
2806 u32 rx_stat_dot3statsfcserrors_lo;
2808 u32 rx_stat_dot3statsalignmenterrors_hi;
2809 u32 rx_stat_dot3statsalignmenterrors_lo;
2811 u32 rx_stat_dot3statscarriersenseerrors_hi;
2812 u32 rx_stat_dot3statscarriersenseerrors_lo;
2814 u32 rx_stat_falsecarriererrors_hi;
2815 u32 rx_stat_falsecarriererrors_lo;
2818 u32 rx_stat_etherstatsundersizepkts_hi;
2819 u32 rx_stat_etherstatsundersizepkts_lo;
2821 u32 rx_stat_dot3statsframestoolong_hi;
2822 u32 rx_stat_dot3statsframestoolong_lo;
2825 u32 rx_stat_etherstatsfragments_hi;
2826 u32 rx_stat_etherstatsfragments_lo;
2828 u32 rx_stat_etherstatsjabbers_hi;
2829 u32 rx_stat_etherstatsjabbers_lo;
2832 u32 rx_stat_maccontrolframesreceived_hi;
2833 u32 rx_stat_maccontrolframesreceived_lo;
2834 u32 rx_stat_mac_xpf_hi;
2835 u32 rx_stat_mac_xpf_lo;
2836 u32 rx_stat_mac_xcf_hi;
2837 u32 rx_stat_mac_xcf_lo;
2840 u32 rx_stat_xoffstateentered_hi;
2841 u32 rx_stat_xoffstateentered_lo;
2843 u32 rx_stat_xonpauseframesreceived_hi;
2844 u32 rx_stat_xonpauseframesreceived_lo;
2846 u32 rx_stat_xoffpauseframesreceived_hi;
2847 u32 rx_stat_xoffpauseframesreceived_lo;
2849 u32 tx_stat_outxonsent_hi;
2850 u32 tx_stat_outxonsent_lo;
2852 u32 tx_stat_outxoffsent_hi;
2853 u32 tx_stat_outxoffsent_lo;
2855 u32 tx_stat_flowcontroldone_hi;
2856 u32 tx_stat_flowcontroldone_lo;
2859 u32 tx_stat_etherstatscollisions_hi;
2860 u32 tx_stat_etherstatscollisions_lo;
2862 u32 tx_stat_dot3statssinglecollisionframes_hi;
2863 u32 tx_stat_dot3statssinglecollisionframes_lo;
2865 u32 tx_stat_dot3statsmultiplecollisionframes_hi;
2866 u32 tx_stat_dot3statsmultiplecollisionframes_lo;
2868 u32 tx_stat_dot3statsdeferredtransmissions_hi;
2869 u32 tx_stat_dot3statsdeferredtransmissions_lo;
2871 u32 tx_stat_dot3statsexcessivecollisions_hi;
2872 u32 tx_stat_dot3statsexcessivecollisions_lo;
2874 u32 tx_stat_dot3statslatecollisions_hi;
2875 u32 tx_stat_dot3statslatecollisions_lo;
2878 u32 tx_stat_etherstatspkts64octets_hi;
2879 u32 tx_stat_etherstatspkts64octets_lo;
2881 u32 tx_stat_etherstatspkts65octetsto127octets_hi;
2882 u32 tx_stat_etherstatspkts65octetsto127octets_lo;
2884 u32 tx_stat_etherstatspkts128octetsto255octets_hi;
2885 u32 tx_stat_etherstatspkts128octetsto255octets_lo;
2887 u32 tx_stat_etherstatspkts256octetsto511octets_hi;
2888 u32 tx_stat_etherstatspkts256octetsto511octets_lo;
2890 u32 tx_stat_etherstatspkts512octetsto1023octets_hi;
2891 u32 tx_stat_etherstatspkts512octetsto1023octets_lo;
2893 u32 tx_stat_etherstatspkts1024octetsto1522octets_hi;
2894 u32 tx_stat_etherstatspkts1024octetsto1522octets_lo;
2896 u32 tx_stat_etherstatspktsover1522octets_hi;
2897 u32 tx_stat_etherstatspktsover1522octets_lo;
2898 u32 tx_stat_mac_2047_hi;
2899 u32 tx_stat_mac_2047_lo;
2900 u32 tx_stat_mac_4095_hi;
2901 u32 tx_stat_mac_4095_lo;
2902 u32 tx_stat_mac_9216_hi;
2903 u32 tx_stat_mac_9216_lo;
2904 u32 tx_stat_mac_16383_hi;
2905 u32 tx_stat_mac_16383_lo;
2908 u32 tx_stat_dot3statsinternalmactransmiterrors_hi;
2909 u32 tx_stat_dot3statsinternalmactransmiterrors_lo;
2912 u32 tx_stat_mac_ufl_hi;
2913 u32 tx_stat_mac_ufl_lo;
2920 u32 host_port_stats_counter;
2924 u32 brb_drop_hi;
2925 u32 brb_drop_lo;
2927 u32 not_used; /* obsolete */
2928 u32 pfc_frames_tx_hi;
2929 u32 pfc_frames_tx_lo;
2930 u32 pfc_frames_rx_hi;
2931 u32 pfc_frames_rx_lo;
2933 u32 eee_lpi_count_hi;
2934 u32 eee_lpi_count_lo;
2939 u32 host_func_stats_start;
2941 u32 total_bytes_received_hi;
2942 u32 total_bytes_received_lo;
2944 u32 total_bytes_transmitted_hi;
2945 u32 total_bytes_transmitted_lo;
2947 u32 total_unicast_packets_received_hi;
2948 u32 total_unicast_packets_received_lo;
2950 u32 total_multicast_packets_received_hi;
2951 u32 total_multicast_packets_received_lo;
2953 u32 total_broadcast_packets_received_hi;
2954 u32 total_broadcast_packets_received_lo;
2956 u32 total_unicast_packets_transmitted_hi;
2957 u32 total_unicast_packets_transmitted_lo;
2959 u32 total_multicast_packets_transmitted_hi;
2960 u32 total_multicast_packets_transmitted_lo;
2962 u32 total_broadcast_packets_transmitted_hi;
2963 u32 total_broadcast_packets_transmitted_lo;
2965 u32 valid_bytes_received_hi;
2966 u32 valid_bytes_received_lo;
2968 u32 host_func_stats_end;
2980 u32 tx_unicast_frames_hi;
2981 u32 tx_unicast_frames_lo;
2982 u32 tx_unicast_bytes_hi;
2983 u32 tx_unicast_bytes_lo;
2984 u32 tx_multicast_frames_hi;
2985 u32 tx_multicast_frames_lo;
2986 u32 tx_multicast_bytes_hi;
2987 u32 tx_multicast_bytes_lo;
2988 u32 tx_broadcast_frames_hi;
2989 u32 tx_broadcast_frames_lo;
2990 u32 tx_broadcast_bytes_hi;
2991 u32 tx_broadcast_bytes_lo;
2992 u32 tx_frames_discarded_hi;
2993 u32 tx_frames_discarded_lo;
2994 u32 tx_frames_dropped_hi;
2995 u32 tx_frames_dropped_lo;
2997 u32 rx_unicast_frames_hi;
2998 u32 rx_unicast_frames_lo;
2999 u32 rx_unicast_bytes_hi;
3000 u32 rx_unicast_bytes_lo;
3001 u32 rx_multicast_frames_hi;
3002 u32 rx_multicast_frames_lo;
3003 u32 rx_multicast_bytes_hi;
3004 u32 rx_multicast_bytes_lo;
3005 u32 rx_broadcast_frames_hi;
3006 u32 rx_broadcast_frames_lo;
3007 u32 rx_broadcast_bytes_hi;
3008 u32 rx_broadcast_bytes_lo;
3009 u32 rx_frames_discarded_hi;
3010 u32 rx_frames_discarded_lo;
3011 u32 rx_frames_dropped_hi;
3012 u32 rx_frames_dropped_lo;
3039 u32 __reserved0[10];
3047 u32 opcode;
3080 u32 src_addr_lo;
3081 u32 src_addr_hi;
3082 u32 dst_addr_lo;
3083 u32 dst_addr_hi;
3115 u32 comp_addr_lo;
3116 u32 comp_addr_hi;
3117 u32 comp_val;
3118 u32 crc32;
3119 u32 crc32_c;
3228 u32 rsrv1;
3278 u32 sb_id_and_flags;
3291 u32 reserved_2;
3299 u32 sb_id_and_flags;
3318 u32 reserved_2;
3344 u32 ctrl_data;
3480 u32 __reserved_0;
3481 u32 __reserved_1;
3482 u32 __reserved_2;
3483 u32 flags;
3497 u32 __reserved0[14];
3505 u32 __reserved0;
3515 u32 __reserved3[6];
3523 u32 reserved0;
3533 u32 reserved3[30];
3575 u32 lo;
3576 u32 hi;
3769 u32 __reserved0[4];
3774 u32 regpair0_lo;
3775 u32 regpair0_hi;
3776 u32 regpair1_lo;
3777 u32 regpair1_hi;
3913 u32 reserved0[52];
3920 u32 __reserved0[28];
3927 u32 reserved0[60];
3951 u32 raw_data[4];
4024 u32 marker;
4749 u32 mcast_add_hash_bit_array[8];
4782 u32 ucast_drop_all;
4783 u32 ucast_accept_all;
4784 u32 mcast_drop_all;
4785 u32 mcast_accept_all;
4786 u32 bcast_accept_all;
4787 u32 vlan_filter[2];
4788 u32 unmatched_unicast;
4896 u32 cid;
4897 u32 reserved0;
4898 u32 reserved1;
4906 u32 cmng_enables;
4917 u32 __reserved1;
4925 u32 rs_periodic_timeout;
4926 u32 rs_threshold;
4933 u32 upper_bound;
4934 u32 fair_threshold;
4935 u32 fairness_timeout;
4936 u32 reserved0;
4970 u32 quota;
4991 u32 cos_credit_delta[MAX_COS_NUMBER];
4992 u32 vn_credit_delta;
4993 u32 __reserved0;
5017 u32 port_rate;
5076 u32 val[HC_SB_MAX_DYNAMIC_INDICES];
5092 u32 msg_addr_lo;
5093 u32 msg_addr_hi;
5123 u32 reserved2;
5139 u32 threshold[3];
5207 u32 echo;
5208 u32 reserved0;
5209 u32 reserved1;
5220 u32 msg_addr_lo;
5221 u32 msg_addr_hi;
5231 u32 reserved2;
5232 u32 reserved3;
5242 u32 reserved2;
5243 u32 reserved3;
5293 u32 reserved0;
5312 u32 reserved[2];
5463 u32 flags;
5478 u32 dynamic_hc_drv_counter[HC_SB_MAX_DYNAMIC_INDICES];
5527 u32 time_to_expire;
5807 u32 drift_adjust_period;
5992 u32 reserved1;