3841 load_cpu_fw(struct bnx2 *bp, const struct cpu_reg *cpu_reg,  in load_cpu_fw()  argument
3850 	val = bnx2_reg_rd_ind(bp, cpu_reg->mode);  in load_cpu_fw()
3851 	val |= cpu_reg->mode_value_halt;  in load_cpu_fw()
3852 	bnx2_reg_wr_ind(bp, cpu_reg->mode, val);  in load_cpu_fw()
3853 	bnx2_reg_wr_ind(bp, cpu_reg->state, cpu_reg->state_value_clear);  in load_cpu_fw()
3861 	offset = cpu_reg->spad_base + (addr - cpu_reg->mips_view_base);  in load_cpu_fw()
3875 	offset = cpu_reg->spad_base + (addr - cpu_reg->mips_view_base);  in load_cpu_fw()
3889 	offset = cpu_reg->spad_base + (addr - cpu_reg->mips_view_base);  in load_cpu_fw()
3898 	bnx2_reg_wr_ind(bp, cpu_reg->inst, 0);  in load_cpu_fw()
3901 	bnx2_reg_wr_ind(bp, cpu_reg->pc, val);  in load_cpu_fw()
3904 	val = bnx2_reg_rd_ind(bp, cpu_reg->mode);  in load_cpu_fw()
3905 	val &= ~cpu_reg->mode_value_halt;  in load_cpu_fw()
3906 	bnx2_reg_wr_ind(bp, cpu_reg->state, cpu_reg->state_value_clear);  in load_cpu_fw()
3907 	bnx2_reg_wr_ind(bp, cpu_reg->mode, val);  in load_cpu_fw()