Lines Matching refs:ring

49 static void bgmac_dma_tx_reset(struct bgmac *bgmac, struct bgmac_dma_ring *ring)  in bgmac_dma_tx_reset()  argument
54 if (!ring->mmio_base) in bgmac_dma_tx_reset()
61 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_CTL, in bgmac_dma_tx_reset()
64 val = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_STATUS); in bgmac_dma_tx_reset()
76 ring->mmio_base, val); in bgmac_dma_tx_reset()
79 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_CTL, 0); in bgmac_dma_tx_reset()
81 ring->mmio_base + BGMAC_DMA_TX_STATUS, in bgmac_dma_tx_reset()
85 ring->mmio_base); in bgmac_dma_tx_reset()
87 val = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_STATUS); in bgmac_dma_tx_reset()
90 ring->mmio_base); in bgmac_dma_tx_reset()
95 struct bgmac_dma_ring *ring) in bgmac_dma_tx_enable() argument
99 ctl = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_CTL); in bgmac_dma_tx_enable()
115 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_CTL, ctl); in bgmac_dma_tx_enable()
119 bgmac_dma_tx_add_buf(struct bgmac *bgmac, struct bgmac_dma_ring *ring, in bgmac_dma_tx_add_buf() argument
131 slot = &ring->slots[i]; in bgmac_dma_tx_add_buf()
132 dma_desc = &ring->cpu_base[i]; in bgmac_dma_tx_add_buf()
140 struct bgmac_dma_ring *ring, in bgmac_dma_tx_add() argument
145 int index = ring->end % BGMAC_TX_RING_SLOTS; in bgmac_dma_tx_add()
146 struct bgmac_slot_info *slot = &ring->slots[index]; in bgmac_dma_tx_add()
164 if (ring->end - ring->start + nr_frags + 1 >= BGMAC_TX_RING_SLOTS) { in bgmac_dma_tx_add()
179 bgmac_dma_tx_add_buf(bgmac, ring, index, skb_headlen(skb), flags); in bgmac_dma_tx_add()
187 slot = &ring->slots[index]; in bgmac_dma_tx_add()
196 bgmac_dma_tx_add_buf(bgmac, ring, index, len, flags); in bgmac_dma_tx_add()
200 ring->end += nr_frags + 1; in bgmac_dma_tx_add()
208 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_INDEX, in bgmac_dma_tx_add()
209 ring->index_base + in bgmac_dma_tx_add()
210 (ring->end % BGMAC_TX_RING_SLOTS) * in bgmac_dma_tx_add()
213 if (ring->end - ring->start >= BGMAC_TX_RING_SLOTS - 8) in bgmac_dma_tx_add()
223 int index = (ring->end + i) % BGMAC_TX_RING_SLOTS; in bgmac_dma_tx_add()
224 struct bgmac_slot_info *slot = &ring->slots[index]; in bgmac_dma_tx_add()
225 u32 ctl1 = le32_to_cpu(ring->cpu_base[index].ctl1); in bgmac_dma_tx_add()
233 ring->mmio_base); in bgmac_dma_tx_add()
241 static void bgmac_dma_tx_free(struct bgmac *bgmac, struct bgmac_dma_ring *ring) in bgmac_dma_tx_free() argument
249 empty_slot = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_STATUS); in bgmac_dma_tx_free()
251 empty_slot -= ring->index_base; in bgmac_dma_tx_free()
255 while (ring->start != ring->end) { in bgmac_dma_tx_free()
256 int slot_idx = ring->start % BGMAC_TX_RING_SLOTS; in bgmac_dma_tx_free()
257 struct bgmac_slot_info *slot = &ring->slots[slot_idx]; in bgmac_dma_tx_free()
264 ctl1 = le32_to_cpu(ring->cpu_base[slot_idx].ctl1); in bgmac_dma_tx_free()
284 ring->start++; in bgmac_dma_tx_free()
297 static void bgmac_dma_rx_reset(struct bgmac *bgmac, struct bgmac_dma_ring *ring) in bgmac_dma_rx_reset() argument
299 if (!ring->mmio_base) in bgmac_dma_rx_reset()
302 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_CTL, 0); in bgmac_dma_rx_reset()
304 ring->mmio_base + BGMAC_DMA_RX_STATUS, in bgmac_dma_rx_reset()
308 ring->mmio_base); in bgmac_dma_rx_reset()
312 struct bgmac_dma_ring *ring) in bgmac_dma_rx_enable() argument
316 ctl = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_RX_CTL); in bgmac_dma_rx_enable()
332 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_CTL, ctl); in bgmac_dma_rx_enable()
370 struct bgmac_dma_ring *ring) in bgmac_dma_rx_update_index() argument
374 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_INDEX, in bgmac_dma_rx_update_index()
375 ring->index_base + in bgmac_dma_rx_update_index()
376 ring->end * sizeof(struct bgmac_dma_desc)); in bgmac_dma_rx_update_index()
380 struct bgmac_dma_ring *ring, int desc_idx) in bgmac_dma_rx_setup_desc() argument
382 struct bgmac_dma_desc *dma_desc = ring->cpu_base + desc_idx; in bgmac_dma_rx_setup_desc()
393 dma_desc->addr_low = cpu_to_le32(lower_32_bits(ring->slots[desc_idx].dma_addr)); in bgmac_dma_rx_setup_desc()
394 dma_desc->addr_high = cpu_to_le32(upper_32_bits(ring->slots[desc_idx].dma_addr)); in bgmac_dma_rx_setup_desc()
398 ring->end = desc_idx; in bgmac_dma_rx_setup_desc()
414 static int bgmac_dma_rx_read(struct bgmac *bgmac, struct bgmac_dma_ring *ring, in bgmac_dma_rx_read() argument
420 end_slot = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_RX_STATUS); in bgmac_dma_rx_read()
422 end_slot -= ring->index_base; in bgmac_dma_rx_read()
426 while (ring->start != end_slot) { in bgmac_dma_rx_read()
428 struct bgmac_slot_info *slot = &ring->slots[ring->start]; in bgmac_dma_rx_read()
453 ring->start); in bgmac_dma_rx_read()
460 ring->start); in bgmac_dma_rx_read()
480 bgmac_dma_rx_setup_desc(bgmac, ring, ring->start); in bgmac_dma_rx_read()
482 if (++ring->start >= BGMAC_RX_RING_SLOTS) in bgmac_dma_rx_read()
483 ring->start = 0; in bgmac_dma_rx_read()
489 bgmac_dma_rx_update_index(bgmac, ring); in bgmac_dma_rx_read()
496 struct bgmac_dma_ring *ring, in bgmac_dma_unaligned() argument
501 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_RINGLO, in bgmac_dma_unaligned()
503 if (bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_RINGLO)) in bgmac_dma_unaligned()
507 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_RINGLO, in bgmac_dma_unaligned()
509 if (bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_RX_RINGLO)) in bgmac_dma_unaligned()
517 struct bgmac_dma_ring *ring) in bgmac_dma_tx_ring_free() argument
520 struct bgmac_dma_desc *dma_desc = ring->cpu_base; in bgmac_dma_tx_ring_free()
527 slot = &ring->slots[i]; in bgmac_dma_tx_ring_free()
543 struct bgmac_dma_ring *ring) in bgmac_dma_rx_ring_free() argument
550 slot = &ring->slots[i]; in bgmac_dma_rx_ring_free()
563 struct bgmac_dma_ring *ring, in bgmac_dma_ring_desc_free() argument
569 if (!ring->cpu_base) in bgmac_dma_ring_desc_free()
574 dma_free_coherent(dma_dev, size, ring->cpu_base, in bgmac_dma_ring_desc_free()
575 ring->dma_base); in bgmac_dma_ring_desc_free()
605 struct bgmac_dma_ring *ring; in bgmac_dma_alloc() local
621 ring = &bgmac->tx_ring[i]; in bgmac_dma_alloc()
622 ring->mmio_base = ring_base[i]; in bgmac_dma_alloc()
626 ring->cpu_base = dma_zalloc_coherent(dma_dev, size, in bgmac_dma_alloc()
627 &ring->dma_base, in bgmac_dma_alloc()
629 if (!ring->cpu_base) { in bgmac_dma_alloc()
631 ring->mmio_base); in bgmac_dma_alloc()
635 ring->unaligned = bgmac_dma_unaligned(bgmac, ring, in bgmac_dma_alloc()
637 if (ring->unaligned) in bgmac_dma_alloc()
638 ring->index_base = lower_32_bits(ring->dma_base); in bgmac_dma_alloc()
640 ring->index_base = 0; in bgmac_dma_alloc()
646 ring = &bgmac->rx_ring[i]; in bgmac_dma_alloc()
647 ring->mmio_base = ring_base[i]; in bgmac_dma_alloc()
651 ring->cpu_base = dma_zalloc_coherent(dma_dev, size, in bgmac_dma_alloc()
652 &ring->dma_base, in bgmac_dma_alloc()
654 if (!ring->cpu_base) { in bgmac_dma_alloc()
656 ring->mmio_base); in bgmac_dma_alloc()
661 ring->unaligned = bgmac_dma_unaligned(bgmac, ring, in bgmac_dma_alloc()
663 if (ring->unaligned) in bgmac_dma_alloc()
664 ring->index_base = lower_32_bits(ring->dma_base); in bgmac_dma_alloc()
666 ring->index_base = 0; in bgmac_dma_alloc()
678 struct bgmac_dma_ring *ring; in bgmac_dma_init() local
682 ring = &bgmac->tx_ring[i]; in bgmac_dma_init()
684 if (!ring->unaligned) in bgmac_dma_init()
685 bgmac_dma_tx_enable(bgmac, ring); in bgmac_dma_init()
686 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_RINGLO, in bgmac_dma_init()
687 lower_32_bits(ring->dma_base)); in bgmac_dma_init()
688 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_RINGHI, in bgmac_dma_init()
689 upper_32_bits(ring->dma_base)); in bgmac_dma_init()
690 if (ring->unaligned) in bgmac_dma_init()
691 bgmac_dma_tx_enable(bgmac, ring); in bgmac_dma_init()
693 ring->start = 0; in bgmac_dma_init()
694 ring->end = 0; /* Points the slot that should *not* be read */ in bgmac_dma_init()
700 ring = &bgmac->rx_ring[i]; in bgmac_dma_init()
702 if (!ring->unaligned) in bgmac_dma_init()
703 bgmac_dma_rx_enable(bgmac, ring); in bgmac_dma_init()
704 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_RINGLO, in bgmac_dma_init()
705 lower_32_bits(ring->dma_base)); in bgmac_dma_init()
706 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_RX_RINGHI, in bgmac_dma_init()
707 upper_32_bits(ring->dma_base)); in bgmac_dma_init()
708 if (ring->unaligned) in bgmac_dma_init()
709 bgmac_dma_rx_enable(bgmac, ring); in bgmac_dma_init()
711 ring->start = 0; in bgmac_dma_init()
712 ring->end = 0; in bgmac_dma_init()
714 err = bgmac_dma_rx_skb_for_slot(bgmac, &ring->slots[j]); in bgmac_dma_init()
718 bgmac_dma_rx_setup_desc(bgmac, ring, j); in bgmac_dma_init()
721 bgmac_dma_rx_update_index(bgmac, ring); in bgmac_dma_init()
1328 struct bgmac_dma_ring *ring; in bgmac_start_xmit() local
1331 ring = &bgmac->tx_ring[0]; in bgmac_start_xmit()
1332 return bgmac_dma_tx_add(bgmac, ring, skb); in bgmac_start_xmit()