153 	ATL2_WRITE_REG(hw, REG_MAC_CTRL, rctl);  in atl2_set_multi()
156 	ATL2_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);  in atl2_set_multi()
191 	ATL2_WRITE_REG(&adapter->hw, REG_ISR, 0xffffffff);  in atl2_configure()
198 	ATL2_WRITE_REG(hw, REG_MAC_STA_ADDR, value);  in atl2_configure()
201 	ATL2_WRITE_REG(hw, (REG_MAC_STA_ADDR+4), value);  in atl2_configure()
204 	ATL2_WRITE_REG(hw, REG_DESC_BASE_ADDR_HI,  in atl2_configure()
208 	ATL2_WRITE_REG(hw, REG_TXD_BASE_ADDR_LO,  in atl2_configure()
210 	ATL2_WRITE_REG(hw, REG_TXS_BASE_ADDR_LO,  in atl2_configure()
212 	ATL2_WRITE_REG(hw, REG_RXD_BASE_ADDR_LO,  in atl2_configure()
235 	ATL2_WRITE_REG(hw, REG_MAC_IPG_IFG, value);  in atl2_configure()
245 	ATL2_WRITE_REG(hw, REG_MAC_HALF_DUPLX_CTRL, value);  in atl2_configure()
249 	ATL2_WRITE_REG(hw, REG_MASTER_CTRL, MASTER_CTRL_ITIMER_EN);  in atl2_configure()
255 	ATL2_WRITE_REG(hw, REG_MTU, adapter->netdev->mtu +  in atl2_configure()
259 	ATL2_WRITE_REG(hw, REG_TX_CUT_THRESH, 0x177);  in atl2_configure()
280 	ATL2_WRITE_REG(&adapter->hw, REG_ISR, 0x3fffffff);  in atl2_configure()
281 	ATL2_WRITE_REG(&adapter->hw, REG_ISR, 0);  in atl2_configure()
348 	ATL2_WRITE_REG(&adapter->hw, REG_IMR, IMR_NORMAL_MASK);  in atl2_irq_enable()
358     ATL2_WRITE_REG(&adapter->hw, REG_IMR, 0);  in atl2_irq_disable()
384 	ATL2_WRITE_REG(&adapter->hw, REG_MAC_CTRL, ctrl);  in atl2_vlan_mode()
618 	ATL2_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);  in atl2_intr()
623 			ATL2_WRITE_REG(hw, REG_ISR, 0);  in atl2_intr()
624 			ATL2_WRITE_REG(hw, REG_IMR, 0);  in atl2_intr()
633 		ATL2_WRITE_REG(hw, REG_ISR, 0);  in atl2_intr()
634 		ATL2_WRITE_REG(hw, REG_IMR, 0);  in atl2_intr()
655 	ATL2_WRITE_REG(&adapter->hw, REG_ISR, 0);  in atl2_intr()
743 	ATL2_WRITE_REG(&adapter->hw, REG_MASTER_CTRL,  in atl2_open()
934 		ATL2_WRITE_REG(hw, REG_MTU, new_mtu + ENET_HEADER_SIZE +  in atl2_change_mtu()
1101 	ATL2_WRITE_REG(&adapter->hw, REG_MASTER_CTRL, val |  in atl2_up()
1165 	ATL2_WRITE_REG(hw, REG_MAC_CTRL, value);  in atl2_setup_mac_ctrl()
1185 			ATL2_WRITE_REG(hw, REG_MAC_CTRL, value);  in atl2_check_link()
1242 		ATL2_WRITE_REG(hw, REG_MAC_CTRL, value);  in atl2_check_link()
1562 		ATL2_WRITE_REG(hw, REG_WOL_CTRL, ctrl);  in atl2_suspend()
1579 		ATL2_WRITE_REG(hw, REG_MAC_CTRL, ctrl);  in atl2_suspend()
1584 		ATL2_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);  in atl2_suspend()
1587 		ATL2_WRITE_REG(hw, REG_PCIE_DLL_TX_CTRL1, ctrl);  in atl2_suspend()
1596 		ATL2_WRITE_REG(hw, REG_WOL_CTRL, ctrl);  in atl2_suspend()
1597 		ATL2_WRITE_REG(hw, REG_MAC_CTRL, 0);  in atl2_suspend()
1602 		ATL2_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);  in atl2_suspend()
1605 		ATL2_WRITE_REG(hw, REG_PCIE_DLL_TX_CTRL1, ctrl);  in atl2_suspend()
1616 	ATL2_WRITE_REG(hw, REG_WOL_CTRL, 0);  in atl2_suspend()
1621 	ATL2_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);  in atl2_suspend()
1624 	ATL2_WRITE_REG(hw, REG_PCIE_DLL_TX_CTRL1, ctrl);  in atl2_suspend()
1666 	ATL2_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);  in atl2_resume()
2140 	ATL2_WRITE_REG(hw, REG_MASTER_CTRL, MASTER_CTRL_SOFT_RST);  in atl2_reset_hw()
2178 	ATL2_WRITE_REG(hw, REG_SPI_DATA, 0);  in atl2_spi_read()
2179 	ATL2_WRITE_REG(hw, REG_SPI_ADDR, addr);  in atl2_spi_read()
2194 	ATL2_WRITE_REG(hw, REG_SPI_FLASH_CTRL, value);  in atl2_spi_read()
2198 	ATL2_WRITE_REG(hw, REG_SPI_FLASH_CTRL, value);  in atl2_spi_read()
2403     ATL2_WRITE_REG(hw, REG_LTSSM_TEST_MODE, value);  in atl2_init_pcie()
2406     ATL2_WRITE_REG(hw, REG_PCIE_DLL_TX_CTRL1, value);  in atl2_init_pcie()
2450 	ATL2_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);  in atl2_init_hw()
2515 	ATL2_WRITE_REG(hw, REG_MDIO_CTRL, val);  in atl2_read_phy_reg()
2550 	ATL2_WRITE_REG(hw, REG_MDIO_CTRL, val);  in atl2_write_phy_reg()
2746 		ATL2_WRITE_REG(hw, REG_SPI_FLASH_CTRL, value);  in atl2_check_eeprom_exist()
2766 	ATL2_WRITE_REG(hw, REG_VPD_DATA, 0);  in atl2_read_eeprom()
2768 	ATL2_WRITE_REG(hw, REG_VPD_CAP, Control);  in atl2_read_eeprom()