Lines Matching refs:hw
32 int atl1e_check_eeprom_exist(struct atl1e_hw *hw) in atl1e_check_eeprom_exist() argument
36 value = AT_READ_REG(hw, REG_SPI_FLASH_CTRL); in atl1e_check_eeprom_exist()
39 AT_WRITE_REG(hw, REG_SPI_FLASH_CTRL, value); in atl1e_check_eeprom_exist()
41 value = AT_READ_REGW(hw, REG_PCIE_CAP_LIST); in atl1e_check_eeprom_exist()
45 void atl1e_hw_set_mac_addr(struct atl1e_hw *hw) in atl1e_hw_set_mac_addr() argument
53 value = (((u32)hw->mac_addr[2]) << 24) | in atl1e_hw_set_mac_addr()
54 (((u32)hw->mac_addr[3]) << 16) | in atl1e_hw_set_mac_addr()
55 (((u32)hw->mac_addr[4]) << 8) | in atl1e_hw_set_mac_addr()
56 (((u32)hw->mac_addr[5])) ; in atl1e_hw_set_mac_addr()
57 AT_WRITE_REG_ARRAY(hw, REG_MAC_STA_ADDR, 0, value); in atl1e_hw_set_mac_addr()
59 value = (((u32)hw->mac_addr[0]) << 8) | in atl1e_hw_set_mac_addr()
60 (((u32)hw->mac_addr[1])) ; in atl1e_hw_set_mac_addr()
61 AT_WRITE_REG_ARRAY(hw, REG_MAC_STA_ADDR, 1, value); in atl1e_hw_set_mac_addr()
68 static int atl1e_get_permanent_address(struct atl1e_hw *hw) in atl1e_get_permanent_address() argument
75 if (is_valid_ether_addr(hw->perm_mac_addr)) in atl1e_get_permanent_address()
81 if (!atl1e_check_eeprom_exist(hw)) { in atl1e_get_permanent_address()
83 twsi_ctrl_data = AT_READ_REG(hw, REG_TWSI_CTRL); in atl1e_get_permanent_address()
85 AT_WRITE_REG(hw, REG_TWSI_CTRL, twsi_ctrl_data); in atl1e_get_permanent_address()
88 twsi_ctrl_data = AT_READ_REG(hw, REG_TWSI_CTRL); in atl1e_get_permanent_address()
97 addr[0] = AT_READ_REG(hw, REG_MAC_STA_ADDR); in atl1e_get_permanent_address()
98 addr[1] = AT_READ_REG(hw, REG_MAC_STA_ADDR + 4); in atl1e_get_permanent_address()
103 memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN); in atl1e_get_permanent_address()
110 bool atl1e_write_eeprom(struct atl1e_hw *hw, u32 offset, u32 value) in atl1e_write_eeprom() argument
115 bool atl1e_read_eeprom(struct atl1e_hw *hw, u32 offset, u32 *p_value) in atl1e_read_eeprom() argument
123 AT_WRITE_REG(hw, REG_VPD_DATA, 0); in atl1e_read_eeprom()
125 AT_WRITE_REG(hw, REG_VPD_CAP, control); in atl1e_read_eeprom()
129 control = AT_READ_REG(hw, REG_VPD_CAP); in atl1e_read_eeprom()
134 *p_value = AT_READ_REG(hw, REG_VPD_DATA); in atl1e_read_eeprom()
140 void atl1e_force_ps(struct atl1e_hw *hw) in atl1e_force_ps() argument
142 AT_WRITE_REGW(hw, REG_GPHY_CTRL, in atl1e_force_ps()
151 int atl1e_read_mac_addr(struct atl1e_hw *hw) in atl1e_read_mac_addr() argument
155 err = atl1e_get_permanent_address(hw); in atl1e_read_mac_addr()
158 memcpy(hw->mac_addr, hw->perm_mac_addr, sizeof(hw->perm_mac_addr)); in atl1e_read_mac_addr()
167 u32 atl1e_hash_mc_addr(struct atl1e_hw *hw, u8 *mc_addr) in atl1e_hash_mc_addr() argument
185 void atl1e_hash_set(struct atl1e_hw *hw, u32 hash_value) in atl1e_hash_set() argument
202 mta = AT_READ_REG_ARRAY(hw, REG_RX_HASH_TABLE, hash_reg); in atl1e_hash_set()
206 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, hash_reg, mta); in atl1e_hash_set()
213 int atl1e_read_phy_reg(struct atl1e_hw *hw, u16 reg_addr, u16 *phy_data) in atl1e_read_phy_reg() argument
222 AT_WRITE_REG(hw, REG_MDIO_CTRL, val); in atl1e_read_phy_reg()
228 val = AT_READ_REG(hw, REG_MDIO_CTRL); in atl1e_read_phy_reg()
247 int atl1e_write_phy_reg(struct atl1e_hw *hw, u32 reg_addr, u16 phy_data) in atl1e_write_phy_reg() argument
258 AT_WRITE_REG(hw, REG_MDIO_CTRL, val); in atl1e_write_phy_reg()
263 val = AT_READ_REG(hw, REG_MDIO_CTRL); in atl1e_write_phy_reg()
278 static void atl1e_init_pcie(struct atl1e_hw *hw) in atl1e_init_pcie() argument
287 value = AT_READ_REG(hw, 0x1008); in atl1e_init_pcie()
289 AT_WRITE_REG(hw, 0x1008, value); in atl1e_init_pcie()
296 static int atl1e_phy_setup_autoneg_adv(struct atl1e_hw *hw) in atl1e_phy_setup_autoneg_adv() argument
302 if (0 != hw->mii_autoneg_adv_reg) in atl1e_phy_setup_autoneg_adv()
328 switch (hw->media_type) { in atl1e_phy_setup_autoneg_adv()
331 hw->autoneg_advertised = ADVERTISE_ALL; in atl1e_phy_setup_autoneg_adv()
332 if (hw->nic_type == athr_l1e) { in atl1e_phy_setup_autoneg_adv()
334 hw->autoneg_advertised |= ADVERTISE_1000_FULL; in atl1e_phy_setup_autoneg_adv()
340 hw->autoneg_advertised = ADVERTISE_100_FULL; in atl1e_phy_setup_autoneg_adv()
345 hw->autoneg_advertised = ADVERTISE_100_HALF; in atl1e_phy_setup_autoneg_adv()
350 hw->autoneg_advertised = ADVERTISE_10_FULL; in atl1e_phy_setup_autoneg_adv()
355 hw->autoneg_advertised = ADVERTISE_10_HALF; in atl1e_phy_setup_autoneg_adv()
362 hw->mii_autoneg_adv_reg = mii_autoneg_adv_reg; in atl1e_phy_setup_autoneg_adv()
363 hw->mii_1000t_ctrl_reg = mii_1000t_ctrl_reg; in atl1e_phy_setup_autoneg_adv()
365 ret_val = atl1e_write_phy_reg(hw, MII_ADVERTISE, mii_autoneg_adv_reg); in atl1e_phy_setup_autoneg_adv()
369 if (hw->nic_type == athr_l1e || hw->nic_type == athr_l2e_revA) { in atl1e_phy_setup_autoneg_adv()
370 ret_val = atl1e_write_phy_reg(hw, MII_CTRL1000, in atl1e_phy_setup_autoneg_adv()
387 int atl1e_phy_commit(struct atl1e_hw *hw) in atl1e_phy_commit() argument
389 struct atl1e_adapter *adapter = hw->adapter; in atl1e_phy_commit()
395 ret_val = atl1e_write_phy_reg(hw, MII_BMCR, phy_data); in atl1e_phy_commit()
404 val = AT_READ_REG(hw, REG_MDIO_CTRL); in atl1e_phy_commit()
420 int atl1e_phy_init(struct atl1e_hw *hw) in atl1e_phy_init() argument
422 struct atl1e_adapter *adapter = hw->adapter; in atl1e_phy_init()
426 if (hw->phy_configured) { in atl1e_phy_init()
427 if (hw->re_autoneg) { in atl1e_phy_init()
428 hw->re_autoneg = false; in atl1e_phy_init()
429 return atl1e_restart_autoneg(hw); in atl1e_phy_init()
435 AT_WRITE_REGW(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT); in atl1e_phy_init()
437 AT_WRITE_REGW(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT | in atl1e_phy_init()
443 ret_val = atl1e_write_phy_reg(hw, MII_DBG_ADDR, 0xB); in atl1e_phy_init()
446 ret_val = atl1e_write_phy_reg(hw, MII_DBG_DATA, 0xBC00); in atl1e_phy_init()
450 ret_val = atl1e_write_phy_reg(hw, MII_DBG_ADDR, 0); in atl1e_phy_init()
456 ret_val = atl1e_write_phy_reg(hw, MII_DBG_DATA, phy_val); in atl1e_phy_init()
460 ret_val = atl1e_write_phy_reg(hw, MII_DBG_ADDR, 0x12); in atl1e_phy_init()
463 ret_val = atl1e_write_phy_reg(hw, MII_DBG_DATA, 0x4C04); in atl1e_phy_init()
467 ret_val = atl1e_write_phy_reg(hw, MII_DBG_ADDR, 0x4); in atl1e_phy_init()
470 ret_val = atl1e_write_phy_reg(hw, MII_DBG_DATA, 0x8BBB); in atl1e_phy_init()
474 ret_val = atl1e_write_phy_reg(hw, MII_DBG_ADDR, 0x5); in atl1e_phy_init()
477 ret_val = atl1e_write_phy_reg(hw, MII_DBG_DATA, 0x2C46); in atl1e_phy_init()
484 ret_val = atl1e_write_phy_reg(hw, MII_INT_CTRL, 0xC00); in atl1e_phy_init()
491 ret_val = atl1e_phy_setup_autoneg_adv(hw); in atl1e_phy_init()
499 ret_val = atl1e_phy_commit(hw); in atl1e_phy_init()
505 hw->phy_configured = true; in atl1e_phy_init()
515 int atl1e_reset_hw(struct atl1e_hw *hw) in atl1e_reset_hw() argument
517 struct atl1e_adapter *adapter = hw->adapter; in atl1e_reset_hw()
540 AT_WRITE_REG(hw, REG_MASTER_CTRL, in atl1e_reset_hw()
547 idle_status_data = AT_READ_REG(hw, REG_IDLE_STATUS); in atl1e_reset_hw()
573 int atl1e_init_hw(struct atl1e_hw *hw) in atl1e_init_hw() argument
577 atl1e_init_pcie(hw); in atl1e_init_hw()
581 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0); in atl1e_init_hw()
582 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0); in atl1e_init_hw()
584 ret_val = atl1e_phy_init(hw); in atl1e_init_hw()
596 int atl1e_get_speed_and_duplex(struct atl1e_hw *hw, u16 *speed, u16 *duplex) in atl1e_get_speed_and_duplex() argument
602 err = atl1e_read_phy_reg(hw, MII_AT001_PSSR, &phy_data); in atl1e_get_speed_and_duplex()
631 int atl1e_restart_autoneg(struct atl1e_hw *hw) in atl1e_restart_autoneg() argument
635 err = atl1e_write_phy_reg(hw, MII_ADVERTISE, hw->mii_autoneg_adv_reg); in atl1e_restart_autoneg()
639 if (hw->nic_type == athr_l1e || hw->nic_type == athr_l2e_revA) { in atl1e_restart_autoneg()
640 err = atl1e_write_phy_reg(hw, MII_CTRL1000, in atl1e_restart_autoneg()
641 hw->mii_1000t_ctrl_reg); in atl1e_restart_autoneg()
646 err = atl1e_write_phy_reg(hw, MII_BMCR, in atl1e_restart_autoneg()