58 	u32 tail = buf_pool->tail;  in xgene_enet_refill_bufpool()  local
70 		raw_desc = &buf_pool->raw_desc16[tail];  in xgene_enet_refill_bufpool()
75 		buf_pool->rx_skb[tail] = skb;  in xgene_enet_refill_bufpool()
87 		tail = (tail + 1) & slots;  in xgene_enet_refill_bufpool()
91 	buf_pool->tail = tail;  in xgene_enet_refill_bufpool()
115 	u32 tail = buf_pool->tail;  in xgene_enet_delete_bufpool()  local
121 		tail = (tail - 1) & slots;  in xgene_enet_delete_bufpool()
122 		raw_desc = &buf_pool->raw_desc16[tail];  in xgene_enet_delete_bufpool()
130 	buf_pool->tail = tail;  in xgene_enet_delete_bufpool()
285 	return &ring->cp_ring->frag_dma_addr[ring->tail * MAX_SKB_FRAGS];  in xgene_get_frag_dma_array()
297 	u16 tail = tx_ring->tail;  in xgene_enet_setup_tx_desc()  local
305 	raw_desc = &tx_ring->raw_desc[tail];  in xgene_enet_setup_tx_desc()
306 	tail = (tail + 1) & (tx_ring->slots - 1);  in xgene_enet_setup_tx_desc()
334 	exp_desc = (void *)&tx_ring->raw_desc[tail];  in xgene_enet_setup_tx_desc()
335 	tail = (tail + 1) & (tx_ring->slots - 1);  in xgene_enet_setup_tx_desc()
421 				   SET_VAL(USERINFO, tx_ring->tail));  in xgene_enet_setup_tx_desc()
422 	tx_ring->cp_ring->cp_skb[tx_ring->tail] = skb;  in xgene_enet_setup_tx_desc()
424 	tx_ring->tail = tail;  in xgene_enet_setup_tx_desc()