Lines Matching refs:REGA
164 #define REGA(a) (*( AREG = (a), &DREG )) macro
359 REGA(CSR0) = CSR0_STOP; in lance_probe()
424 REGA(CSR0) = CSR0_STOP; in lance_open()
429 REGA(CSR0) = CSR0_INIT; in lance_open()
502 REGA(CSR1) = dvma_vtob(&(MEM->init)); in lance_init_ring()
503 REGA(CSR2) = dvma_vtob(&(MEM->init)) >> 16; in lance_init_ring()
506 REGA(CSR3) = CSR3_BSWP | CSR3_ACON | CSR3_BCON; in lance_init_ring()
508 REGA(CSR3) = CSR3_BSWP; in lance_init_ring()
537 REGA(CSR3) = CSR3_BSWP; in lance_start_xmit()
559 REGA( CSR0 ) = CSR0_INEA | CSR0_INIT | CSR0_STRT; in lance_start_xmit()
589 REGA( CSR0 ) = CSR0_STOP; in lance_start_xmit()
591 REGA( CSR0 ) = CSR0_INIT | CSR0_STRT; in lance_start_xmit()
635 REGA(CSR0) = CSR0_INEA | CSR0_TDMD | CSR0_STRT; in lance_start_xmit()
717 REGA(CSR0) = CSR0_STOP; in lance_interrupt()
718 REGA(CSR3) = CSR3_BSWP; in lance_interrupt()
720 REGA(CSR0) = CSR0_STRT | CSR0_INEA; in lance_interrupt()
755 REGA(CSR0) = CSR0_STOP; in lance_interrupt()
756 REGA(CSR3) = CSR3_BSWP; in lance_interrupt()
758 REGA(CSR0) = CSR0_STRT | CSR0_INEA; in lance_interrupt()
766 REGA(CSR0) = CSR0_INEA; in lance_interrupt()
911 REGA( CSR15 ) = 0x8000; /* Set promiscuous mode */ in set_multicast_list()
921 REGA( CSR8+i ) = multicast_table[i]; in set_multicast_list()
922 REGA( CSR15 ) = 0; /* Unset promiscuous mode */ in set_multicast_list()
929 REGA( CSR3 ) = CSR3_BSWP; in set_multicast_list()
932 REGA( CSR0 ) = CSR0_IDON | CSR0_INEA | CSR0_STRT; in set_multicast_list()