Lines Matching refs:ioaddr

293 #define MACEBANK(win_num) outb((win_num), ioaddr + AM2150_MACE_BANK)
486 static int mace_read(mace_private *lp, unsigned int ioaddr, int reg) in mace_read() argument
493 data = inb(ioaddr + AM2150_MACE_BASE + reg); in mace_read()
498 data = inb(ioaddr + AM2150_MACE_BASE + (reg & 0x0F)); in mace_read()
513 static void mace_write(mace_private *lp, unsigned int ioaddr, int reg, in mace_write() argument
520 outb(data & 0xFF, ioaddr + AM2150_MACE_BASE + reg); in mace_write()
525 outb(data & 0xFF, ioaddr + AM2150_MACE_BASE + (reg & 0x0F)); in mace_write()
536 static int mace_init(mace_private *lp, unsigned int ioaddr, char *enet_addr) in mace_init() argument
542 mace_write(lp, ioaddr, MACE_BIUCC, 1); in mace_init()
543 while (mace_read(lp, ioaddr, MACE_BIUCC) & 0x01) { in mace_init()
552 mace_write(lp, ioaddr, MACE_BIUCC, 0); in mace_init()
555 mace_write(lp, ioaddr, MACE_FIFOCC, 0x0F); in mace_init()
557 mace_write(lp,ioaddr, MACE_RCVFC, 0); /* Disable Auto Strip Receive */ in mace_init()
558 mace_write(lp, ioaddr, MACE_IMR, 0xFF); /* Disable all interrupts until _open */ in mace_init()
574 mace_write(lp, ioaddr, MACE_PLSCC, 0x02); in mace_init()
577 mace_write(lp, ioaddr, MACE_PLSCC, 0x00); in mace_init()
580 mace_write(lp, ioaddr, MACE_PHYCC, /* ASEL */ 4); in mace_init()
587 mace_write(lp, ioaddr, MACE_IAC, MACE_IAC_ADDRCHG | MACE_IAC_PHYADDR); in mace_init()
590 while (mace_read(lp, ioaddr, MACE_IAC) & MACE_IAC_ADDRCHG) in mace_init()
600 mace_write(lp, ioaddr, MACE_PADR, enet_addr[i]); in mace_init()
605 mace_write(lp, ioaddr, MACE_MACCC, 0x00); in mace_init()
616 unsigned int ioaddr; in nmclan_config() local
634 ioaddr = dev->base_addr; in nmclan_config()
649 sig[0] = mace_read(lp, ioaddr, MACE_CHIPIDL); in nmclan_config()
650 sig[1] = mace_read(lp, ioaddr, MACE_CHIPIDH); in nmclan_config()
661 if(mace_init(lp, ioaddr, dev->dev_addr) == -1) in nmclan_config()
780 unsigned int ioaddr = dev->base_addr; in mace_open() local
803 unsigned int ioaddr = dev->base_addr; in mace_close() local
810 outb(0xFF, ioaddr + AM2150_MACE_BASE + MACE_IMR); in mace_close()
862 unsigned int ioaddr = dev->base_addr; in mace_start_xmit() local
872 ioaddr + AM2150_MACE_BASE + MACE_IMR); in mace_start_xmit()
888 outw(skb->len, ioaddr + AM2150_XMT); in mace_start_xmit()
890 outsw(ioaddr + AM2150_XMT, skb->data, skb->len >> 1); in mace_start_xmit()
893 outb(skb->data[skb->len-1], ioaddr + AM2150_XMT); in mace_start_xmit()
905 outb(MACE_IMR_DEFAULT, ioaddr + AM2150_MACE_BASE + MACE_IMR); in mace_start_xmit()
921 unsigned int ioaddr; in mace_interrupt() local
931 ioaddr = dev->base_addr; in mace_interrupt()
941 inb(ioaddr + AM2150_MACE_BASE + MACE_IR), in mace_interrupt()
942 inb(ioaddr + AM2150_MACE_BASE + MACE_IMR)); in mace_interrupt()
954 status = inb(ioaddr + AM2150_MACE_BASE + MACE_IR); in mace_interrupt()
969 fifofc = inb(ioaddr + AM2150_MACE_BASE + MACE_FIFOFC); in mace_interrupt()
972 outb(0xFF, ioaddr + AM2150_XMT_SKIP); in mace_interrupt()
976 xmtrc = inb(ioaddr + AM2150_MACE_BASE + MACE_XMTRC); in mace_interrupt()
981 (xmtfs = inb(ioaddr + AM2150_MACE_BASE + MACE_XMTFS)) & in mace_interrupt()
1066 unsigned int ioaddr = dev->base_addr; in mace_rx() local
1071 ((rx_framecnt = inb(ioaddr + AM2150_RCV_FRAME_COUNT)) > 0) && in mace_rx()
1075 rx_status = inw(ioaddr + AM2150_RCV); in mace_rx()
1099 lp->mace_stats.rfs_rntpc += inb(ioaddr + AM2150_RCV); in mace_rx()
1101 lp->mace_stats.rfs_rcvcc += inb(ioaddr + AM2150_RCV); in mace_rx()
1111 insw(ioaddr + AM2150_RCV, skb_put(skb, pkt_len), pkt_len>>1); in mace_rx()
1113 *(skb_tail_pointer(skb) - 1) = inb(ioaddr + AM2150_RCV); in mace_rx()
1120 outb(0xFF, ioaddr + AM2150_RCV_NEXT); /* skip to next frame */ in mace_rx()
1128 outb(0xFF, ioaddr + AM2150_RCV_NEXT); /* skip to next frame */ in mace_rx()
1227 static void update_stats(unsigned int ioaddr, struct net_device *dev) in update_stats() argument
1231 lp->mace_stats.rcvcc += mace_read(lp, ioaddr, MACE_RCVCC); in update_stats()
1232 lp->mace_stats.rntpc += mace_read(lp, ioaddr, MACE_RNTPC); in update_stats()
1233 lp->mace_stats.mpc += mace_read(lp, ioaddr, MACE_MPC); in update_stats()
1367 unsigned int ioaddr = dev->base_addr; in restore_multicast_list() local
1377 mace_write(lp, ioaddr, MACE_IAC, MACE_IAC_ADDRCHG | MACE_IAC_LOGADDR); in restore_multicast_list()
1379 while (mace_read(lp, ioaddr, MACE_IAC) & MACE_IAC_ADDRCHG) in restore_multicast_list()
1383 mace_write(lp, ioaddr, MACE_LADRF, ladrf[i]); in restore_multicast_list()
1385 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_RCVFCSE | MACE_UTR_LOOP_EXTERNAL); in restore_multicast_list()
1386 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV); in restore_multicast_list()
1391 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL); in restore_multicast_list()
1392 mace_write(lp, ioaddr, MACE_MACCC, in restore_multicast_list()
1399 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL); in restore_multicast_list()
1400 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV); in restore_multicast_list()
1457 unsigned int ioaddr = dev->base_addr; in restore_multicast_list() local
1465 mace_write(lp,ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL); in restore_multicast_list()
1466 mace_write(lp, ioaddr, MACE_MACCC, in restore_multicast_list()
1471 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL); in restore_multicast_list()
1472 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV); in restore_multicast_list()