284 	volatile unsigned short rdp;	/* register data port */  member
312 	writereg(&ll->rdp, (leptr & 0xFFFF));  in load_csrs()
314 	writereg(&ll->rdp, leptr >> 16);  in load_csrs()
316 	writereg(&ll->rdp, lp->busmaster_regval);  in load_csrs()
531 	writereg(&ll->rdp, LE_C0_INIT);  in init_restart_lance()
534 	for (i = 0; (i < 100) && !(ll->rdp & LE_C0_IDON); i++) {  in init_restart_lance()
537 	if ((i == 100) || (ll->rdp & LE_C0_ERR)) {  in init_restart_lance()
539 		       i, ll->rdp);  in init_restart_lance()
542 	if ((ll->rdp & LE_C0_ERR)) {  in init_restart_lance()
544 		       i, ll->rdp);  in init_restart_lance()
547 	writereg(&ll->rdp, LE_C0_IDON);  in init_restart_lance()
548 	writereg(&ll->rdp, LE_C0_STRT);  in init_restart_lance()
549 	writereg(&ll->rdp, LE_C0_INEA);  in init_restart_lance()
674 				writereg(&ll->rdp, LE_C0_STOP);  in lance_tx()
690 				writereg(&ll->rdp, LE_C0_STOP);  in lance_tx()
740 	csr0 = ll->rdp;  in lance_interrupt()
743 	writereg(&ll->rdp, csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT));  in lance_interrupt()
747 		writereg(&ll->rdp, LE_C0_BABL | LE_C0_ERR | LE_C0_MISS |  in lance_interrupt()
765 		writereg(&ll->rdp, LE_C0_STOP);  in lance_interrupt()
773 	writereg(&ll->rdp, LE_C0_INEA);  in lance_interrupt()
774 	writereg(&ll->rdp, LE_C0_INEA);  in lance_interrupt()
787 	writereg(&ll->rdp, LE_C0_STOP);  in lance_open()
847 	writereg(&ll->rdp, LE_C0_STOP);  in lance_close()
876 	writereg(&ll->rdp, LE_C0_STOP);  in lance_reset()
891 		dev->name, ll->rdp);  in lance_tx_timeout()
932 	writereg(&ll->rdp, LE_C0_INEA | LE_C0_TDMD);  in lance_start_xmit()
988 	writereg(&ll->rdp, LE_C0_STOP);  in lance_set_multicast()