133 	csrwr32(SGDMA_CTRLREG_RESET, priv->tx_dma_csr, sgdma_csroffs(control));  in sgdma_reset()
134 	csrwr32(0, priv->tx_dma_csr, sgdma_csroffs(control));  in sgdma_reset()
136 	csrwr32(SGDMA_CTRLREG_RESET, priv->rx_dma_csr, sgdma_csroffs(control));  in sgdma_reset()
137 	csrwr32(0, priv->rx_dma_csr, sgdma_csroffs(control));  in sgdma_reset()
163 	tse_set_bit(priv->rx_dma_csr, sgdma_csroffs(control),  in sgdma_clear_rxirq()
169 	tse_set_bit(priv->tx_dma_csr, sgdma_csroffs(control),  in sgdma_clear_txirq()
247 	u32 sts = csrrd32(priv->rx_dma_csr, sgdma_csroffs(status));  in sgdma_rx_status()
273 			csrwr32(0, priv->rx_dma_csr, sgdma_csroffs(control));  in sgdma_rx_status()
275 			csrwr32(0xf, priv->rx_dma_csr, sgdma_csroffs(status));  in sgdma_rx_status()
380 			sgdma_csroffs(next_descrip));  in sgdma_async_read()
384 			sgdma_csroffs(control));  in sgdma_async_read()
399 	csrwr32(0, priv->tx_dma_csr, sgdma_csroffs(control));  in sgdma_async_write()
400 	csrwr32(0x1f, priv->tx_dma_csr, sgdma_csroffs(status));  in sgdma_async_write()
407 		sgdma_csroffs(next_descrip));  in sgdma_async_write()
411 		sgdma_csroffs(control));  in sgdma_async_write()
516 	return csrrd32(priv->rx_dma_csr, sgdma_csroffs(status))  in sgdma_rxbusy()
528 	while ((csrrd32(priv->tx_dma_csr, sgdma_csroffs(status))  in sgdma_txbusy()
532 	if (csrrd32(priv->tx_dma_csr, sgdma_csroffs(status))  in sgdma_txbusy()