99 	writel(reg_val, db->membase + EMAC_MAC_SUPP_REG);  in emac_update_speed()
112 	writel(reg_val, db->membase + EMAC_MAC_CTL1_REG);  in emac_update_duplex()
193 	writel(0, db->membase + EMAC_CTL_REG);  in emac_reset()
195 	writel(EMAC_CTL_RESET, db->membase + EMAC_CTL_REG);  in emac_reset()
269 	writel(reg_val | EMAC_TX_MODE_ABORTED_FRAME_EN,  in emac_setup()
275 	writel(reg_val | EMAC_MAC_CTL0_RX_FLOW_CTL_EN |  in emac_setup()
284 	writel(reg_val, db->membase + EMAC_MAC_CTL1_REG);  in emac_setup()
287 	writel(EMAC_MAC_IPGT_FULL_DUPLEX, db->membase + EMAC_MAC_IPGT_REG);  in emac_setup()
290 	writel((EMAC_MAC_IPGR_IPG1 << 8) | EMAC_MAC_IPGR_IPG2,  in emac_setup()
294 	writel((EMAC_MAC_CLRT_COLLISION_WINDOW << 8) | EMAC_MAC_CLRT_RM,  in emac_setup()
298 	writel(EMAC_MAX_FRAME_LEN,  in emac_setup()
317 	writel(reg_val | EMAC_RX_CTL_PASS_LEN_OOR_EN |  in emac_set_rx_mode()
333 	writel(reg_val, db->membase + EMAC_RX_CTL_REG);  in emac_powerup()
340 	writel(reg_val, db->membase + EMAC_MAC_CTL0_REG);  in emac_powerup()
346 	writel(reg_val, db->membase + EMAC_MAC_MCFG_REG);  in emac_powerup()
349 	writel(0x0, db->membase + EMAC_RX_FBC_REG);  in emac_powerup()
352 	writel(0, db->membase + EMAC_INT_CTL_REG);  in emac_powerup()
354 	writel(reg_val, db->membase + EMAC_INT_STA_REG);  in emac_powerup()
362 	writel(ndev->dev_addr[0] << 16 | ndev->dev_addr[1] << 8 | ndev->  in emac_powerup()
364 	writel(ndev->dev_addr[3] << 16 | ndev->dev_addr[4] << 8 | ndev->  in emac_powerup()
382 	writel(dev->dev_addr[0] << 16 | dev->dev_addr[1] << 8 | dev->  in emac_set_mac_address()
384 	writel(dev->dev_addr[3] << 16 | dev->dev_addr[4] << 8 | dev->  in emac_set_mac_address()
404 	writel(reg_val | EMAC_CTL_RESET | EMAC_CTL_TX_EN | EMAC_CTL_RX_EN,  in emac_init_device()
410 	writel(reg_val, db->membase + EMAC_INT_CTL_REG);  in emac_init_device()
455 	writel(channel, db->membase + EMAC_TX_INS_REG);  in emac_start_xmit()
465 		writel(skb->len, db->membase + EMAC_TX_PL0_REG);  in emac_start_xmit()
467 		writel(readl(db->membase + EMAC_TX_CTL0_REG) | 1,  in emac_start_xmit()
474 		writel(skb->len, db->membase + EMAC_TX_PL1_REG);  in emac_start_xmit()
476 		writel(readl(db->membase + EMAC_TX_CTL1_REG) | 1,  in emac_start_xmit()
551 			writel(reg_val, db->membase + EMAC_RX_CTL_REG);  in emac_rx()
558 			writel(reg_val, db->membase + EMAC_INT_CTL_REG);  in emac_rx()
572 			writel(reg_val & ~EMAC_CTL_RX_EN,  in emac_rx()
577 			writel(reg_val | (1 << 3),  in emac_rx()
586 			writel(reg_val | EMAC_CTL_RX_EN,  in emac_rx()
590 			writel(reg_val, db->membase + EMAC_INT_CTL_REG);  in emac_rx()
674 	writel(0, db->membase + EMAC_INT_CTL_REG);  in emac_interrupt()
680 	writel(int_status, db->membase + EMAC_INT_STA_REG);  in emac_interrupt()
703 		writel(reg_val, db->membase + EMAC_INT_CTL_REG);  in emac_interrupt()
759 	writel(0, db->membase + EMAC_INT_CTL_REG);  in emac_shutdown()
763 	writel(reg_val, db->membase + EMAC_INT_STA_REG);  in emac_shutdown()
768 	writel(reg_val, db->membase + EMAC_CTL_REG);  in emac_shutdown()