50 #define ei_outb(_v, _a) writeb(_v, ax_convert_addr(_a))  macro
53 #define ei_outb_p(_v, _a) ei_outb(_v, _a)
127 	ei_outb(E8390_NODMA + E8390_PAGE1 + E8390_STOP, ioaddr + E8390_CMD);  in ax_initial_check()
129 	ei_outb(0xff, ioaddr + 0x0d);  in ax_initial_check()
130 	ei_outb(E8390_NODMA + E8390_PAGE0, ioaddr + E8390_CMD);  in ax_initial_check()
133 		ei_outb(reg0, ioaddr);  in ax_initial_check()
134 		ei_outb(regd, ioaddr + 0x0d);	/* Restore the old values. */  in ax_initial_check()
153 	ei_outb(ei_inb(addr + NE_RESET), addr + NE_RESET);  in ax_reset_8390()
166 	ei_outb(ENISR_RESET, addr + EN0_ISR);	/* Ack intr. */  in ax_reset_8390()
186 	ei_outb(E8390_NODMA + E8390_PAGE0 + E8390_START, nic_base + NE_CMD);  in ax_get_8390_hdr()
187 	ei_outb(sizeof(struct e8390_pkt_hdr), nic_base + EN0_RCNTLO);  in ax_get_8390_hdr()
188 	ei_outb(0, nic_base + EN0_RCNTHI);  in ax_get_8390_hdr()
189 	ei_outb(0, nic_base + EN0_RSARLO);		/* On page boundary */  in ax_get_8390_hdr()
190 	ei_outb(ring_page, nic_base + EN0_RSARHI);  in ax_get_8390_hdr()
191 	ei_outb(E8390_RREAD+E8390_START, nic_base + NE_CMD);  in ax_get_8390_hdr()
200 	ei_outb(ENISR_RDC, nic_base + EN0_ISR);	/* Ack intr. */  in ax_get_8390_hdr()
232 	ei_outb(E8390_NODMA+E8390_PAGE0+E8390_START, nic_base + NE_CMD);  in ax_block_input()
233 	ei_outb(count & 0xff, nic_base + EN0_RCNTLO);  in ax_block_input()
234 	ei_outb(count >> 8, nic_base + EN0_RCNTHI);  in ax_block_input()
235 	ei_outb(ring_offset & 0xff, nic_base + EN0_RSARLO);  in ax_block_input()
236 	ei_outb(ring_offset >> 8, nic_base + EN0_RSARHI);  in ax_block_input()
237 	ei_outb(E8390_RREAD+E8390_START, nic_base + NE_CMD);  in ax_block_input()
277 	ei_outb(E8390_PAGE0+E8390_START+E8390_NODMA, nic_base + NE_CMD);  in ax_block_output()
279 	ei_outb(ENISR_RDC, nic_base + EN0_ISR);  in ax_block_output()
282 	ei_outb(count & 0xff, nic_base + EN0_RCNTLO);  in ax_block_output()
283 	ei_outb(count >> 8, nic_base + EN0_RCNTHI);  in ax_block_output()
284 	ei_outb(0x00, nic_base + EN0_RSARLO);  in ax_block_output()
285 	ei_outb(start_page, nic_base + EN0_RSARHI);  in ax_block_output()
287 	ei_outb(E8390_RWRITE+E8390_START, nic_base + NE_CMD);  in ax_block_output()
304 	ei_outb(ENISR_RDC, nic_base + EN0_ISR);	/* Ack intr. */  in ax_block_output()
392 	ei_outb(reg_gpoc, ei_local->mem + EI_SHIFT(0x17));  in ax_phy_switch()
549 	ei_outb(reg, ei_local->mem + AX_MEMR);  in ax_eeprom_register_write()
580 	ei_outb(ax->reg_memr, ax->addr_memr);  in ax_bb_mdc()
592 	ei_outb(ax->reg_memr, ax->addr_memr);  in ax_bb_dir()
604 	ei_outb(ax->reg_memr, ax->addr_memr);  in ax_bb_set_data()
674 	ei_outb(E8390_NODMA + E8390_PAGE0 + E8390_STOP, ioaddr + E8390_CMD);  in ax_initial_setup()
677 	ei_outb(ax->plat->dcr_val & ~1, ioaddr + EN0_DCFG);  in ax_initial_setup()
678 	ei_outb(ax->plat->gpoc_val, ioaddr + EI_SHIFT(0x17));  in ax_initial_setup()
743 		ei_outb(ax->plat->dcr_val, ei_local->mem + EN0_DCFG);  in ax_init_dev()
753 		ei_outb(E8390_NODMA + E8390_PAGE1 + E8390_STOP,  in ax_init_dev()