268 	void __iomem		*ioaddr		____cacheline_aligned;
380 typhoon_reset(void __iomem *ioaddr, int wait_type)  in typhoon_reset()  argument
390 	iowrite32(TYPHOON_INTR_ALL, ioaddr + TYPHOON_REG_INTR_MASK);  in typhoon_reset()
391 	iowrite32(TYPHOON_INTR_ALL, ioaddr + TYPHOON_REG_INTR_STATUS);  in typhoon_reset()
393 	iowrite32(TYPHOON_RESET_ALL, ioaddr + TYPHOON_REG_SOFT_RESET);  in typhoon_reset()
394 	typhoon_post_pci_writes(ioaddr);  in typhoon_reset()
396 	iowrite32(TYPHOON_RESET_NONE, ioaddr + TYPHOON_REG_SOFT_RESET);  in typhoon_reset()
400 			if(ioread32(ioaddr + TYPHOON_REG_STATUS) ==  in typhoon_reset()
414 	iowrite32(TYPHOON_INTR_ALL, ioaddr + TYPHOON_REG_INTR_MASK);  in typhoon_reset()
415 	iowrite32(TYPHOON_INTR_ALL, ioaddr + TYPHOON_REG_INTR_STATUS);  in typhoon_reset()
435 typhoon_wait_status(void __iomem *ioaddr, u32 wait_value)  in typhoon_wait_status()  argument
440 		if(ioread32(ioaddr + TYPHOON_REG_STATUS) == wait_value)  in typhoon_wait_status()
476 		iowrite32(ring->lastWrite, tp->ioaddr + TYPHOON_REG_CMD_READY);  in typhoon_hello()
630 	iowrite32(ring->lastWrite, tp->ioaddr + TYPHOON_REG_CMD_READY);  in typhoon_issue_command()
631 	typhoon_post_pci_writes(tp->ioaddr);  in typhoon_issue_command()
684 			iowrite32(1, tp->ioaddr + TYPHOON_REG_SELF_INTERRUPT);  in typhoon_issue_command()
1158 typhoon_wait_interrupt(void __iomem *ioaddr)  in typhoon_wait_interrupt()  argument
1163 		if(ioread32(ioaddr + TYPHOON_REG_INTR_STATUS) &  in typhoon_wait_interrupt()
1172 	iowrite32(TYPHOON_INTR_BOOTCMD, ioaddr + TYPHOON_REG_INTR_STATUS);  in typhoon_wait_interrupt()
1328 	void __iomem *ioaddr = tp->ioaddr;  in typhoon_download_firmware()  local
1360 	irqEnabled = ioread32(ioaddr + TYPHOON_REG_INTR_ENABLE);  in typhoon_download_firmware()
1362 	       ioaddr + TYPHOON_REG_INTR_ENABLE);  in typhoon_download_firmware()
1363 	irqMasked = ioread32(ioaddr + TYPHOON_REG_INTR_MASK);  in typhoon_download_firmware()
1365 	       ioaddr + TYPHOON_REG_INTR_MASK);  in typhoon_download_firmware()
1368 	if(typhoon_wait_status(ioaddr, TYPHOON_STATUS_WAITING_FOR_HOST) < 0) {  in typhoon_download_firmware()
1376 	iowrite32(TYPHOON_INTR_BOOTCMD, ioaddr + TYPHOON_REG_INTR_STATUS);  in typhoon_download_firmware()
1377 	iowrite32(load_addr, ioaddr + TYPHOON_REG_DOWNLOAD_BOOT_ADDR);  in typhoon_download_firmware()
1379 	iowrite32(hmac, ioaddr + TYPHOON_REG_DOWNLOAD_HMAC_0);  in typhoon_download_firmware()
1381 	iowrite32(hmac, ioaddr + TYPHOON_REG_DOWNLOAD_HMAC_1);  in typhoon_download_firmware()
1383 	iowrite32(hmac, ioaddr + TYPHOON_REG_DOWNLOAD_HMAC_2);  in typhoon_download_firmware()
1385 	iowrite32(hmac, ioaddr + TYPHOON_REG_DOWNLOAD_HMAC_3);  in typhoon_download_firmware()
1387 	iowrite32(hmac, ioaddr + TYPHOON_REG_DOWNLOAD_HMAC_4);  in typhoon_download_firmware()
1388 	typhoon_post_pci_writes(ioaddr);  in typhoon_download_firmware()
1389 	iowrite32(TYPHOON_BOOTCMD_RUNTIME_IMAGE, ioaddr + TYPHOON_REG_COMMAND);  in typhoon_download_firmware()
1406 			if(typhoon_wait_interrupt(ioaddr) < 0 ||  in typhoon_download_firmware()
1407 			   ioread32(ioaddr + TYPHOON_REG_STATUS) !=  in typhoon_download_firmware()
1422 			iowrite32(len, ioaddr + TYPHOON_REG_BOOT_LENGTH);  in typhoon_download_firmware()
1424 					ioaddr + TYPHOON_REG_BOOT_CHECKSUM);  in typhoon_download_firmware()
1426 					ioaddr + TYPHOON_REG_BOOT_DEST_ADDR);  in typhoon_download_firmware()
1427 			iowrite32(0, ioaddr + TYPHOON_REG_BOOT_DATA_HI);  in typhoon_download_firmware()
1428 			iowrite32(dpage_dma, ioaddr + TYPHOON_REG_BOOT_DATA_LO);  in typhoon_download_firmware()
1429 			typhoon_post_pci_writes(ioaddr);  in typhoon_download_firmware()
1431 					ioaddr + TYPHOON_REG_COMMAND);  in typhoon_download_firmware()
1439 	if(typhoon_wait_interrupt(ioaddr) < 0 ||  in typhoon_download_firmware()
1440 	   ioread32(ioaddr + TYPHOON_REG_STATUS) !=  in typhoon_download_firmware()
1446 	iowrite32(TYPHOON_BOOTCMD_DNLD_COMPLETE, ioaddr + TYPHOON_REG_COMMAND);  in typhoon_download_firmware()
1448 	if(typhoon_wait_status(ioaddr, TYPHOON_STATUS_WAITING_FOR_BOOT) < 0) {  in typhoon_download_firmware()
1450 			   ioread32(ioaddr + TYPHOON_REG_STATUS));  in typhoon_download_firmware()
1457 	iowrite32(irqMasked, ioaddr + TYPHOON_REG_INTR_MASK);  in typhoon_download_firmware()
1458 	iowrite32(irqEnabled, ioaddr + TYPHOON_REG_INTR_ENABLE);  in typhoon_download_firmware()
1469 	void __iomem *ioaddr = tp->ioaddr;  in typhoon_boot_3XP()  local
1471 	if(typhoon_wait_status(ioaddr, initial_status) < 0) {  in typhoon_boot_3XP()
1476 	iowrite32(0, ioaddr + TYPHOON_REG_BOOT_RECORD_ADDR_HI);  in typhoon_boot_3XP()
1477 	iowrite32(tp->shared_dma, ioaddr + TYPHOON_REG_BOOT_RECORD_ADDR_LO);  in typhoon_boot_3XP()
1478 	typhoon_post_pci_writes(ioaddr);  in typhoon_boot_3XP()
1480 				ioaddr + TYPHOON_REG_COMMAND);  in typhoon_boot_3XP()
1482 	if(typhoon_wait_status(ioaddr, TYPHOON_STATUS_RUNNING) < 0) {  in typhoon_boot_3XP()
1484 			   ioread32(ioaddr + TYPHOON_REG_STATUS));  in typhoon_boot_3XP()
1490 	iowrite32(0, ioaddr + TYPHOON_REG_TX_HI_READY);  in typhoon_boot_3XP()
1491 	iowrite32(0, ioaddr + TYPHOON_REG_CMD_READY);  in typhoon_boot_3XP()
1492 	iowrite32(0, ioaddr + TYPHOON_REG_TX_LO_READY);  in typhoon_boot_3XP()
1493 	typhoon_post_pci_writes(ioaddr);  in typhoon_boot_3XP()
1494 	iowrite32(TYPHOON_BOOTCMD_BOOT, ioaddr + TYPHOON_REG_COMMAND);  in typhoon_boot_3XP()
1753 				tp->ioaddr + TYPHOON_REG_INTR_MASK);  in typhoon_poll()
1754 		typhoon_post_pci_writes(tp->ioaddr);  in typhoon_poll()
1765 	void __iomem *ioaddr = tp->ioaddr;  in typhoon_interrupt()  local
1768 	intr_status = ioread32(ioaddr + TYPHOON_REG_INTR_STATUS);  in typhoon_interrupt()
1772 	iowrite32(intr_status, ioaddr + TYPHOON_REG_INTR_STATUS);  in typhoon_interrupt()
1775 		iowrite32(TYPHOON_INTR_ALL, ioaddr + TYPHOON_REG_INTR_MASK);  in typhoon_interrupt()
1776 		typhoon_post_pci_writes(ioaddr);  in typhoon_interrupt()
1804 	void __iomem *ioaddr = tp->ioaddr;  in typhoon_sleep()  local
1824 	if(typhoon_wait_status(ioaddr, TYPHOON_STATUS_SLEEPING) < 0)  in typhoon_sleep()
1841 	void __iomem *ioaddr = tp->ioaddr;  in typhoon_wakeup()  local
1850 	iowrite32(TYPHOON_BOOTCMD_WAKEUP, ioaddr + TYPHOON_REG_COMMAND);  in typhoon_wakeup()
1851 	if(typhoon_wait_status(ioaddr, TYPHOON_STATUS_WAITING_FOR_HOST) < 0 ||  in typhoon_wakeup()
1853 		return typhoon_reset(ioaddr, wait_type);  in typhoon_wakeup()
1862 	void __iomem *ioaddr = tp->ioaddr;  in typhoon_start_runtime()  local
1937 	iowrite32(TYPHOON_INTR_ENABLE_ALL, ioaddr + TYPHOON_REG_INTR_ENABLE);  in typhoon_start_runtime()
1938 	iowrite32(TYPHOON_INTR_NONE, ioaddr + TYPHOON_REG_INTR_MASK);  in typhoon_start_runtime()
1939 	typhoon_post_pci_writes(ioaddr);  in typhoon_start_runtime()
1944 	typhoon_reset(ioaddr, WaitNoSleep);  in typhoon_start_runtime()
1955 	void __iomem *ioaddr = tp->ioaddr;  in typhoon_stop_runtime()  local
1963 	iowrite32(TYPHOON_INTR_NONE, ioaddr + TYPHOON_REG_INTR_ENABLE);  in typhoon_stop_runtime()
1994 	if(typhoon_wait_status(ioaddr, TYPHOON_STATUS_HALTED) < 0)  in typhoon_stop_runtime()
1997 	if(typhoon_reset(ioaddr, wait_type) < 0) {  in typhoon_stop_runtime()
2016 	if(typhoon_reset(tp->ioaddr, WaitNoSleep) < 0) {  in typhoon_tx_timeout()
2035 	typhoon_reset(tp->ioaddr, NoWait);  in typhoon_tx_timeout()
2077 		typhoon_reset(tp->ioaddr, NoWait);  in typhoon_open()
2140 	typhoon_reset(tp->ioaddr, NoWait);  in typhoon_resume()
2206 	void __iomem *ioaddr = pci_iomap(pdev, 1, 128);  in typhoon_test_mmio()  local
2210 	if(!ioaddr)  in typhoon_test_mmio()
2213 	if(ioread32(ioaddr + TYPHOON_REG_STATUS) !=  in typhoon_test_mmio()
2217 	iowrite32(TYPHOON_INTR_ALL, ioaddr + TYPHOON_REG_INTR_MASK);  in typhoon_test_mmio()
2218 	iowrite32(TYPHOON_INTR_ALL, ioaddr + TYPHOON_REG_INTR_STATUS);  in typhoon_test_mmio()
2219 	iowrite32(TYPHOON_INTR_ALL, ioaddr + TYPHOON_REG_INTR_ENABLE);  in typhoon_test_mmio()
2225 	val = ioread32(ioaddr + TYPHOON_REG_INTR_STATUS);  in typhoon_test_mmio()
2227 		iowrite32(1, ioaddr + TYPHOON_REG_SELF_INTERRUPT);  in typhoon_test_mmio()
2228 		ioread32(ioaddr + TYPHOON_REG_INTR_STATUS);  in typhoon_test_mmio()
2230 		val = ioread32(ioaddr + TYPHOON_REG_INTR_STATUS);  in typhoon_test_mmio()
2235 	iowrite32(TYPHOON_INTR_ALL, ioaddr + TYPHOON_REG_INTR_MASK);  in typhoon_test_mmio()
2236 	iowrite32(TYPHOON_INTR_ALL, ioaddr + TYPHOON_REG_INTR_STATUS);  in typhoon_test_mmio()
2237 	iowrite32(TYPHOON_INTR_NONE, ioaddr + TYPHOON_REG_INTR_ENABLE);  in typhoon_test_mmio()
2238 	ioread32(ioaddr + TYPHOON_REG_INTR_STATUS);  in typhoon_test_mmio()
2241 	pci_iounmap(pdev, ioaddr);  in typhoon_test_mmio()
2267 	void __iomem *ioaddr;  in typhoon_init_one()  local
2335 	ioaddr = pci_iomap(pdev, use_mmio, 128);  in typhoon_init_one()
2336 	if (!ioaddr) {  in typhoon_init_one()
2358 	tp->ioaddr = ioaddr;  in typhoon_init_one()
2359 	tp->tx_ioaddr = ioaddr;  in typhoon_init_one()
2369 	if (typhoon_reset(ioaddr, WaitSleep) < 0) {  in typhoon_init_one()
2492 	typhoon_reset(ioaddr, NoWait);  in typhoon_init_one()
2498 	pci_iounmap(pdev, ioaddr);  in typhoon_init_one()
2521 	typhoon_reset(tp->ioaddr, NoWait);  in typhoon_remove_one()
2522 	pci_iounmap(pdev, tp->ioaddr);  in typhoon_remove_one()