Lines Matching refs:ret

47 	int ret;  in mv88e6xxx_reg_wait_ready()  local
51 ret = mdiobus_read_nested(bus, sw_addr, SMI_CMD); in mv88e6xxx_reg_wait_ready()
52 if (ret < 0) in mv88e6xxx_reg_wait_ready()
53 return ret; in mv88e6xxx_reg_wait_ready()
55 if ((ret & SMI_CMD_BUSY) == 0) in mv88e6xxx_reg_wait_ready()
65 int ret; in __mv88e6xxx_reg_read() local
71 ret = mv88e6xxx_reg_wait_ready(bus, sw_addr); in __mv88e6xxx_reg_read()
72 if (ret < 0) in __mv88e6xxx_reg_read()
73 return ret; in __mv88e6xxx_reg_read()
76 ret = mdiobus_write_nested(bus, sw_addr, SMI_CMD, in __mv88e6xxx_reg_read()
78 if (ret < 0) in __mv88e6xxx_reg_read()
79 return ret; in __mv88e6xxx_reg_read()
82 ret = mv88e6xxx_reg_wait_ready(bus, sw_addr); in __mv88e6xxx_reg_read()
83 if (ret < 0) in __mv88e6xxx_reg_read()
84 return ret; in __mv88e6xxx_reg_read()
87 ret = mdiobus_read_nested(bus, sw_addr, SMI_DATA); in __mv88e6xxx_reg_read()
88 if (ret < 0) in __mv88e6xxx_reg_read()
89 return ret; in __mv88e6xxx_reg_read()
91 return ret & 0xffff; in __mv88e6xxx_reg_read()
97 int ret; in _mv88e6xxx_reg_read() local
104 ret = __mv88e6xxx_reg_read(bus, ds->pd->sw_addr, addr, reg); in _mv88e6xxx_reg_read()
105 if (ret < 0) in _mv88e6xxx_reg_read()
106 return ret; in _mv88e6xxx_reg_read()
109 addr, reg, ret); in _mv88e6xxx_reg_read()
111 return ret; in _mv88e6xxx_reg_read()
117 int ret; in mv88e6xxx_reg_read() local
120 ret = _mv88e6xxx_reg_read(ds, addr, reg); in mv88e6xxx_reg_read()
123 return ret; in mv88e6xxx_reg_read()
129 int ret; in __mv88e6xxx_reg_write() local
135 ret = mv88e6xxx_reg_wait_ready(bus, sw_addr); in __mv88e6xxx_reg_write()
136 if (ret < 0) in __mv88e6xxx_reg_write()
137 return ret; in __mv88e6xxx_reg_write()
140 ret = mdiobus_write_nested(bus, sw_addr, SMI_DATA, val); in __mv88e6xxx_reg_write()
141 if (ret < 0) in __mv88e6xxx_reg_write()
142 return ret; in __mv88e6xxx_reg_write()
145 ret = mdiobus_write_nested(bus, sw_addr, SMI_CMD, in __mv88e6xxx_reg_write()
147 if (ret < 0) in __mv88e6xxx_reg_write()
148 return ret; in __mv88e6xxx_reg_write()
151 ret = mv88e6xxx_reg_wait_ready(bus, sw_addr); in __mv88e6xxx_reg_write()
152 if (ret < 0) in __mv88e6xxx_reg_write()
153 return ret; in __mv88e6xxx_reg_write()
177 int ret; in mv88e6xxx_reg_write() local
180 ret = _mv88e6xxx_reg_write(ds, addr, reg, val); in mv88e6xxx_reg_write()
183 return ret; in mv88e6xxx_reg_write()
198 int ret; in mv88e6xxx_set_addr_indirect() local
209 ret = REG_READ(REG_GLOBAL2, GLOBAL2_SWITCH_MAC); in mv88e6xxx_set_addr_indirect()
210 if ((ret & GLOBAL2_SWITCH_MAC_BUSY) == 0) in mv88e6xxx_set_addr_indirect()
238 int ret; in mv88e6xxx_ppu_disable() local
241 ret = REG_READ(REG_GLOBAL, GLOBAL_CONTROL); in mv88e6xxx_ppu_disable()
243 ret & ~GLOBAL_CONTROL_PPU_ENABLE); in mv88e6xxx_ppu_disable()
247 ret = REG_READ(REG_GLOBAL, GLOBAL_STATUS); in mv88e6xxx_ppu_disable()
249 if ((ret & GLOBAL_STATUS_PPU_MASK) != in mv88e6xxx_ppu_disable()
259 int ret; in mv88e6xxx_ppu_enable() local
262 ret = REG_READ(REG_GLOBAL, GLOBAL_CONTROL); in mv88e6xxx_ppu_enable()
263 REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL, ret | GLOBAL_CONTROL_PPU_ENABLE); in mv88e6xxx_ppu_enable()
267 ret = REG_READ(REG_GLOBAL, GLOBAL_STATUS); in mv88e6xxx_ppu_enable()
269 if ((ret & GLOBAL_STATUS_PPU_MASK) == in mv88e6xxx_ppu_enable()
301 int ret; in mv88e6xxx_ppu_access_get() local
311 ret = mv88e6xxx_ppu_disable(ds); in mv88e6xxx_ppu_access_get()
312 if (ret < 0) { in mv88e6xxx_ppu_access_get()
314 return ret; in mv88e6xxx_ppu_access_get()
319 ret = 0; in mv88e6xxx_ppu_access_get()
322 return ret; in mv88e6xxx_ppu_access_get()
347 int ret; in mv88e6xxx_phy_read_ppu() local
349 ret = mv88e6xxx_ppu_access_get(ds); in mv88e6xxx_phy_read_ppu()
350 if (ret >= 0) { in mv88e6xxx_phy_read_ppu()
351 ret = mv88e6xxx_reg_read(ds, addr, regnum); in mv88e6xxx_phy_read_ppu()
355 return ret; in mv88e6xxx_phy_read_ppu()
361 int ret; in mv88e6xxx_phy_write_ppu() local
363 ret = mv88e6xxx_ppu_access_get(ds); in mv88e6xxx_phy_write_ppu()
364 if (ret >= 0) { in mv88e6xxx_phy_write_ppu()
365 ret = mv88e6xxx_reg_write(ds, addr, regnum, val); in mv88e6xxx_phy_write_ppu()
369 return ret; in mv88e6xxx_phy_write_ppu()
493 int ret; in mv88e6xxx_adjust_link() local
500 ret = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_PCS_CTRL); in mv88e6xxx_adjust_link()
501 if (ret < 0) in mv88e6xxx_adjust_link()
504 reg = ret & ~(PORT_PCS_CTRL_LINK_UP | in mv88e6xxx_adjust_link()
554 int ret; in _mv88e6xxx_stats_wait() local
558 ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_STATS_OP); in _mv88e6xxx_stats_wait()
559 if ((ret & GLOBAL_STATS_OP_BUSY) == 0) in _mv88e6xxx_stats_wait()
568 int ret; in _mv88e6xxx_stats_snapshot() local
574 ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_STATS_OP, in _mv88e6xxx_stats_snapshot()
577 if (ret < 0) in _mv88e6xxx_stats_snapshot()
578 return ret; in _mv88e6xxx_stats_snapshot()
581 ret = _mv88e6xxx_stats_wait(ds); in _mv88e6xxx_stats_snapshot()
582 if (ret < 0) in _mv88e6xxx_stats_snapshot()
583 return ret; in _mv88e6xxx_stats_snapshot()
591 int ret; in _mv88e6xxx_stats_read() local
595 ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_STATS_OP, in _mv88e6xxx_stats_read()
598 if (ret < 0) in _mv88e6xxx_stats_read()
601 ret = _mv88e6xxx_stats_wait(ds); in _mv88e6xxx_stats_read()
602 if (ret < 0) in _mv88e6xxx_stats_read()
605 ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_STATS_COUNTER_32); in _mv88e6xxx_stats_read()
606 if (ret < 0) in _mv88e6xxx_stats_read()
609 _val = ret << 16; in _mv88e6xxx_stats_read()
611 ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_STATS_COUNTER_01); in _mv88e6xxx_stats_read()
612 if (ret < 0) in _mv88e6xxx_stats_read()
615 *val = _val | ret; in _mv88e6xxx_stats_read()
693 int ret; in _mv88e6xxx_get_ethtool_stat() local
697 ret = _mv88e6xxx_reg_read(ds, REG_PORT(port), in _mv88e6xxx_get_ethtool_stat()
699 if (ret < 0) in _mv88e6xxx_get_ethtool_stat()
702 low = ret; in _mv88e6xxx_get_ethtool_stat()
704 ret = _mv88e6xxx_reg_read(ds, REG_PORT(port), in _mv88e6xxx_get_ethtool_stat()
706 if (ret < 0) in _mv88e6xxx_get_ethtool_stat()
708 high = ret; in _mv88e6xxx_get_ethtool_stat()
725 int ret; in _mv88e6xxx_get_ethtool_stats() local
730 ret = _mv88e6xxx_stats_snapshot(ds, port); in _mv88e6xxx_get_ethtool_stats()
731 if (ret < 0) { in _mv88e6xxx_get_ethtool_stats()
792 int ret; in mv88e6xxx_get_regs() local
794 ret = mv88e6xxx_reg_read(ds, REG_PORT(port), i); in mv88e6xxx_get_regs()
795 if (ret >= 0) in mv88e6xxx_get_regs()
796 p[i] = ret; in mv88e6xxx_get_regs()
806 int ret; in _mv88e6xxx_wait() local
808 ret = _mv88e6xxx_reg_read(ds, reg, offset); in _mv88e6xxx_wait()
809 if (ret < 0) in _mv88e6xxx_wait()
810 return ret; in _mv88e6xxx_wait()
811 if (!(ret & mask)) in _mv88e6xxx_wait()
822 int ret; in mv88e6xxx_wait() local
825 ret = _mv88e6xxx_wait(ds, reg, offset, mask); in mv88e6xxx_wait()
828 return ret; in mv88e6xxx_wait()
858 int ret; in _mv88e6xxx_phy_read_indirect() local
860 ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_SMI_OP, in _mv88e6xxx_phy_read_indirect()
863 if (ret < 0) in _mv88e6xxx_phy_read_indirect()
864 return ret; in _mv88e6xxx_phy_read_indirect()
866 ret = _mv88e6xxx_phy_wait(ds); in _mv88e6xxx_phy_read_indirect()
867 if (ret < 0) in _mv88e6xxx_phy_read_indirect()
868 return ret; in _mv88e6xxx_phy_read_indirect()
876 int ret; in _mv88e6xxx_phy_write_indirect() local
878 ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_SMI_DATA, val); in _mv88e6xxx_phy_write_indirect()
879 if (ret < 0) in _mv88e6xxx_phy_write_indirect()
880 return ret; in _mv88e6xxx_phy_write_indirect()
882 ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_SMI_OP, in _mv88e6xxx_phy_write_indirect()
920 int ret; in mv88e6xxx_set_eee() local
924 ret = _mv88e6xxx_phy_read_indirect(ds, port, 16); in mv88e6xxx_set_eee()
925 if (ret < 0) in mv88e6xxx_set_eee()
928 reg = ret & ~0x0300; in mv88e6xxx_set_eee()
934 ret = _mv88e6xxx_phy_write_indirect(ds, port, 16, reg); in mv88e6xxx_set_eee()
938 return ret; in mv88e6xxx_set_eee()
943 int ret; in _mv88e6xxx_atu_cmd() local
945 ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_ATU_OP, cmd); in _mv88e6xxx_atu_cmd()
946 if (ret < 0) in _mv88e6xxx_atu_cmd()
947 return ret; in _mv88e6xxx_atu_cmd()
1044 int reg, ret = 0; in mv88e6xxx_set_port_state() local
1051 ret = reg; in mv88e6xxx_set_port_state()
1063 ret = _mv88e6xxx_atu_remove(ds, 0, port, false); in mv88e6xxx_set_port_state()
1064 if (ret) in mv88e6xxx_set_port_state()
1068 ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), PORT_CONTROL, in mv88e6xxx_set_port_state()
1074 return ret; in mv88e6xxx_set_port_state()
1130 int ret; in _mv88e6xxx_port_pvid_get() local
1132 ret = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_DEFAULT_VLAN); in _mv88e6xxx_port_pvid_get()
1133 if (ret < 0) in _mv88e6xxx_port_pvid_get()
1134 return ret; in _mv88e6xxx_port_pvid_get()
1136 *pvid = ret & PORT_DEFAULT_VLAN_MASK; in _mv88e6xxx_port_pvid_get()
1143 int ret; in mv88e6xxx_port_pvid_get() local
1145 ret = mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_DEFAULT_VLAN); in mv88e6xxx_port_pvid_get()
1146 if (ret < 0) in mv88e6xxx_port_pvid_get()
1147 return ret; in mv88e6xxx_port_pvid_get()
1149 *pvid = ret & PORT_DEFAULT_VLAN_MASK; in mv88e6xxx_port_pvid_get()
1168 int ret; in _mv88e6xxx_vtu_cmd() local
1170 ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_VTU_OP, op); in _mv88e6xxx_vtu_cmd()
1171 if (ret < 0) in _mv88e6xxx_vtu_cmd()
1172 return ret; in _mv88e6xxx_vtu_cmd()
1179 int ret; in _mv88e6xxx_vtu_stu_flush() local
1181 ret = _mv88e6xxx_vtu_wait(ds); in _mv88e6xxx_vtu_stu_flush()
1182 if (ret < 0) in _mv88e6xxx_vtu_stu_flush()
1183 return ret; in _mv88e6xxx_vtu_stu_flush()
1195 int ret; in _mv88e6xxx_vtu_stu_data_read() local
1198 ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, in _mv88e6xxx_vtu_stu_data_read()
1200 if (ret < 0) in _mv88e6xxx_vtu_stu_data_read()
1201 return ret; in _mv88e6xxx_vtu_stu_data_read()
1203 regs[i] = ret; in _mv88e6xxx_vtu_stu_data_read()
1223 int ret; in _mv88e6xxx_vtu_stu_data_write() local
1233 ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, in _mv88e6xxx_vtu_stu_data_write()
1235 if (ret < 0) in _mv88e6xxx_vtu_stu_data_write()
1236 return ret; in _mv88e6xxx_vtu_stu_data_write()
1252 int ret; in _mv88e6xxx_vtu_getnext() local
1254 ret = _mv88e6xxx_vtu_wait(ds); in _mv88e6xxx_vtu_getnext()
1255 if (ret < 0) in _mv88e6xxx_vtu_getnext()
1256 return ret; in _mv88e6xxx_vtu_getnext()
1258 ret = _mv88e6xxx_vtu_cmd(ds, GLOBAL_VTU_OP_VTU_GET_NEXT); in _mv88e6xxx_vtu_getnext()
1259 if (ret < 0) in _mv88e6xxx_vtu_getnext()
1260 return ret; in _mv88e6xxx_vtu_getnext()
1262 ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_VTU_VID); in _mv88e6xxx_vtu_getnext()
1263 if (ret < 0) in _mv88e6xxx_vtu_getnext()
1264 return ret; in _mv88e6xxx_vtu_getnext()
1266 next.vid = ret & GLOBAL_VTU_VID_MASK; in _mv88e6xxx_vtu_getnext()
1267 next.valid = !!(ret & GLOBAL_VTU_VID_VALID); in _mv88e6xxx_vtu_getnext()
1270 ret = _mv88e6xxx_vtu_stu_data_read(ds, &next, 0); in _mv88e6xxx_vtu_getnext()
1271 if (ret < 0) in _mv88e6xxx_vtu_getnext()
1272 return ret; in _mv88e6xxx_vtu_getnext()
1276 ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, in _mv88e6xxx_vtu_getnext()
1278 if (ret < 0) in _mv88e6xxx_vtu_getnext()
1279 return ret; in _mv88e6xxx_vtu_getnext()
1281 next.fid = ret & GLOBAL_VTU_FID_MASK; in _mv88e6xxx_vtu_getnext()
1283 ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, in _mv88e6xxx_vtu_getnext()
1285 if (ret < 0) in _mv88e6xxx_vtu_getnext()
1286 return ret; in _mv88e6xxx_vtu_getnext()
1288 next.sid = ret & GLOBAL_VTU_SID_MASK; in _mv88e6xxx_vtu_getnext()
1300 int ret; in _mv88e6xxx_vtu_loadpurge() local
1302 ret = _mv88e6xxx_vtu_wait(ds); in _mv88e6xxx_vtu_loadpurge()
1303 if (ret < 0) in _mv88e6xxx_vtu_loadpurge()
1304 return ret; in _mv88e6xxx_vtu_loadpurge()
1310 ret = _mv88e6xxx_vtu_stu_data_write(ds, entry, 0); in _mv88e6xxx_vtu_loadpurge()
1311 if (ret < 0) in _mv88e6xxx_vtu_loadpurge()
1312 return ret; in _mv88e6xxx_vtu_loadpurge()
1317 ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_VTU_SID, reg); in _mv88e6xxx_vtu_loadpurge()
1318 if (ret < 0) in _mv88e6xxx_vtu_loadpurge()
1319 return ret; in _mv88e6xxx_vtu_loadpurge()
1322 ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_VTU_FID, reg); in _mv88e6xxx_vtu_loadpurge()
1323 if (ret < 0) in _mv88e6xxx_vtu_loadpurge()
1324 return ret; in _mv88e6xxx_vtu_loadpurge()
1330 ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_VTU_VID, reg); in _mv88e6xxx_vtu_loadpurge()
1331 if (ret < 0) in _mv88e6xxx_vtu_loadpurge()
1332 return ret; in _mv88e6xxx_vtu_loadpurge()
1341 int ret; in _mv88e6xxx_stu_getnext() local
1343 ret = _mv88e6xxx_vtu_wait(ds); in _mv88e6xxx_stu_getnext()
1344 if (ret < 0) in _mv88e6xxx_stu_getnext()
1345 return ret; in _mv88e6xxx_stu_getnext()
1347 ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_VTU_SID, in _mv88e6xxx_stu_getnext()
1349 if (ret < 0) in _mv88e6xxx_stu_getnext()
1350 return ret; in _mv88e6xxx_stu_getnext()
1352 ret = _mv88e6xxx_vtu_cmd(ds, GLOBAL_VTU_OP_STU_GET_NEXT); in _mv88e6xxx_stu_getnext()
1353 if (ret < 0) in _mv88e6xxx_stu_getnext()
1354 return ret; in _mv88e6xxx_stu_getnext()
1356 ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_VTU_SID); in _mv88e6xxx_stu_getnext()
1357 if (ret < 0) in _mv88e6xxx_stu_getnext()
1358 return ret; in _mv88e6xxx_stu_getnext()
1360 next.sid = ret & GLOBAL_VTU_SID_MASK; in _mv88e6xxx_stu_getnext()
1362 ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_VTU_VID); in _mv88e6xxx_stu_getnext()
1363 if (ret < 0) in _mv88e6xxx_stu_getnext()
1364 return ret; in _mv88e6xxx_stu_getnext()
1366 next.valid = !!(ret & GLOBAL_VTU_VID_VALID); in _mv88e6xxx_stu_getnext()
1369 ret = _mv88e6xxx_vtu_stu_data_read(ds, &next, 2); in _mv88e6xxx_stu_getnext()
1370 if (ret < 0) in _mv88e6xxx_stu_getnext()
1371 return ret; in _mv88e6xxx_stu_getnext()
1382 int ret; in _mv88e6xxx_stu_loadpurge() local
1384 ret = _mv88e6xxx_vtu_wait(ds); in _mv88e6xxx_stu_loadpurge()
1385 if (ret < 0) in _mv88e6xxx_stu_loadpurge()
1386 return ret; in _mv88e6xxx_stu_loadpurge()
1392 ret = _mv88e6xxx_vtu_stu_data_write(ds, entry, 2); in _mv88e6xxx_stu_loadpurge()
1393 if (ret < 0) in _mv88e6xxx_stu_loadpurge()
1394 return ret; in _mv88e6xxx_stu_loadpurge()
1398 ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_VTU_VID, reg); in _mv88e6xxx_stu_loadpurge()
1399 if (ret < 0) in _mv88e6xxx_stu_loadpurge()
1400 return ret; in _mv88e6xxx_stu_loadpurge()
1403 ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_VTU_SID, reg); in _mv88e6xxx_stu_loadpurge()
1404 if (ret < 0) in _mv88e6xxx_stu_loadpurge()
1405 return ret; in _mv88e6xxx_stu_loadpurge()
1648 int i, ret; in _mv88e6xxx_atu_mac_write() local
1651 ret = _mv88e6xxx_reg_write( in _mv88e6xxx_atu_mac_write()
1654 if (ret < 0) in _mv88e6xxx_atu_mac_write()
1655 return ret; in _mv88e6xxx_atu_mac_write()
1663 int i, ret; in _mv88e6xxx_atu_mac_read() local
1666 ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, in _mv88e6xxx_atu_mac_read()
1668 if (ret < 0) in _mv88e6xxx_atu_mac_read()
1669 return ret; in _mv88e6xxx_atu_mac_read()
1670 addr[i * 2] = ret >> 8; in _mv88e6xxx_atu_mac_read()
1671 addr[i * 2 + 1] = ret & 0xff; in _mv88e6xxx_atu_mac_read()
1680 int ret; in _mv88e6xxx_atu_load() local
1682 ret = _mv88e6xxx_atu_wait(ds); in _mv88e6xxx_atu_load()
1683 if (ret < 0) in _mv88e6xxx_atu_load()
1684 return ret; in _mv88e6xxx_atu_load()
1686 ret = _mv88e6xxx_atu_mac_write(ds, entry->mac); in _mv88e6xxx_atu_load()
1687 if (ret < 0) in _mv88e6xxx_atu_load()
1688 return ret; in _mv88e6xxx_atu_load()
1690 ret = _mv88e6xxx_atu_data_write(ds, entry); in _mv88e6xxx_atu_load()
1691 if (ret < 0) in _mv88e6xxx_atu_load()
1692 return ret; in _mv88e6xxx_atu_load()
1694 ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_ATU_FID, entry->fid); in _mv88e6xxx_atu_load()
1695 if (ret < 0) in _mv88e6xxx_atu_load()
1696 return ret; in _mv88e6xxx_atu_load()
1740 int ret; in mv88e6xxx_port_fdb_add() local
1743 ret = _mv88e6xxx_port_fdb_load(ds, port, fdb->addr, fdb->vid, state); in mv88e6xxx_port_fdb_add()
1746 return ret; in mv88e6xxx_port_fdb_add()
1753 int ret; in mv88e6xxx_port_fdb_del() local
1756 ret = _mv88e6xxx_port_fdb_load(ds, port, fdb->addr, fdb->vid, in mv88e6xxx_port_fdb_del()
1760 return ret; in mv88e6xxx_port_fdb_del()
1767 int ret; in _mv88e6xxx_atu_getnext() local
1771 ret = _mv88e6xxx_atu_wait(ds); in _mv88e6xxx_atu_getnext()
1772 if (ret < 0) in _mv88e6xxx_atu_getnext()
1773 return ret; in _mv88e6xxx_atu_getnext()
1775 ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_ATU_FID, fid); in _mv88e6xxx_atu_getnext()
1776 if (ret < 0) in _mv88e6xxx_atu_getnext()
1777 return ret; in _mv88e6xxx_atu_getnext()
1779 ret = _mv88e6xxx_atu_cmd(ds, GLOBAL_ATU_OP_GET_NEXT_DB); in _mv88e6xxx_atu_getnext()
1780 if (ret < 0) in _mv88e6xxx_atu_getnext()
1781 return ret; in _mv88e6xxx_atu_getnext()
1783 ret = _mv88e6xxx_atu_mac_read(ds, next.mac); in _mv88e6xxx_atu_getnext()
1784 if (ret < 0) in _mv88e6xxx_atu_getnext()
1785 return ret; in _mv88e6xxx_atu_getnext()
1787 ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_ATU_DATA); in _mv88e6xxx_atu_getnext()
1788 if (ret < 0) in _mv88e6xxx_atu_getnext()
1789 return ret; in _mv88e6xxx_atu_getnext()
1791 next.state = ret & GLOBAL_ATU_DATA_STATE_MASK; in _mv88e6xxx_atu_getnext()
1795 if (ret & GLOBAL_ATU_DATA_TRUNK) { in _mv88e6xxx_atu_getnext()
1805 next.portv_trunkid = (ret & mask) >> shift; in _mv88e6xxx_atu_getnext()
1926 int ret; in mv88e6xxx_setup_port() local
1956 ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), in mv88e6xxx_setup_port()
1958 if (ret) in mv88e6xxx_setup_port()
2020 ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), in mv88e6xxx_setup_port()
2022 if (ret) in mv88e6xxx_setup_port()
2055 ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), in mv88e6xxx_setup_port()
2057 if (ret) in mv88e6xxx_setup_port()
2071 ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), PORT_ASSOC_VECTOR, reg); in mv88e6xxx_setup_port()
2072 if (ret) in mv88e6xxx_setup_port()
2076 ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), PORT_RATE_CONTROL_2, in mv88e6xxx_setup_port()
2078 if (ret) in mv88e6xxx_setup_port()
2088 ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), in mv88e6xxx_setup_port()
2090 if (ret) in mv88e6xxx_setup_port()
2097 ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), in mv88e6xxx_setup_port()
2102 ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), in mv88e6xxx_setup_port()
2104 if (ret) in mv88e6xxx_setup_port()
2110 ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), in mv88e6xxx_setup_port()
2112 if (ret) in mv88e6xxx_setup_port()
2117 ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), in mv88e6xxx_setup_port()
2119 if (ret) in mv88e6xxx_setup_port()
2125 ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), in mv88e6xxx_setup_port()
2127 if (ret) in mv88e6xxx_setup_port()
2136 ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), in mv88e6xxx_setup_port()
2138 if (ret) in mv88e6xxx_setup_port()
2145 ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), PORT_CONTROL_1, 0x0000); in mv88e6xxx_setup_port()
2146 if (ret) in mv88e6xxx_setup_port()
2153 ret = _mv88e6xxx_port_vlan_map_set(ds, port, reg & ~port); in mv88e6xxx_setup_port()
2154 if (ret) in mv88e6xxx_setup_port()
2160 ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), PORT_DEFAULT_VLAN, in mv88e6xxx_setup_port()
2164 return ret; in mv88e6xxx_setup_port()
2170 int ret; in mv88e6xxx_setup_ports() local
2174 ret = mv88e6xxx_setup_port(ds, i); in mv88e6xxx_setup_ports()
2175 if (ret < 0) in mv88e6xxx_setup_ports()
2176 return ret; in mv88e6xxx_setup_ports()
2182 ret = mv88e6xxx_port_bridge_leave(ds, i, 0); in mv88e6xxx_setup_ports()
2183 if (ret < 0) in mv88e6xxx_setup_ports()
2184 return ret; in mv88e6xxx_setup_ports()
2205 int ret; in mv88e6xxx_setup_global() local
2305 ret = _mv88e6xxx_stats_wait(ds); in mv88e6xxx_setup_global()
2306 if (ret < 0) in mv88e6xxx_setup_global()
2310 ret = _mv88e6xxx_atu_flush(ds, 0, true); in mv88e6xxx_setup_global()
2311 if (ret < 0) in mv88e6xxx_setup_global()
2315 ret = _mv88e6xxx_vtu_stu_flush(ds); in mv88e6xxx_setup_global()
2319 return ret; in mv88e6xxx_setup_global()
2327 int ret; in mv88e6xxx_switch_reset() local
2332 ret = REG_READ(REG_PORT(i), PORT_CONTROL); in mv88e6xxx_switch_reset()
2333 REG_WRITE(REG_PORT(i), PORT_CONTROL, ret & 0xfffc); in mv88e6xxx_switch_reset()
2351 ret = REG_READ(REG_GLOBAL, 0x00); in mv88e6xxx_switch_reset()
2352 if ((ret & is_reset) == is_reset) in mv88e6xxx_switch_reset()
2365 int ret; in mv88e6xxx_phy_page_read() local
2368 ret = _mv88e6xxx_phy_write_indirect(ds, port, 0x16, page); in mv88e6xxx_phy_page_read()
2369 if (ret < 0) in mv88e6xxx_phy_page_read()
2371 ret = _mv88e6xxx_phy_read_indirect(ds, port, reg); in mv88e6xxx_phy_page_read()
2375 return ret; in mv88e6xxx_phy_page_read()
2382 int ret; in mv88e6xxx_phy_page_write() local
2385 ret = _mv88e6xxx_phy_write_indirect(ds, port, 0x16, page); in mv88e6xxx_phy_page_write()
2386 if (ret < 0) in mv88e6xxx_phy_page_write()
2389 ret = _mv88e6xxx_phy_write_indirect(ds, port, reg, val); in mv88e6xxx_phy_page_write()
2393 return ret; in mv88e6xxx_phy_page_write()
2410 int ret; in mv88e6xxx_phy_read() local
2416 ret = _mv88e6xxx_phy_read(ds, addr, regnum); in mv88e6xxx_phy_read()
2418 return ret; in mv88e6xxx_phy_read()
2426 int ret; in mv88e6xxx_phy_write() local
2432 ret = _mv88e6xxx_phy_write(ds, addr, regnum, val); in mv88e6xxx_phy_write()
2434 return ret; in mv88e6xxx_phy_write()
2442 int ret; in mv88e6xxx_phy_read_indirect() local
2448 ret = _mv88e6xxx_phy_read_indirect(ds, addr, regnum); in mv88e6xxx_phy_read_indirect()
2450 return ret; in mv88e6xxx_phy_read_indirect()
2459 int ret; in mv88e6xxx_phy_write_indirect() local
2465 ret = _mv88e6xxx_phy_write_indirect(ds, addr, regnum, val); in mv88e6xxx_phy_write_indirect()
2467 return ret; in mv88e6xxx_phy_write_indirect()
2475 int ret; in mv88e61xx_get_temp() local
2482 ret = _mv88e6xxx_phy_write(ds, 0x0, 0x16, 0x6); in mv88e61xx_get_temp()
2483 if (ret < 0) in mv88e61xx_get_temp()
2487 ret = _mv88e6xxx_phy_read(ds, 0x0, 0x1a); in mv88e61xx_get_temp()
2488 if (ret < 0) in mv88e61xx_get_temp()
2491 ret = _mv88e6xxx_phy_write(ds, 0x0, 0x1a, ret | (1 << 5)); in mv88e61xx_get_temp()
2492 if (ret < 0) in mv88e61xx_get_temp()
2500 ret = val; in mv88e61xx_get_temp()
2505 ret = _mv88e6xxx_phy_write(ds, 0x0, 0x1a, ret & ~(1 << 5)); in mv88e61xx_get_temp()
2506 if (ret < 0) in mv88e61xx_get_temp()
2514 return ret; in mv88e61xx_get_temp()
2520 int ret; in mv88e63xx_get_temp() local
2524 ret = mv88e6xxx_phy_page_read(ds, phy, 6, 27); in mv88e63xx_get_temp()
2525 if (ret < 0) in mv88e63xx_get_temp()
2526 return ret; in mv88e63xx_get_temp()
2528 *temp = (ret & 0xff) - 25; in mv88e63xx_get_temp()
2544 int ret; in mv88e6xxx_get_temp_limit() local
2551 ret = mv88e6xxx_phy_page_read(ds, phy, 6, 26); in mv88e6xxx_get_temp_limit()
2552 if (ret < 0) in mv88e6xxx_get_temp_limit()
2553 return ret; in mv88e6xxx_get_temp_limit()
2555 *temp = (((ret >> 8) & 0x1f) * 5) - 25; in mv88e6xxx_get_temp_limit()
2563 int ret; in mv88e6xxx_set_temp_limit() local
2568 ret = mv88e6xxx_phy_page_read(ds, phy, 6, 26); in mv88e6xxx_set_temp_limit()
2569 if (ret < 0) in mv88e6xxx_set_temp_limit()
2570 return ret; in mv88e6xxx_set_temp_limit()
2573 (ret & 0xe0ff) | (temp << 8)); in mv88e6xxx_set_temp_limit()
2579 int ret; in mv88e6xxx_get_temp_alarm() local
2586 ret = mv88e6xxx_phy_page_read(ds, phy, 6, 26); in mv88e6xxx_get_temp_alarm()
2587 if (ret < 0) in mv88e6xxx_get_temp_alarm()
2588 return ret; in mv88e6xxx_get_temp_alarm()
2590 *alarm = !!(ret & 0x40); in mv88e6xxx_get_temp_alarm()
2601 int i, ret; in mv88e6xxx_lookup_name() local
2606 ret = __mv88e6xxx_reg_read(bus, sw_addr, REG_PORT(0), PORT_SWITCH_ID); in mv88e6xxx_lookup_name()
2607 if (ret < 0) in mv88e6xxx_lookup_name()
2612 if (table[i].id == ret) in mv88e6xxx_lookup_name()
2617 if (table[i].id == (ret & PORT_SWITCH_ID_PROD_NUM_MASK)) { in mv88e6xxx_lookup_name()
2619 ret & PORT_SWITCH_ID_REV_MASK, in mv88e6xxx_lookup_name()
2620 ret & PORT_SWITCH_ID_PROD_NUM_MASK); in mv88e6xxx_lookup_name()