Lines Matching refs:priv
138 u32 (*read_reg)(const struct xcan_priv *priv, enum xcan_reg reg);
139 void (*write_reg)(const struct xcan_priv *priv, enum xcan_reg reg,
169 static void xcan_write_reg_le(const struct xcan_priv *priv, enum xcan_reg reg, in xcan_write_reg_le() argument
172 iowrite32(val, priv->reg_base + reg); in xcan_write_reg_le()
183 static u32 xcan_read_reg_le(const struct xcan_priv *priv, enum xcan_reg reg) in xcan_read_reg_le() argument
185 return ioread32(priv->reg_base + reg); in xcan_read_reg_le()
196 static void xcan_write_reg_be(const struct xcan_priv *priv, enum xcan_reg reg, in xcan_write_reg_be() argument
199 iowrite32be(val, priv->reg_base + reg); in xcan_write_reg_be()
210 static u32 xcan_read_reg_be(const struct xcan_priv *priv, enum xcan_reg reg) in xcan_read_reg_be() argument
212 return ioread32be(priv->reg_base + reg); in xcan_read_reg_be()
226 struct xcan_priv *priv = netdev_priv(ndev); in set_reset_mode() local
229 priv->write_reg(priv, XCAN_SRR_OFFSET, XCAN_SRR_RESET_MASK); in set_reset_mode()
232 while (!(priv->read_reg(priv, XCAN_SR_OFFSET) & XCAN_SR_CONFIG_MASK)) { in set_reset_mode()
252 struct xcan_priv *priv = netdev_priv(ndev); in xcan_set_bittiming() local
253 struct can_bittiming *bt = &priv->can.bittiming; in xcan_set_bittiming()
260 is_config_mode = priv->read_reg(priv, XCAN_SR_OFFSET) & in xcan_set_bittiming()
280 priv->write_reg(priv, XCAN_BRPR_OFFSET, btr0); in xcan_set_bittiming()
281 priv->write_reg(priv, XCAN_BTR_OFFSET, btr1); in xcan_set_bittiming()
284 priv->read_reg(priv, XCAN_BRPR_OFFSET), in xcan_set_bittiming()
285 priv->read_reg(priv, XCAN_BTR_OFFSET)); in xcan_set_bittiming()
302 struct xcan_priv *priv = netdev_priv(ndev); in xcan_chip_start() local
317 priv->write_reg(priv, XCAN_IER_OFFSET, XCAN_INTR_ALL); in xcan_chip_start()
320 if (priv->can.ctrlmode & CAN_CTRLMODE_LOOPBACK) { in xcan_chip_start()
328 priv->write_reg(priv, XCAN_MSR_OFFSET, reg_msr); in xcan_chip_start()
329 priv->write_reg(priv, XCAN_SRR_OFFSET, XCAN_SRR_CEN_MASK); in xcan_chip_start()
332 while (!(priv->read_reg(priv, XCAN_SR_OFFSET) & reg_sr_mask)) { in xcan_chip_start()
340 priv->read_reg(priv, XCAN_SR_OFFSET)); in xcan_chip_start()
342 priv->can.state = CAN_STATE_ERROR_ACTIVE; in xcan_chip_start()
390 struct xcan_priv *priv = netdev_priv(ndev); in xcan_start_xmit() local
399 if (unlikely(priv->read_reg(priv, XCAN_SR_OFFSET) & in xcan_start_xmit()
440 can_put_echo_skb(skb, ndev, priv->tx_head % priv->tx_max); in xcan_start_xmit()
441 priv->tx_head++; in xcan_start_xmit()
444 priv->write_reg(priv, XCAN_TXFIFO_ID_OFFSET, id); in xcan_start_xmit()
446 priv->write_reg(priv, XCAN_TXFIFO_DLC_OFFSET, dlc); in xcan_start_xmit()
448 priv->write_reg(priv, XCAN_TXFIFO_DW1_OFFSET, data[0]); in xcan_start_xmit()
452 priv->write_reg(priv, XCAN_TXFIFO_DW2_OFFSET, data[1]); in xcan_start_xmit()
457 if ((priv->tx_head - priv->tx_tail) == priv->tx_max) in xcan_start_xmit()
475 struct xcan_priv *priv = netdev_priv(ndev); in xcan_rx() local
488 id_xcan = priv->read_reg(priv, XCAN_RXFIFO_ID_OFFSET); in xcan_rx()
489 dlc = priv->read_reg(priv, XCAN_RXFIFO_DLC_OFFSET) >> in xcan_rx()
513 data[0] = priv->read_reg(priv, XCAN_RXFIFO_DW1_OFFSET); in xcan_rx()
514 data[1] = priv->read_reg(priv, XCAN_RXFIFO_DW2_OFFSET); in xcan_rx()
542 struct xcan_priv *priv = netdev_priv(ndev); in xcan_err_interrupt() local
550 err_status = priv->read_reg(priv, XCAN_ESR_OFFSET); in xcan_err_interrupt()
551 priv->write_reg(priv, XCAN_ESR_OFFSET, err_status); in xcan_err_interrupt()
552 txerr = priv->read_reg(priv, XCAN_ECR_OFFSET) & XCAN_ECR_TEC_MASK; in xcan_err_interrupt()
553 rxerr = ((priv->read_reg(priv, XCAN_ECR_OFFSET) & in xcan_err_interrupt()
555 status = priv->read_reg(priv, XCAN_SR_OFFSET); in xcan_err_interrupt()
558 priv->can.state = CAN_STATE_BUS_OFF; in xcan_err_interrupt()
559 priv->can.can_stats.bus_off++; in xcan_err_interrupt()
561 priv->write_reg(priv, XCAN_SRR_OFFSET, XCAN_SRR_RESET_MASK); in xcan_err_interrupt()
566 priv->can.state = CAN_STATE_ERROR_PASSIVE; in xcan_err_interrupt()
567 priv->can.can_stats.error_passive++; in xcan_err_interrupt()
577 priv->can.state = CAN_STATE_ERROR_WARNING; in xcan_err_interrupt()
578 priv->can.can_stats.error_warning++; in xcan_err_interrupt()
591 priv->can.can_stats.arbitration_lost++; in xcan_err_interrupt()
602 priv->write_reg(priv, XCAN_SRR_OFFSET, XCAN_SRR_RESET_MASK); in xcan_err_interrupt()
658 priv->can.can_stats.bus_error++; in xcan_err_interrupt()
668 __func__, priv->read_reg(priv, XCAN_ESR_OFFSET)); in xcan_err_interrupt()
681 struct xcan_priv *priv = netdev_priv(ndev); in xcan_state_interrupt() local
685 priv->can.state = CAN_STATE_SLEEPING; in xcan_state_interrupt()
689 priv->can.state = CAN_STATE_ERROR_ACTIVE; in xcan_state_interrupt()
705 struct xcan_priv *priv = netdev_priv(ndev); in xcan_rx_poll() local
709 isr = priv->read_reg(priv, XCAN_ISR_OFFSET); in xcan_rx_poll()
712 priv->write_reg(priv, XCAN_ICR_OFFSET, in xcan_rx_poll()
716 priv->write_reg(priv, XCAN_ICR_OFFSET, in xcan_rx_poll()
720 priv->write_reg(priv, XCAN_ICR_OFFSET, XCAN_IXR_RXNEMP_MASK); in xcan_rx_poll()
721 isr = priv->read_reg(priv, XCAN_ISR_OFFSET); in xcan_rx_poll()
729 ier = priv->read_reg(priv, XCAN_IER_OFFSET); in xcan_rx_poll()
731 priv->write_reg(priv, XCAN_IER_OFFSET, ier); in xcan_rx_poll()
743 struct xcan_priv *priv = netdev_priv(ndev); in xcan_tx_interrupt() local
746 while ((priv->tx_head - priv->tx_tail > 0) && in xcan_tx_interrupt()
748 priv->write_reg(priv, XCAN_ICR_OFFSET, XCAN_IXR_TXOK_MASK); in xcan_tx_interrupt()
749 can_get_echo_skb(ndev, priv->tx_tail % in xcan_tx_interrupt()
750 priv->tx_max); in xcan_tx_interrupt()
751 priv->tx_tail++; in xcan_tx_interrupt()
753 isr = priv->read_reg(priv, XCAN_ISR_OFFSET); in xcan_tx_interrupt()
773 struct xcan_priv *priv = netdev_priv(ndev); in xcan_interrupt() local
777 isr = priv->read_reg(priv, XCAN_ISR_OFFSET); in xcan_interrupt()
783 priv->write_reg(priv, XCAN_ICR_OFFSET, (XCAN_IXR_SLP_MASK | in xcan_interrupt()
795 priv->write_reg(priv, XCAN_ICR_OFFSET, (XCAN_IXR_ERROR_MASK | in xcan_interrupt()
803 ier = priv->read_reg(priv, XCAN_IER_OFFSET); in xcan_interrupt()
805 priv->write_reg(priv, XCAN_IER_OFFSET, ier); in xcan_interrupt()
806 napi_schedule(&priv->napi); in xcan_interrupt()
820 struct xcan_priv *priv = netdev_priv(ndev); in xcan_chip_stop() local
824 ier = priv->read_reg(priv, XCAN_IER_OFFSET); in xcan_chip_stop()
826 priv->write_reg(priv, XCAN_IER_OFFSET, ier); in xcan_chip_stop()
827 priv->write_reg(priv, XCAN_SRR_OFFSET, XCAN_SRR_RESET_MASK); in xcan_chip_stop()
828 priv->can.state = CAN_STATE_STOPPED; in xcan_chip_stop()
840 struct xcan_priv *priv = netdev_priv(ndev); in xcan_open() local
843 ret = request_irq(ndev->irq, xcan_interrupt, priv->irq_flags, in xcan_open()
850 ret = clk_prepare_enable(priv->can_clk); in xcan_open()
856 ret = clk_prepare_enable(priv->bus_clk); in xcan_open()
881 napi_enable(&priv->napi); in xcan_open()
889 clk_disable_unprepare(priv->bus_clk); in xcan_open()
891 clk_disable_unprepare(priv->can_clk); in xcan_open()
906 struct xcan_priv *priv = netdev_priv(ndev); in xcan_close() local
909 napi_disable(&priv->napi); in xcan_close()
911 clk_disable_unprepare(priv->bus_clk); in xcan_close()
912 clk_disable_unprepare(priv->can_clk); in xcan_close()
932 struct xcan_priv *priv = netdev_priv(ndev); in xcan_get_berr_counter() local
935 ret = clk_prepare_enable(priv->can_clk); in xcan_get_berr_counter()
939 ret = clk_prepare_enable(priv->bus_clk); in xcan_get_berr_counter()
943 bec->txerr = priv->read_reg(priv, XCAN_ECR_OFFSET) & XCAN_ECR_TEC_MASK; in xcan_get_berr_counter()
944 bec->rxerr = ((priv->read_reg(priv, XCAN_ECR_OFFSET) & in xcan_get_berr_counter()
947 clk_disable_unprepare(priv->bus_clk); in xcan_get_berr_counter()
948 clk_disable_unprepare(priv->can_clk); in xcan_get_berr_counter()
953 clk_disable_unprepare(priv->can_clk); in xcan_get_berr_counter()
977 struct xcan_priv *priv = netdev_priv(ndev); in xcan_suspend() local
984 priv->write_reg(priv, XCAN_MSR_OFFSET, XCAN_MSR_SLEEP_MASK); in xcan_suspend()
985 priv->can.state = CAN_STATE_SLEEPING; in xcan_suspend()
987 clk_disable(priv->bus_clk); in xcan_suspend()
988 clk_disable(priv->can_clk); in xcan_suspend()
1004 struct xcan_priv *priv = netdev_priv(ndev); in xcan_resume() local
1007 ret = clk_enable(priv->bus_clk); in xcan_resume()
1012 ret = clk_enable(priv->can_clk); in xcan_resume()
1015 clk_disable_unprepare(priv->bus_clk); in xcan_resume()
1019 priv->write_reg(priv, XCAN_MSR_OFFSET, 0); in xcan_resume()
1020 priv->write_reg(priv, XCAN_SRR_OFFSET, XCAN_SRR_CEN_MASK); in xcan_resume()
1021 priv->can.state = CAN_STATE_ERROR_ACTIVE; in xcan_resume()
1046 struct xcan_priv *priv; in xcan_probe() local
1071 priv = netdev_priv(ndev); in xcan_probe()
1072 priv->dev = ndev; in xcan_probe()
1073 priv->can.bittiming_const = &xcan_bittiming_const; in xcan_probe()
1074 priv->can.do_set_mode = xcan_do_set_mode; in xcan_probe()
1075 priv->can.do_get_berr_counter = xcan_get_berr_counter; in xcan_probe()
1076 priv->can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK | in xcan_probe()
1078 priv->reg_base = addr; in xcan_probe()
1079 priv->tx_max = tx_max; in xcan_probe()
1090 priv->can_clk = devm_clk_get(&pdev->dev, "can_clk"); in xcan_probe()
1091 if (IS_ERR(priv->can_clk)) { in xcan_probe()
1093 ret = PTR_ERR(priv->can_clk); in xcan_probe()
1099 priv->bus_clk = devm_clk_get(&pdev->dev, "pclk"); in xcan_probe()
1100 if (IS_ERR(priv->bus_clk)) { in xcan_probe()
1102 ret = PTR_ERR(priv->bus_clk); in xcan_probe()
1106 priv->bus_clk = devm_clk_get(&pdev->dev, "s_axi_aclk"); in xcan_probe()
1107 if (IS_ERR(priv->bus_clk)) { in xcan_probe()
1109 ret = PTR_ERR(priv->bus_clk); in xcan_probe()
1114 ret = clk_prepare_enable(priv->can_clk); in xcan_probe()
1120 ret = clk_prepare_enable(priv->bus_clk); in xcan_probe()
1126 priv->write_reg = xcan_write_reg_le; in xcan_probe()
1127 priv->read_reg = xcan_read_reg_le; in xcan_probe()
1129 if (priv->read_reg(priv, XCAN_SR_OFFSET) != XCAN_SR_CONFIG_MASK) { in xcan_probe()
1130 priv->write_reg = xcan_write_reg_be; in xcan_probe()
1131 priv->read_reg = xcan_read_reg_be; in xcan_probe()
1134 priv->can.clock.freq = clk_get_rate(priv->can_clk); in xcan_probe()
1136 netif_napi_add(ndev, &priv->napi, xcan_rx_poll, rx_max); in xcan_probe()
1145 clk_disable_unprepare(priv->bus_clk); in xcan_probe()
1146 clk_disable_unprepare(priv->can_clk); in xcan_probe()
1148 priv->reg_base, ndev->irq, priv->can.clock.freq, in xcan_probe()
1149 priv->tx_max); in xcan_probe()
1154 clk_disable_unprepare(priv->bus_clk); in xcan_probe()
1156 clk_disable_unprepare(priv->can_clk); in xcan_probe()
1173 struct xcan_priv *priv = netdev_priv(ndev); in xcan_remove() local
1179 netif_napi_del(&priv->napi); in xcan_remove()