Lines Matching refs:priv
115 struct cc770_priv *priv = netdev_priv(dev); in enable_all_objs() local
120 for (o = 0; o < ARRAY_SIZE(priv->obj_flags); o++) { in enable_all_objs()
121 obj_flags = priv->obj_flags[o]; in enable_all_objs()
129 if (priv->control_normal_mode & CTRL_EAF) { in enable_all_objs()
150 cc770_write_reg(priv, msgobj[mo].config, msgcfg); in enable_all_objs()
151 cc770_write_reg(priv, msgobj[mo].ctrl0, in enable_all_objs()
156 cc770_write_reg(priv, msgobj[mo].ctrl1, in enable_all_objs()
160 cc770_write_reg(priv, msgobj[mo].ctrl1, in enable_all_objs()
167 cc770_write_reg(priv, msgobj[mo].ctrl1, in enable_all_objs()
170 cc770_write_reg(priv, msgobj[mo].ctrl0, in enable_all_objs()
177 static void disable_all_objs(const struct cc770_priv *priv) in disable_all_objs() argument
181 for (o = 0; o < ARRAY_SIZE(priv->obj_flags); o++) { in disable_all_objs()
184 if (priv->obj_flags[o] & CC770_OBJ_FLAG_RX) { in disable_all_objs()
185 if (o > 0 && priv->control_normal_mode & CTRL_EAF) in disable_all_objs()
188 cc770_write_reg(priv, msgobj[mo].ctrl1, in disable_all_objs()
191 cc770_write_reg(priv, msgobj[mo].ctrl0, in disable_all_objs()
196 cc770_write_reg(priv, msgobj[mo].ctrl1, in disable_all_objs()
199 cc770_write_reg(priv, msgobj[mo].ctrl0, in disable_all_objs()
208 struct cc770_priv *priv = netdev_priv(dev); in set_reset_mode() local
211 cc770_write_reg(priv, control, CTRL_CCE | CTRL_INI); in set_reset_mode()
213 priv->can.state = CAN_STATE_STOPPED; in set_reset_mode()
216 cc770_read_reg(priv, interrupt); in set_reset_mode()
219 cc770_write_reg(priv, status, 0); in set_reset_mode()
222 disable_all_objs(priv); in set_reset_mode()
227 struct cc770_priv *priv = netdev_priv(dev); in set_normal_mode() local
230 cc770_read_reg(priv, interrupt); in set_normal_mode()
233 cc770_write_reg(priv, status, STAT_LEC_MASK); in set_normal_mode()
242 cc770_write_reg(priv, control, priv->control_normal_mode); in set_normal_mode()
244 priv->can.state = CAN_STATE_ERROR_ACTIVE; in set_normal_mode()
247 static void chipset_init(struct cc770_priv *priv) in chipset_init() argument
252 cc770_write_reg(priv, control, (CTRL_CCE | CTRL_INI)); in chipset_init()
255 cc770_write_reg(priv, clkout, priv->clkout); in chipset_init()
258 cc770_write_reg(priv, cpu_interface, priv->cpu_interface); in chipset_init()
261 cc770_write_reg(priv, bus_config, priv->bus_config); in chipset_init()
264 cc770_read_reg(priv, interrupt); in chipset_init()
267 cc770_write_reg(priv, status, 0); in chipset_init()
271 cc770_write_reg(priv, msgobj[mo].ctrl0, in chipset_init()
274 cc770_write_reg(priv, msgobj[mo].ctrl0, in chipset_init()
277 cc770_write_reg(priv, msgobj[mo].ctrl1, in chipset_init()
281 cc770_write_reg(priv, msgobj[mo].data[data], 0); in chipset_init()
283 cc770_write_reg(priv, msgobj[mo].id[id], 0); in chipset_init()
284 cc770_write_reg(priv, msgobj[mo].config, 0); in chipset_init()
288 cc770_write_reg(priv, global_mask_std[0], 0); in chipset_init()
289 cc770_write_reg(priv, global_mask_std[1], 0); in chipset_init()
290 cc770_write_reg(priv, global_mask_ext[0], 0); in chipset_init()
291 cc770_write_reg(priv, global_mask_ext[1], 0); in chipset_init()
292 cc770_write_reg(priv, global_mask_ext[2], 0); in chipset_init()
293 cc770_write_reg(priv, global_mask_ext[3], 0); in chipset_init()
299 struct cc770_priv *priv = netdev_priv(dev); in cc770_probe_chip() local
302 cc770_write_reg(priv, control, CTRL_CCE | CTRL_EAF | CTRL_INI); in cc770_probe_chip()
304 cc770_write_reg(priv, cpu_interface, priv->cpu_interface); in cc770_probe_chip()
310 if (cc770_read_reg(priv, cpu_interface) & CPUIF_RST) { in cc770_probe_chip()
312 priv->reg_base); in cc770_probe_chip()
317 cc770_write_reg(priv, msgobj[1].data[1], 0x25); in cc770_probe_chip()
318 cc770_write_reg(priv, msgobj[2].data[3], 0x52); in cc770_probe_chip()
319 cc770_write_reg(priv, msgobj[10].data[6], 0xc3); in cc770_probe_chip()
320 if ((cc770_read_reg(priv, msgobj[1].data[1]) != 0x25) || in cc770_probe_chip()
321 (cc770_read_reg(priv, msgobj[2].data[3]) != 0x52) || in cc770_probe_chip()
322 (cc770_read_reg(priv, msgobj[10].data[6]) != 0xc3)) { in cc770_probe_chip()
324 priv->reg_base); in cc770_probe_chip()
329 if (cc770_read_reg(priv, control) & CTRL_EAF) in cc770_probe_chip()
330 priv->control_normal_mode |= CTRL_EAF; in cc770_probe_chip()
337 struct cc770_priv *priv = netdev_priv(dev); in cc770_start() local
340 if (priv->can.state != CAN_STATE_STOPPED) in cc770_start()
364 struct cc770_priv *priv = netdev_priv(dev); in cc770_set_bittiming() local
365 struct can_bittiming *bt = &priv->can.bittiming; in cc770_set_bittiming()
371 if (priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES) in cc770_set_bittiming()
376 cc770_write_reg(priv, bit_timing_0, btr0); in cc770_set_bittiming()
377 cc770_write_reg(priv, bit_timing_1, btr1); in cc770_set_bittiming()
385 struct cc770_priv *priv = netdev_priv(dev); in cc770_get_berr_counter() local
387 bec->txerr = cc770_read_reg(priv, tx_error_counter); in cc770_get_berr_counter()
388 bec->rxerr = cc770_read_reg(priv, rx_error_counter); in cc770_get_berr_counter()
395 struct cc770_priv *priv = netdev_priv(dev); in cc770_start_xmit() local
406 if ((cc770_read_reg(priv, in cc770_start_xmit()
420 cc770_write_reg(priv, msgobj[mo].ctrl1, in cc770_start_xmit()
422 cc770_write_reg(priv, msgobj[mo].ctrl0, in cc770_start_xmit()
426 cc770_write_reg(priv, msgobj[mo].config, in cc770_start_xmit()
428 cc770_write_reg(priv, msgobj[mo].id[3], id << 3); in cc770_start_xmit()
429 cc770_write_reg(priv, msgobj[mo].id[2], id >> 5); in cc770_start_xmit()
430 cc770_write_reg(priv, msgobj[mo].id[1], id >> 13); in cc770_start_xmit()
431 cc770_write_reg(priv, msgobj[mo].id[0], id >> 21); in cc770_start_xmit()
434 cc770_write_reg(priv, msgobj[mo].config, (dlc << 4) | rtr); in cc770_start_xmit()
435 cc770_write_reg(priv, msgobj[mo].id[0], id >> 3); in cc770_start_xmit()
436 cc770_write_reg(priv, msgobj[mo].id[1], id << 5); in cc770_start_xmit()
440 cc770_write_reg(priv, msgobj[mo].data[i], cf->data[i]); in cc770_start_xmit()
445 cc770_write_reg(priv, msgobj[mo].ctrl1, in cc770_start_xmit()
456 cc770_write_reg(priv, msgobj[mo].ctrl0, in cc770_start_xmit()
464 struct cc770_priv *priv = netdev_priv(dev); in cc770_rx() local
476 config = cc770_read_reg(priv, msgobj[mo].config); in cc770_rx()
490 id = cc770_read_reg(priv, msgobj[mo].id[3]); in cc770_rx()
491 id |= cc770_read_reg(priv, msgobj[mo].id[2]) << 8; in cc770_rx()
492 id |= cc770_read_reg(priv, msgobj[mo].id[1]) << 16; in cc770_rx()
493 id |= cc770_read_reg(priv, msgobj[mo].id[0]) << 24; in cc770_rx()
497 id = cc770_read_reg(priv, msgobj[mo].id[1]); in cc770_rx()
498 id |= cc770_read_reg(priv, msgobj[mo].id[0]) << 8; in cc770_rx()
505 cf->data[i] = cc770_read_reg(priv, msgobj[mo].data[i]); in cc770_rx()
515 struct cc770_priv *priv = netdev_priv(dev); in cc770_err() local
528 if (priv->control_normal_mode & CTRL_EAF) { in cc770_err()
529 cf->data[6] = cc770_read_reg(priv, tx_error_counter); in cc770_err()
530 cf->data[7] = cc770_read_reg(priv, rx_error_counter); in cc770_err()
535 cc770_write_reg(priv, control, CTRL_INI); in cc770_err()
537 priv->can.state = CAN_STATE_BUS_OFF; in cc770_err()
538 priv->can.can_stats.bus_off++; in cc770_err()
546 priv->can.state = CAN_STATE_ERROR_PASSIVE; in cc770_err()
547 priv->can.can_stats.error_passive++; in cc770_err()
551 priv->can.state = CAN_STATE_ERROR_WARNING; in cc770_err()
552 priv->can.can_stats.error_warning++; in cc770_err()
558 priv->can.state = CAN_STATE_ERROR_ACTIVE; in cc770_err()
597 struct cc770_priv *priv = netdev_priv(dev); in cc770_status_interrupt() local
600 status = cc770_read_reg(priv, status); in cc770_status_interrupt()
602 cc770_write_reg(priv, status, STAT_LEC_MASK); in cc770_status_interrupt()
615 struct cc770_priv *priv = netdev_priv(dev); in cc770_rx_interrupt() local
622 ctrl1 = cc770_read_reg(priv, msgobj[mo].ctrl1); in cc770_rx_interrupt()
626 if (priv->control_normal_mode & CTRL_EAF) { in cc770_rx_interrupt()
627 if (!(cc770_read_reg(priv, msgobj[mo].ctrl0) & in cc770_rx_interrupt()
640 cc770_write_reg(priv, msgobj[mo].ctrl1, in cc770_rx_interrupt()
645 cc770_write_reg(priv, msgobj[mo].ctrl0, in cc770_rx_interrupt()
648 cc770_write_reg(priv, msgobj[mo].ctrl1, in cc770_rx_interrupt()
656 struct cc770_priv *priv = netdev_priv(dev); in cc770_rtr_interrupt() local
662 ctrl0 = cc770_read_reg(priv, msgobj[mo].ctrl0); in cc770_rtr_interrupt()
666 ctrl1 = cc770_read_reg(priv, msgobj[mo].ctrl1); in cc770_rtr_interrupt()
669 cc770_write_reg(priv, msgobj[mo].ctrl0, in cc770_rtr_interrupt()
672 cc770_write_reg(priv, msgobj[mo].ctrl1, in cc770_rtr_interrupt()
680 struct cc770_priv *priv = netdev_priv(dev); in cc770_tx_interrupt() local
685 cc770_write_reg(priv, msgobj[mo].ctrl0, in cc770_tx_interrupt()
691 cc770_write_reg(priv, msgobj[mo].ctrl0, in cc770_tx_interrupt()
702 struct cc770_priv *priv = netdev_priv(dev); in cc770_interrupt() local
707 if (priv->can.state == CAN_STATE_STOPPED) in cc770_interrupt()
710 if (priv->pre_irq) in cc770_interrupt()
711 priv->pre_irq(priv); in cc770_interrupt()
715 intid = cc770_read_reg(priv, interrupt); in cc770_interrupt()
733 if (priv->obj_flags[o] & CC770_OBJ_FLAG_RTR) in cc770_interrupt()
735 else if (priv->obj_flags[o] & CC770_OBJ_FLAG_RX) in cc770_interrupt()
742 if (priv->post_irq) in cc770_interrupt()
743 priv->post_irq(priv); in cc770_interrupt()
753 struct cc770_priv *priv = netdev_priv(dev); in cc770_open() local
764 err = request_irq(dev->irq, &cc770_interrupt, priv->irq_flags, in cc770_open()
793 struct cc770_priv *priv; in alloc_cc770dev() local
800 priv = netdev_priv(dev); in alloc_cc770dev()
802 priv->dev = dev; in alloc_cc770dev()
803 priv->can.bittiming_const = &cc770_bittiming_const; in alloc_cc770dev()
804 priv->can.do_set_bittiming = cc770_set_bittiming; in alloc_cc770dev()
805 priv->can.do_set_mode = cc770_set_mode; in alloc_cc770dev()
806 priv->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES; in alloc_cc770dev()
808 memcpy(priv->obj_flags, cc770_obj_flags, sizeof(cc770_obj_flags)); in alloc_cc770dev()
811 priv->priv = (void *)priv + sizeof(struct cc770_priv); in alloc_cc770dev()
832 struct cc770_priv *priv = netdev_priv(dev); in register_cc770dev() local
844 if (!i82527_compat && priv->control_normal_mode & CTRL_EAF) { in register_cc770dev()
845 priv->can.do_get_berr_counter = cc770_get_berr_counter; in register_cc770dev()
846 priv->control_normal_mode = CTRL_IE | CTRL_EAF | CTRL_EIE; in register_cc770dev()
849 priv->control_normal_mode = CTRL_IE | CTRL_EIE; in register_cc770dev()
853 chipset_init(priv); in register_cc770dev()