51 						enum reg index)  in c_can_pci_read_reg_aligned_to_16bit()  argument
53 	return readw(priv->base + priv->regs[index]);  in c_can_pci_read_reg_aligned_to_16bit()
57 						enum reg index, u16 val)  in c_can_pci_write_reg_aligned_to_16bit()  argument
59 	writew(val, priv->base + priv->regs[index]);  in c_can_pci_write_reg_aligned_to_16bit()
63 						enum reg index)  in c_can_pci_read_reg_aligned_to_32bit()  argument
65 	return readw(priv->base + 2 * priv->regs[index]);  in c_can_pci_read_reg_aligned_to_32bit()
69 						enum reg index, u16 val)  in c_can_pci_write_reg_aligned_to_32bit()  argument
71 	writew(val, priv->base + 2 * priv->regs[index]);  in c_can_pci_write_reg_aligned_to_32bit()
75 				    enum reg index)  in c_can_pci_read_reg_32bit()  argument
77 	return (u16)ioread32(priv->base + 2 * priv->regs[index]);  in c_can_pci_read_reg_32bit()
81 				      enum reg index, u16 val)  in c_can_pci_write_reg_32bit()  argument
83 	iowrite32((u32)val, priv->base + 2 * priv->regs[index]);  in c_can_pci_write_reg_32bit()
86 static u32 c_can_pci_read_reg32(const struct c_can_priv *priv, enum reg index)  in c_can_pci_read_reg32()  argument
90 	val = priv->read_reg(priv, index);  in c_can_pci_read_reg32()
91 	val |= ((u32) priv->read_reg(priv, index + 1)) << 16;  in c_can_pci_read_reg32()
96 static void c_can_pci_write_reg32(const struct c_can_priv *priv, enum reg index,  in c_can_pci_write_reg32()  argument
99 	priv->write_reg(priv, index + 1, val >> 16);  in c_can_pci_write_reg32()
100 	priv->write_reg(priv, index, val);  in c_can_pci_write_reg32()