343 	u32 lut_base;  in fsl_qspi_init_lut()  local
354 	lut_base = SEQID_QUAD_READ * 4;  in fsl_qspi_init_lut()
368 			base + QUADSPI_LUT(lut_base));  in fsl_qspi_init_lut()
370 			base + QUADSPI_LUT(lut_base + 1));  in fsl_qspi_init_lut()
373 	lut_base = SEQID_WREN * 4;  in fsl_qspi_init_lut()
374 	writel(LUT0(CMD, PAD1, SPINOR_OP_WREN), base + QUADSPI_LUT(lut_base));  in fsl_qspi_init_lut()
377 	lut_base = SEQID_PP * 4;  in fsl_qspi_init_lut()
389 			base + QUADSPI_LUT(lut_base));  in fsl_qspi_init_lut()
390 	writel(LUT0(FSL_WRITE, PAD1, 0), base + QUADSPI_LUT(lut_base + 1));  in fsl_qspi_init_lut()
393 	lut_base = SEQID_RDSR * 4;  in fsl_qspi_init_lut()
395 			base + QUADSPI_LUT(lut_base));  in fsl_qspi_init_lut()
398 	lut_base = SEQID_SE * 4;  in fsl_qspi_init_lut()
404 			base + QUADSPI_LUT(lut_base));  in fsl_qspi_init_lut()
407 	lut_base = SEQID_CHIP_ERASE * 4;  in fsl_qspi_init_lut()
409 			base + QUADSPI_LUT(lut_base));  in fsl_qspi_init_lut()
412 	lut_base = SEQID_RDID * 4;  in fsl_qspi_init_lut()
414 			base + QUADSPI_LUT(lut_base));  in fsl_qspi_init_lut()
417 	lut_base = SEQID_WRSR * 4;  in fsl_qspi_init_lut()
419 			base + QUADSPI_LUT(lut_base));  in fsl_qspi_init_lut()
422 	lut_base = SEQID_RDCR * 4;  in fsl_qspi_init_lut()
424 			base + QUADSPI_LUT(lut_base));  in fsl_qspi_init_lut()
427 	lut_base = SEQID_WRDI * 4;  in fsl_qspi_init_lut()
428 	writel(LUT0(CMD, PAD1, SPINOR_OP_WRDI), base + QUADSPI_LUT(lut_base));  in fsl_qspi_init_lut()
431 	lut_base = SEQID_EN4B * 4;  in fsl_qspi_init_lut()
432 	writel(LUT0(CMD, PAD1, SPINOR_OP_EN4B), base + QUADSPI_LUT(lut_base));  in fsl_qspi_init_lut()
435 	lut_base = SEQID_BRWR * 4;  in fsl_qspi_init_lut()
436 	writel(LUT0(CMD, PAD1, SPINOR_OP_BRWR), base + QUADSPI_LUT(lut_base));  in fsl_qspi_init_lut()