Lines Matching refs:nand_chip
107 struct nand_chip chip;
131 struct nand_chip *chip = mtd->priv; in tmio_nand_hwcontrol()
170 struct nand_chip *nand_chip = &tmio->chip; in tmio_irq() local
175 if (unlikely(!waitqueue_active(&nand_chip->controller->wq))) in tmio_irq()
178 wake_up(&nand_chip->controller->wq); in tmio_irq()
189 tmio_nand_wait(struct mtd_info *mtd, struct nand_chip *nand_chip) in tmio_nand_wait() argument
198 timeout = wait_event_timeout(nand_chip->controller->wq, in tmio_nand_wait()
200 msecs_to_jiffies(nand_chip->state == FL_ERASING ? 400 : 20)); in tmio_nand_wait()
205 nand_chip->state == FL_ERASING ? "erase" : "program", in tmio_nand_wait()
206 nand_chip->state == FL_ERASING ? 400 : 20); in tmio_nand_wait()
213 nand_chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); in tmio_nand_wait()
214 return nand_chip->read_byte(mtd); in tmio_nand_wait()
368 struct nand_chip *nand_chip; in tmio_probe() local
382 nand_chip = &tmio->chip; in tmio_probe()
383 mtd->priv = nand_chip; in tmio_probe()
401 nand_chip->IO_ADDR_R = tmio->fcr; in tmio_probe()
402 nand_chip->IO_ADDR_W = tmio->fcr; in tmio_probe()
405 nand_chip->cmd_ctrl = tmio_nand_hwcontrol; in tmio_probe()
406 nand_chip->dev_ready = tmio_nand_dev_ready; in tmio_probe()
407 nand_chip->read_byte = tmio_nand_read_byte; in tmio_probe()
408 nand_chip->write_buf = tmio_nand_write_buf; in tmio_probe()
409 nand_chip->read_buf = tmio_nand_read_buf; in tmio_probe()
412 nand_chip->ecc.mode = NAND_ECC_HW; in tmio_probe()
413 nand_chip->ecc.size = 512; in tmio_probe()
414 nand_chip->ecc.bytes = 6; in tmio_probe()
415 nand_chip->ecc.strength = 2; in tmio_probe()
416 nand_chip->ecc.hwctl = tmio_nand_enable_hwecc; in tmio_probe()
417 nand_chip->ecc.calculate = tmio_nand_calculate_ecc; in tmio_probe()
418 nand_chip->ecc.correct = tmio_nand_correct_data; in tmio_probe()
421 nand_chip->badblock_pattern = data->badblock_pattern; in tmio_probe()
424 nand_chip->chip_delay = 15; in tmio_probe()
434 nand_chip->waitfunc = tmio_nand_wait; in tmio_probe()